Commit graph

13497 commits

Author SHA1 Message Date
H. Peter Anvin
7052fdd890 Code for actual protected-mode entry
This is the code which actually does the switch to protected mode,
including all preparation.  It is also responsible for invoking the
boot loader hooks, if present.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
5e8ddcbe86 Video mode probing support for the new x86 setup code
Video mode probing for the new x86 setup code.  This code breaks down
different drivers into modules.  This code deliberately drops support
for a lot of the vendor-specific mode probing present in the assembly
version, since a lot of those probes have been found to be stale in
current versions of those chips -- frequently, support for those modes
have been dropped from recent video BIOSes due to space constraints,
but the video BIOS signatures are still the same.

However, additional drivers should be extremely straightforward to plug
in, if desirable.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
337496eb73 Voyager support for the new x86 setup code
Voyager support for the new x86 setup code.  This implements the same
functionality as the assembly version.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
449f2ab946 Memory probing support for the new x86 setup code
Probe memory (INT 15h: E820, E801, 88).

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
3b53d3045b MCA support for new x86 setup code
MCA probing support for the new x86 setup code.  This implements the
same functionality as the assembly version.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
d13444a5a5 EDD probing code for the new x86 setup code
Probe EDD and MBR signatures, in order to make it easier to map
physical hard drives to BIOS drives.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
31b54f40e1 CPU features verification for the new x86 setup code
Verify that the CPU has enough features to run the kernel.  This may
entail enabling features on some CPUs.

By doing this in the setup code we can be guaranteed to still be able to
write to the console through the BIOS.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
0008ea39bd Version string for the new x86 setup code
Module which only includes the kernel version string.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
1543610ad7 Console-writing code for the new x86 setup code
This implements writing text to the console, including printf().

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
e44c22f65f Command-line parsing code for the new x86 setup code
Simple command-line parser which allows us to access the kernel command
line from the setup code.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
49df18fa3f APM probing code
APM probing code for the new x86 setup code.  This implements the
same functionality as the assembly version.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
5a8a8128bc A20 handling code
A20 handling code for the new x86 setup code.  This implements the same
algorithms as the assembly version.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
5be8656615 String-handling functions for the new x86 setup code.
strcmp(), memcpy(), memset(), as well as routines to copy to and from
other segments (as pointed to by fs and gs).

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:55 -07:00
H. Peter Anvin
ad7e906d56 Simple bitops for the new x86 setup code.
A simple collection of bitops for the new x86 setup code.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
H. Peter Anvin
62bd0337d0 Top header file for new x86 setup code
Top header file for the new x86 setup code.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
H. Peter Anvin
f7f4a5fbd2 Header file to produce 16-bit code with gcc
gcc for i386 can be used with the assembly prefix ".code16gcc" to generate
16-bit (real-mode) code.  This header file provides the assembly prefix.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
H. Peter Anvin
77e1dd654b x86-64: add CONFIG_PHYSICAL_ALIGN for consistency with i386
Add CONFIG_PHYSICAL_ALIGN (currently as a hardcoded constant) to provide
consistency with i386.  This value is manifest in the bzImage header.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
H. Peter Anvin
48c7ae674f Make struct boot_params a real structure, and remove obsolete fields
Make struct boot_params a real structure, and remove the handling of
some obsolete fields, in particular hd*_info, which was only used by
the ST-506 driver, and likely to be wrong for that driver on any
modern BIOS.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
H. Peter Anvin
9c25d134b3 Make definitions for struct e820entry and struct e820map consistent
Make definitions for struct e820entry and struct e820map
consistent between i386 and x86-64.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
H. Peter Anvin
85414b693a Define zero-page offset 0x1e4 as a scratch field, and use it
The relocatable kernel code needs a scratch field for the decompressor
to determine its own location.  It was using a location inside
struct screen_info; reserve a free location and document it as scratch
instead.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
Venki Pallipadi
1d67953f2b Use a new CPU feature word to cover features that are spread around
Some Intel features are spread around in different CPUID leafs like 0x5,
0x6 and 0xA.  Make this feature detection code common across i386 and
x86_64.

Display Intel Dynamic Acceleration feature in /proc/cpuinfo. This feature
will be enabled automatically by current acpi-cpufreq driver.

Refer to Intel Software Developer's Manual for more details about the feature.

Thanks to hpa (H Peter Anvin) for the making the actual code detecting the
scattered features data-driven.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
H. Peter Anvin
de32e04175 x86 Kconfig: change X86_MINIMUM_CPU_MODEL to X86_MINIMUM_CPU_FAMILY
The X86_MINIMUM_CPU_MODEL name isn't really right, so change it to
X86_MINIMUM_CPU_FAMILY.  Also, the default minimum should be 3, not 0.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
H. Peter Anvin
ec481536b1 Unify the CPU features vectors between i386 and x86-64
Unify the handling of the CPU features vectors between i386 and x86-64.
This also adopts the collapsing of features which are required at
compile-time into constant tests from x86-64 to i386.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-12 10:55:54 -07:00
Linus Torvalds
0f166396e7 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
  [MIPS] PNX8550: Cleanup proc code.
  [MIPS] WRPPMC: Fix build.
  [MIPS] Yosemite: Fix modpost warnings.
  [MIPS] Change names of local variables to silence sparse
  [MIPS] SB1: Fix modpost warning.
  [MIPS] PNX: Fix modpost warnings.
  [MIPS] Alchemy: Fix modpost warnings.
  [MIPS] Non-FPAFF: Fix warning.
  [MIPS] DEC: Fix modpost warning.
  [MIPS] MIPSsim: Enable MIPSsim virtual network driver.
  [MIPS] Delete Ocelot 3 support.
  [MIPS] remove LASAT Networks platforms support
  [MIPS] Early check for SMTC kernel on non-MT processor
  [MIPS] Add debugfs files to show fpuemu statistics
  [MIPS] Add some debugfs files to debug unaligned accesses
  [MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
  [MIPS] tc35815: Load MAC address via platform_device
  [MIPS] Move FPU affinity code into separate file.
  [MIPS] Make ioremap() work on TX39/49 special unmapped segment
  [MIPS] rbtx4938: Update and minimize defconfig
  ...
2007-07-10 14:48:43 -07:00
Robert P. J. Day
105b1bca4d [MIPS] PNX8550: Cleanup proc code.
Here's a slightly cleaner way of creating the /proc structure for the
pnx8850.  mostly, it creates a directory with default mode 555, since the
one you're creating is mode 444, which is somewhat unusual for a directory
under /proc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:07 +01:00
Ralf Baechle
569fb7536e [MIPS] WRPPMC: Fix build.
Using another systems defines is a safe way to get your code broken by
accident when that system is removed.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:06 +01:00
Ralf Baechle
44659f29a0 [MIPS] Yosemite: Fix modpost warnings.
MODPOST vmlinux
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x974): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x980): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x978): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x984): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x98c): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x990): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:06 +01:00
Ralf Baechle
62b396358e [MIPS] SB1: Fix modpost warning.
MODPOST vmlinux
WARNING: arch/mips/mm/built-in.o(.text+0x1978): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp')
WARNING: arch/mips/mm/built-in.o(.text+0x1988): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Ralf Baechle
f2c4b47f26 [MIPS] PNX: Fix modpost warnings.
MODPOST vmlinux
WARNING: arch/mips/philips/pnx8550/common/built-in.o(.text+0xd40): Section mismatch: reference to .init.data: (after 'pnx8550_platform_init')
WARNING: arch/mips/philips/pnx8550/common/built-in.o(.text+0xd44): Section mismatch: reference to .init.data: (after 'pnx8550_platform_init')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Ralf Baechle
070c7b8611 [MIPS] Alchemy: Fix modpost warnings.
MODPOST vmlinux
WARNING: arch/mips/au1000/common/built-in.o(.text+0x1750): Section mismatch: reference to .init.data: (between 'au1xxx_platform_init' and '__fixup_bigphys_addr')
WARNING: arch/mips/au1000/common/built-in.o(.text+0x1754): Section mismatch: reference to .init.data: (between 'au1xxx_platform_init' and '__fixup_bigphys_addr')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Ralf Baechle
46cc84bf41 [MIPS] MIPSsim: Enable MIPSsim virtual network driver.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Ralf Baechle
688b3d7208 [MIPS] Delete Ocelot 3 support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Yoichi Yuasa
c99cabf034 [MIPS] remove LASAT Networks platforms support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Atsushi Nemoto
83fd38cabc [MIPS] Add debugfs files to show fpuemu statistics
Export contents of struct mips_fpu_emulator_stats via debugfs.

There is no way to read these statistics for now but they (at least
the "emulated" count) might be sometimes useful for performance tuning
on FPU-less CPUs.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Atsushi Nemoto
6312e0ee45 [MIPS] Add some debugfs files to debug unaligned accesses
Currently a number of unaligned instructions is counted but not used.
Add /debug/mips/unaligned_instructions file to show the value.

And add /debug/mips/unaligned_action to control behavior upon an
unaligned access.  Possible actions are:

0: silently fixup the unaligned access.
1: send SIGBUS.
2: dump registers, process name, etc. and fixup.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Atsushi Nemoto
2db30150fe [MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
* Fix pci ops for secondary PCIC
* Do not reserve 1MB for PCI MEM region (leave PCIBIOS_MIN_MEM zero)
* Use platform_device to provide ethernet addresses for internal NICs.
  (background: TX49XX SoCs include PCI NIC (TC35815 compatible)
  connected via its internal PCI bus, but the NIC's PROM interface is
  not connected to SEEPROM.  So we must provide its ethernet address
  by another way.)
* Check return value of early_read_config_word()

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Ralf Baechle
295cbf6d63 [MIPS] Move FPU affinity code into separate file.
Gets rid of some of the CONFIG_MIPS_MT_FPAFF #ifdefery.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Atsushi Nemoto
5ddcb3c35b [MIPS] Make ioremap() work on TX39/49 special unmapped segment
TX39XX and TX49XX have "reserved" segment in CKSEG3 area.
0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX
are reserved (unmapped, uncached).  Controllers on these SoCs are
placed in this segment.

This patch add plat_ioremap() and plat_iounmap() to override default
behavior and implement these hooks for TX39/TX49.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Atsushi Nemoto
bb33b19ff9 [MIPS] rbtx4938: Update and minimize defconfig
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Atsushi Nemoto
f74cf6ff99 [MIPS] rbtx4938: Convert SPI codes to use generic SPI drivers
Use rtc-rs5c348 and at25 spi protocol driver and spi_txx9 spi
controller driver instead of platform dependent codes.

This patch also removes dependencies to old RTC interfaces such as
rtc_mips_get_time, etc.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Atsushi Nemoto
3896b05418 [MIPS] rbtx4938: Add generic GPIO support
GPIO 0..15 are for TX4938 PIO pins, GPIO 16..18 are for FPGA-driven
chipselect signals for SPI devices.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Thomas Bogendoerfer
06cf5583fd [MIPS] SNI RM updates
- use RTC_CLASS instead of GEN_RTC
- get rid of ds1216 in favour of a RTC_CLASS driver
- use correct console device for older RM400
- use physical addresses for 82596 device
- use 128 byte L1 cache line size (this is needed because most of the
  SNI caches are using 128 L2 cache lines)

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Marc St-Jean
68bc00e311 [MIPS] PMC MSP71xx default configuration
Patch to add default configuration for the PMC-Sierra
MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Marc St-Jean
6f95e60acf [MIPS] PMC MSP71xx PCI support
Patch to add PCI support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Marc St-Jean
9267a30d1d [MIPS] PMC MSP71xx mips common
Patch to add mips common support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Marc St-Jean
35832e26f9 [MIPS] PMC MSP71xx core platform
Patch to add core platform support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Songmao Tian
42d226c724 [MIPS] New files for lemote fulong mini-PC support
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Songmao Tian <tiansm@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Fuxin Zhang
2a21c7300b [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
a36920200c [MIPS] Enable support for the userlocal hardware register
Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
d223a86154 [MIPS] FP affinity: Coding style cleanups
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00