[MIPS] New files for lemote fulong mini-PC support
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Songmao Tian <tiansm@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Songmao Tian
Ralf Baechle
parent
2a21c7300b
commit
42d226c724
19 changed files with 2931 additions and 57 deletions
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@ -15,6 +15,29 @@ choice
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prompt "System type"
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default SGI_IP22
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config LEMOTE_FULONG
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bool "Lemote Fulong mini-PC"
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select ARCH_SPARSEMEM_ENABLE
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select SYS_HAS_CPU_LOONGSON2
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select DMA_NONCOHERENT
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select BOOT_ELF32
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select BOARD_SCACHE
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select HAVE_STD_PC_SERIAL_PORT
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select HW_HAS_PCI
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select I8259
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select ISA
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select IRQ_CPU
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_64BIT_KERNEL
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_SUPPORTS_HIGHMEM
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select SYS_HAS_EARLY_PRINTK
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select GENERIC_HARDIRQS_NO__DO_IRQ
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select CPU_HAS_WB
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help
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Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
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an FPGA northbridge
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config MACH_ALCHEMY
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bool "Alchemy processor based machines"
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@ -290,6 +290,13 @@ core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
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cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
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load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
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#
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# lemote fulong mini-PC board
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#
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core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/
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load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
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cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
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#
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# For all MIPS, Inc. eval boards
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#
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1767
arch/mips/configs/fulong_defconfig
Normal file
1767
arch/mips/configs/fulong_defconfig
Normal file
File diff suppressed because it is too large
Load diff
7
arch/mips/lemote/lm2e/Makefile
Normal file
7
arch/mips/lemote/lm2e/Makefile
Normal file
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@ -0,0 +1,7 @@
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#
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# Makefile for Lemote Fulong mini-PC board.
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#
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obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o mem.o
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EXTRA_AFLAGS := $(CFLAGS)
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74
arch/mips/lemote/lm2e/bonito-irq.c
Normal file
74
arch/mips/lemote/lm2e/bonito-irq.c
Normal file
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@ -0,0 +1,74 @@
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/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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* Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
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*
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* Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/mips-boards/bonito64.h>
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static inline void bonito_irq_enable(unsigned int irq)
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{
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BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE));
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mmiowb();
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}
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static inline void bonito_irq_disable(unsigned int irq)
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{
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BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE));
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mmiowb();
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}
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static struct irq_chip bonito_irq_type = {
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.name = "bonito_irq",
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.ack = bonito_irq_disable,
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.mask = bonito_irq_disable,
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.mask_ack = bonito_irq_disable,
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.unmask = bonito_irq_enable,
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};
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static struct irqaction dma_timeout_irqaction = {
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.handler = no_action,
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.name = "dma_timeout",
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};
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void bonito_irq_init(void)
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{
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u32 i;
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for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++) {
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set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
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}
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setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction);
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}
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146
arch/mips/lemote/lm2e/dbg_io.c
Normal file
146
arch/mips/lemote/lm2e/dbg_io.c
Normal file
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@ -0,0 +1,146 @@
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/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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* Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
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*
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* Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <asm/serial.h>
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#define UART16550_BAUD_2400 2400
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#define UART16550_BAUD_4800 4800
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#define UART16550_BAUD_9600 9600
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#define UART16550_BAUD_19200 19200
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#define UART16550_BAUD_38400 38400
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#define UART16550_BAUD_57600 57600
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#define UART16550_BAUD_115200 115200
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#define UART16550_PARITY_NONE 0
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#define UART16550_PARITY_ODD 0x08
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#define UART16550_PARITY_EVEN 0x18
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#define UART16550_PARITY_MARK 0x28
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#define UART16550_PARITY_SPACE 0x38
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#define UART16550_DATA_5BIT 0x0
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#define UART16550_DATA_6BIT 0x1
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#define UART16550_DATA_7BIT 0x2
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#define UART16550_DATA_8BIT 0x3
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#define UART16550_STOP_1BIT 0x0
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#define UART16550_STOP_2BIT 0x4
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/* ----------------------------------------------------- */
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/* === CONFIG === */
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#ifdef CONFIG_64BIT
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#define BASE (0xffffffffbfd003f8)
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#else
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#define BASE (0xbfd003f8)
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#endif
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#define MAX_BAUD BASE_BAUD
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/* === END OF CONFIG === */
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#define REG_OFFSET 1
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/* register offset */
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#define OFS_RCV_BUFFER 0
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#define OFS_TRANS_HOLD 0
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#define OFS_SEND_BUFFER 0
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#define OFS_INTR_ENABLE (1*REG_OFFSET)
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#define OFS_INTR_ID (2*REG_OFFSET)
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#define OFS_DATA_FORMAT (3*REG_OFFSET)
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#define OFS_LINE_CONTROL (3*REG_OFFSET)
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#define OFS_MODEM_CONTROL (4*REG_OFFSET)
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#define OFS_RS232_OUTPUT (4*REG_OFFSET)
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#define OFS_LINE_STATUS (5*REG_OFFSET)
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#define OFS_MODEM_STATUS (6*REG_OFFSET)
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#define OFS_RS232_INPUT (6*REG_OFFSET)
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#define OFS_SCRATCH_PAD (7*REG_OFFSET)
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#define OFS_DIVISOR_LSB (0*REG_OFFSET)
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#define OFS_DIVISOR_MSB (1*REG_OFFSET)
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/* memory-mapped read/write of the port */
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#define UART16550_READ(y) readb((char *)BASE + (y))
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#define UART16550_WRITE(y, z) writeb(z, (char *)BASE + (y))
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void debugInit(u32 baud, u8 data, u8 parity, u8 stop)
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{
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u32 divisor;
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/* disable interrupts */
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UART16550_WRITE(OFS_INTR_ENABLE, 0);
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/* set up buad rate */
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/* set DIAB bit */
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UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
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/* set divisor */
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divisor = MAX_BAUD / baud;
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UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
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UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
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/* clear DIAB bit */
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UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
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/* set data format */
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UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
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}
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static int remoteDebugInitialized;
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u8 getDebugChar(void)
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{
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if (!remoteDebugInitialized) {
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remoteDebugInitialized = 1;
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debugInit(UART16550_BAUD_115200,
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UART16550_DATA_8BIT,
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UART16550_PARITY_NONE, UART16550_STOP_1BIT);
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}
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while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0) ;
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return UART16550_READ(OFS_RCV_BUFFER);
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}
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int putDebugChar(u8 byte)
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{
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if (!remoteDebugInitialized) {
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remoteDebugInitialized = 1;
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/*
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debugInit(UART16550_BAUD_115200,
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UART16550_DATA_8BIT,
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UART16550_PARITY_NONE, UART16550_STOP_1BIT); */
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}
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while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0) ;
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UART16550_WRITE(OFS_SEND_BUFFER, byte);
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return 1;
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}
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145
arch/mips/lemote/lm2e/irq.c
Normal file
145
arch/mips/lemote/lm2e/irq.c
Normal file
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@ -0,0 +1,145 @@
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/*
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* Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/irq_cpu.h>
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#include <asm/i8259.h>
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#include <asm/mipsregs.h>
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#include <asm/mips-boards/bonito64.h>
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/*
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* the first level int-handler will jump here if it is a bonito irq
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*/
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static void bonito_irqdispatch(void)
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{
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u32 int_status;
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int i;
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/* workaround the IO dma problem: let cpu looping to allow DMA finish */
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int_status = BONITO_INTISR;
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if (int_status & (1 << 10)) {
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while (int_status & (1 << 10)) {
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udelay(1);
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int_status = BONITO_INTISR;
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}
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}
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/* Get pending sources, masked by current enables */
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int_status = BONITO_INTISR & BONITO_INTEN;
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if (int_status != 0) {
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i = __ffs(int_status);
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int_status &= ~(1 << i);
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do_IRQ(BONITO_IRQ_BASE + i);
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}
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}
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static void i8259_irqdispatch(void)
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{
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int irq;
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irq = i8259_irq();
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if (irq >= 0) {
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do_IRQ(irq);
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} else {
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spurious_interrupt();
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}
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}
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
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if (pending & CAUSEF_IP7) {
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do_IRQ(MIPS_CPU_IRQ_BASE + 7);
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} else if (pending & CAUSEF_IP5) {
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i8259_irqdispatch();
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} else if (pending & CAUSEF_IP2) {
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bonito_irqdispatch();
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} else {
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spurious_interrupt();
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}
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}
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static struct irqaction cascade_irqaction = {
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.handler = no_action,
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.mask = CPU_MASK_NONE,
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.name = "cascade",
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};
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void __init arch_init_irq(void)
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{
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extern void bonito_irq_init(void);
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/*
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* Clear all of the interrupts while we change the able around a bit.
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* int-handler is not on bootstrap
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*/
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clear_c0_status(ST0_IM | ST0_BEV);
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local_irq_disable();
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/* most bonito irq should be level triggered */
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BONITO_INTEDGE = BONITO_ICU_SYSTEMERR | BONITO_ICU_MASTERERR |
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BONITO_ICU_RETRYERR | BONITO_ICU_MBOXES;
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BONITO_INTSTEER = 0;
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/*
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* Mask out all interrupt by writing "1" to all bit position in
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* the interrupt reset reg.
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*/
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BONITO_INTENCLR = ~0;
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/* init all controller
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* 0-15 ------> i8259 interrupt
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* 16-23 ------> mips cpu interrupt
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* 32-63 ------> bonito irq
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*/
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/* Sets the first-level interrupt dispatcher. */
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mips_cpu_irq_init();
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init_i8259_irqs();
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bonito_irq_init();
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/*
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printk("GPIODATA=%x, GPIOIE=%x\n", BONITO_GPIODATA, BONITO_GPIOIE);
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printk("INTEN=%x, INTSET=%x, INTCLR=%x, INTISR=%x\n",
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BONITO_INTEN, BONITO_INTENSET,
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BONITO_INTENCLR, BONITO_INTISR);
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*/
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/* bonito irq at IP2 */
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setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction);
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/* 8259 irq at IP5 */
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setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);
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}
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23
arch/mips/lemote/lm2e/mem.c
Normal file
23
arch/mips/lemote/lm2e/mem.c
Normal file
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@ -0,0 +1,23 @@
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/*
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* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
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* option) any later version.
|
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*/
|
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#include <linux/fs.h>
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#include <linux/fcntl.h>
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#include <linux/mm.h>
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|
||||
/* override of arch/mips/mm/cache.c: __uncached_access */
|
||||
int __uncached_access(struct file *file, unsigned long addr)
|
||||
{
|
||||
if (file->f_flags & O_SYNC)
|
||||
return 1;
|
||||
|
||||
/*
|
||||
* On the Lemote Loongson 2e system, the peripheral registers
|
||||
* reside between 0x1000:0000 and 0x2000:0000.
|
||||
*/
|
||||
return addr >= __pa(high_memory) ||
|
||||
((addr >= 0x10000000) && (addr < 0x20000000));
|
||||
}
|
||||
93
arch/mips/lemote/lm2e/pci.c
Normal file
93
arch/mips/lemote/lm2e/pci.c
Normal file
|
|
@ -0,0 +1,93 @@
|
|||
/*
|
||||
* pci.c
|
||||
*
|
||||
* Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
|
||||
* Author: Fuxin Zhang, zhangfx@lemote.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/mips-boards/bonito64.h>
|
||||
|
||||
extern struct pci_ops bonito64_pci_ops;
|
||||
|
||||
static struct resource loongson2e_pci_mem_resource = {
|
||||
.name = "LOONGSON2E PCI MEM",
|
||||
.start = 0x14000000UL,
|
||||
.end = 0x1fffffffUL,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct resource loongson2e_pci_io_resource = {
|
||||
.name = "LOONGSON2E PCI IO MEM",
|
||||
.start = 0x00004000UL,
|
||||
.end = IO_SPACE_LIMIT,
|
||||
.flags = IORESOURCE_IO,
|
||||
};
|
||||
|
||||
static struct pci_controller loongson2e_pci_controller = {
|
||||
.pci_ops = &bonito64_pci_ops,
|
||||
.io_resource = &loongson2e_pci_io_resource,
|
||||
.mem_resource = &loongson2e_pci_mem_resource,
|
||||
.mem_offset = 0x00000000UL,
|
||||
.io_offset = 0x00000000UL,
|
||||
};
|
||||
|
||||
static void __init ict_pcimap(void)
|
||||
{
|
||||
/*
|
||||
* local to PCI mapping: [256M,512M] -> [256M,512M]; differ from PMON
|
||||
*
|
||||
* CPU address space [256M,448M] is window for accessing pci space
|
||||
* we set pcimap_lo[0,1,2] to map it to pci space [256M,448M]
|
||||
* pcimap: bit18,pcimap_2; bit[17-12],lo2;bit[11-6],lo1;bit[5-0],lo0
|
||||
*/
|
||||
/* 1,00 0110 ,0001 01,00 0000 */
|
||||
BONITO_PCIMAP = 0x46140;
|
||||
|
||||
/* 1, 00 0010, 0000,01, 00 0000 */
|
||||
/* BONITO_PCIMAP = 0x42040; */
|
||||
|
||||
/*
|
||||
* PCI to local mapping: [2G,2G+256M] -> [0,256M]
|
||||
*/
|
||||
BONITO_PCIBASE0 = 0x80000000;
|
||||
BONITO_PCIBASE1 = 0x00800000;
|
||||
BONITO_PCIBASE2 = 0x90000000;
|
||||
|
||||
}
|
||||
|
||||
static int __init pcibios_init(void)
|
||||
{
|
||||
extern int pci_probe_only;
|
||||
pci_probe_only = 0;
|
||||
|
||||
ict_pcimap();
|
||||
register_pci_controller(&loongson2e_pci_controller);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(pcibios_init);
|
||||
104
arch/mips/lemote/lm2e/prom.c
Normal file
104
arch/mips/lemote/lm2e/prom.c
Normal file
|
|
@ -0,0 +1,104 @@
|
|||
/*
|
||||
* Based on Ocelot Linux port, which is
|
||||
* Copyright 2001 MontaVista Software Inc.
|
||||
* Author: jsun@mvista.com or jsun@junsun.net
|
||||
*
|
||||
* Copyright 2003 ICT CAS
|
||||
* Author: Michael Guo <guoyi@ict.ac.cn>
|
||||
*
|
||||
* Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
|
||||
* Author: Fuxin Zhang, zhangfx@lemote.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/bootmem.h>
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/bootinfo.h>
|
||||
|
||||
extern unsigned long bus_clock;
|
||||
extern unsigned long cpu_clock;
|
||||
extern unsigned int memsize, highmemsize;
|
||||
extern int putDebugChar(unsigned char byte);
|
||||
|
||||
static int argc;
|
||||
/* pmon passes arguments in 32bit pointers */
|
||||
static int *arg;
|
||||
static int *env;
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "lemote-fulong";
|
||||
}
|
||||
|
||||
void __init prom_init_cmdline(void)
|
||||
{
|
||||
int i;
|
||||
long l;
|
||||
|
||||
/* arg[0] is "g", the rest is boot parameters */
|
||||
arcs_cmdline[0] = '\0';
|
||||
for (i = 1; i < argc; i++) {
|
||||
l = (long)arg[i];
|
||||
if (strlen(arcs_cmdline) + strlen(((char *)l) + 1)
|
||||
>= sizeof(arcs_cmdline))
|
||||
break;
|
||||
strcat(arcs_cmdline, ((char *)l));
|
||||
strcat(arcs_cmdline, " ");
|
||||
}
|
||||
}
|
||||
|
||||
void __init prom_init(void)
|
||||
{
|
||||
long l;
|
||||
argc = fw_arg0;
|
||||
arg = (int *)fw_arg1;
|
||||
env = (int *)fw_arg2;
|
||||
|
||||
mips_machgroup = MACH_GROUP_LEMOTE;
|
||||
mips_machtype = MACH_LEMOTE_FULONG;
|
||||
|
||||
prom_init_cmdline();
|
||||
|
||||
if ((strstr(arcs_cmdline, "console=")) == NULL)
|
||||
strcat(arcs_cmdline, " console=ttyS0,115200");
|
||||
if ((strstr(arcs_cmdline, "root=")) == NULL)
|
||||
strcat(arcs_cmdline, " root=/dev/hda1");
|
||||
|
||||
#define parse_even_earlier(res, option, p) \
|
||||
do { \
|
||||
if (strncmp(option, (char *)p, strlen(option)) == 0) \
|
||||
res = simple_strtol((char *)p + strlen(option"="), \
|
||||
NULL, 10); \
|
||||
} while (0)
|
||||
|
||||
l = (long)*env;
|
||||
while (l != 0) {
|
||||
parse_even_earlier(bus_clock, "busclock", l);
|
||||
parse_even_earlier(cpu_clock, "cpuclock", l);
|
||||
parse_even_earlier(memsize, "memsize", l);
|
||||
parse_even_earlier(highmemsize, "highmemsize", l);
|
||||
env++;
|
||||
l = (long)*env;
|
||||
}
|
||||
if (memsize == 0)
|
||||
memsize = 256;
|
||||
|
||||
pr_info("busclock=%ld, cpuclock=%ld,memsize=%d,highmemsize=%d\n",
|
||||
bus_clock, cpu_clock, memsize, highmemsize);
|
||||
}
|
||||
|
||||
void __init prom_free_prom_memory(void)
|
||||
{
|
||||
}
|
||||
|
||||
void prom_putchar(char c)
|
||||
{
|
||||
putDebugChar(c);
|
||||
}
|
||||
41
arch/mips/lemote/lm2e/reset.c
Normal file
41
arch/mips/lemote/lm2e/reset.c
Normal file
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
|
||||
* Author: Fuxin Zhang, zhangfx@lemote.com
|
||||
*/
|
||||
#include <linux/pm.h>
|
||||
|
||||
#include <asm/reboot.h>
|
||||
|
||||
static void loongson2e_restart(char *command)
|
||||
{
|
||||
#ifdef CONFIG_32BIT
|
||||
*(unsigned long *)0xbfe00104 &= ~(1 << 2);
|
||||
*(unsigned long *)0xbfe00104 |= (1 << 2);
|
||||
#else
|
||||
*(unsigned long *)0xffffffffbfe00104 &= ~(1 << 2);
|
||||
*(unsigned long *)0xffffffffbfe00104 |= (1 << 2);
|
||||
#endif
|
||||
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
|
||||
}
|
||||
|
||||
static void loongson2e_halt(void)
|
||||
{
|
||||
while (1) ;
|
||||
}
|
||||
|
||||
static void loongson2e_power_off(void)
|
||||
{
|
||||
loongson2e_halt();
|
||||
}
|
||||
|
||||
void mips_reboot_setup(void)
|
||||
{
|
||||
_machine_restart = loongson2e_restart;
|
||||
_machine_halt = loongson2e_halt;
|
||||
pm_power_off = loongson2e_power_off;
|
||||
}
|
||||
134
arch/mips/lemote/lm2e/setup.c
Normal file
134
arch/mips/lemote/lm2e/setup.c
Normal file
|
|
@ -0,0 +1,134 @@
|
|||
/*
|
||||
* BRIEF MODULE DESCRIPTION
|
||||
* setup.c - board dependent boot routines
|
||||
*
|
||||
* Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
|
||||
* Author: Fuxin Zhang, zhangfx@lemote.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mc146818rtc.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/mc146818-time.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/wbflush.h>
|
||||
|
||||
#ifdef CONFIG_VT
|
||||
#include <linux/console.h>
|
||||
#include <linux/screen_info.h>
|
||||
#endif
|
||||
|
||||
extern void mips_reboot_setup(void);
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p)))
|
||||
#else
|
||||
#define PTR_PAD(p) (p)
|
||||
#endif
|
||||
|
||||
unsigned long cpu_clock;
|
||||
unsigned long bus_clock;
|
||||
unsigned int memsize;
|
||||
unsigned int highmemsize = 0;
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
setup_irq(MIPS_CPU_IRQ_BASE + 7, irq);
|
||||
}
|
||||
|
||||
static void __init loongson2e_time_init(void)
|
||||
{
|
||||
/* setup mips r4k timer */
|
||||
mips_hpt_frequency = cpu_clock / 2;
|
||||
}
|
||||
|
||||
static unsigned long __init mips_rtc_get_time(void)
|
||||
{
|
||||
return mc146818_get_cmos_time();
|
||||
}
|
||||
|
||||
void (*__wbflush)(void);
|
||||
EXPORT_SYMBOL(__wbflush);
|
||||
|
||||
static void wbflush_loongson2e(void)
|
||||
{
|
||||
asm(".set\tpush\n\t"
|
||||
".set\tnoreorder\n\t"
|
||||
".set mips3\n\t"
|
||||
"sync\n\t"
|
||||
"nop\n\t"
|
||||
".set\tpop\n\t"
|
||||
".set mips0\n\t");
|
||||
}
|
||||
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
set_io_port_base(PTR_PAD(0xbfd00000));
|
||||
|
||||
mips_reboot_setup();
|
||||
|
||||
board_time_init = loongson2e_time_init;
|
||||
rtc_mips_get_time = mips_rtc_get_time;
|
||||
|
||||
__wbflush = wbflush_loongson2e;
|
||||
|
||||
add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM);
|
||||
#ifdef CONFIG_64BIT
|
||||
if (highmemsize > 0) {
|
||||
add_memory_region(0x20000000, highmemsize << 20, BOOT_MEM_RAM);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VT
|
||||
#if defined(CONFIG_VGA_CONSOLE)
|
||||
conswitchp = &vga_con;
|
||||
|
||||
screen_info = (struct screen_info) {
|
||||
0, 25, /* orig-x, orig-y */
|
||||
0, /* unused */
|
||||
0, /* orig-video-page */
|
||||
0, /* orig-video-mode */
|
||||
80, /* orig-video-cols */
|
||||
0, 0, 0, /* ega_ax, ega_bx, ega_cx */
|
||||
25, /* orig-video-lines */
|
||||
VIDEO_TYPE_VGAC, /* orig-video-isVGA */
|
||||
16 /* orig-video-points */
|
||||
};
|
||||
#elif defined(CONFIG_DUMMY_CONSOLE)
|
||||
conswitchp = &dummy_con;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
}
|
||||
|
|
@ -28,6 +28,7 @@ obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
|
|||
obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
|
||||
obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
|
||||
obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o
|
||||
obj-$(CONFIG_LEMOTE_FULONG) += fixup-lm2e.o ops-bonito64.o
|
||||
obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
|
||||
obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o
|
||||
obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o
|
||||
|
|
|
|||
242
arch/mips/pci/fixup-lm2e.c
Normal file
242
arch/mips/pci/fixup-lm2e.c
Normal file
|
|
@ -0,0 +1,242 @@
|
|||
/*
|
||||
* fixup-lm2e.c
|
||||
*
|
||||
* Copyright (C) 2004 ICT CAS
|
||||
* Author: Li xiaoyu, ICT CAS
|
||||
* lixy@ict.ac.cn
|
||||
*
|
||||
* Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
|
||||
* Author: Fuxin Zhang, zhangfx@lemote.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
#include <asm/mips-boards/bonito64.h>
|
||||
|
||||
/* South bridge slot number is set by the pci probe process */
|
||||
static u8 sb_slot = 5;
|
||||
|
||||
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq = 0;
|
||||
|
||||
if (slot == sb_slot) {
|
||||
switch (PCI_FUNC(dev->devfn)) {
|
||||
case 2:
|
||||
irq = 10;
|
||||
break;
|
||||
case 3:
|
||||
irq = 11;
|
||||
break;
|
||||
case 5:
|
||||
irq = 9;
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
irq = BONITO_IRQ_BASE + 25 + pin;
|
||||
}
|
||||
return irq;
|
||||
|
||||
}
|
||||
|
||||
/* Do platform specific device initialization at pci_enable_device() time */
|
||||
int pcibios_plat_dev_init(struct pci_dev *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __init loongson2e_nec_fixup(struct pci_dev *pdev)
|
||||
{
|
||||
unsigned int val;
|
||||
|
||||
/* Configues port 1, 2, 3, 4 to be validate*/
|
||||
pci_read_config_dword(pdev, 0xe0, &val);
|
||||
pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x4);
|
||||
|
||||
/* System clock is 48-MHz Oscillator. */
|
||||
pci_write_config_dword(pdev, 0xe4, 1 << 5);
|
||||
}
|
||||
|
||||
static void __init loongson2e_686b_func0_fixup(struct pci_dev *pdev)
|
||||
{
|
||||
unsigned char c;
|
||||
|
||||
sb_slot = PCI_SLOT(pdev->devfn);
|
||||
|
||||
printk(KERN_INFO "via686b fix: ISA bridge\n");
|
||||
|
||||
/* Enable I/O Recovery time */
|
||||
pci_write_config_byte(pdev, 0x40, 0x08);
|
||||
|
||||
/* Enable ISA refresh */
|
||||
pci_write_config_byte(pdev, 0x41, 0x01);
|
||||
|
||||
/* disable ISA line buffer */
|
||||
pci_write_config_byte(pdev, 0x45, 0x00);
|
||||
|
||||
/* Gate INTR, and flush line buffer */
|
||||
pci_write_config_byte(pdev, 0x46, 0xe0);
|
||||
|
||||
/* Disable PCI Delay Transaction, Enable EISA ports 4D0/4D1. */
|
||||
/* pci_write_config_byte(pdev, 0x47, 0x20); */
|
||||
|
||||
/*
|
||||
* enable PCI Delay Transaction, Enable EISA ports 4D0/4D1.
|
||||
* enable time-out timer
|
||||
*/
|
||||
pci_write_config_byte(pdev, 0x47, 0xe6);
|
||||
|
||||
/*
|
||||
* enable level trigger on pci irqs: 9,10,11,13
|
||||
* important! without this PCI interrupts won't work
|
||||
*/
|
||||
outb(0x2e, 0x4d1);
|
||||
|
||||
/* 512 K PCI Decode */
|
||||
pci_write_config_byte(pdev, 0x48, 0x01);
|
||||
|
||||
/* Wait for PGNT before grant to ISA Master/DMA */
|
||||
pci_write_config_byte(pdev, 0x4a, 0x84);
|
||||
|
||||
/*
|
||||
* Plug'n'Play
|
||||
*
|
||||
* Parallel DRQ 3, Floppy DRQ 2 (default)
|
||||
*/
|
||||
pci_write_config_byte(pdev, 0x50, 0x0e);
|
||||
|
||||
/*
|
||||
* IRQ Routing for Floppy and Parallel port
|
||||
*
|
||||
* IRQ 6 for floppy, IRQ 7 for parallel port
|
||||
*/
|
||||
pci_write_config_byte(pdev, 0x51, 0x76);
|
||||
|
||||
/* IRQ Routing for serial ports (take IRQ 3 and 4) */
|
||||
pci_write_config_byte(pdev, 0x52, 0x34);
|
||||
|
||||
/* All IRQ's level triggered. */
|
||||
pci_write_config_byte(pdev, 0x54, 0x00);
|
||||
|
||||
/* route PIRQA-D irq */
|
||||
pci_write_config_byte(pdev, 0x55, 0x90); /* bit 7-4, PIRQA */
|
||||
pci_write_config_byte(pdev, 0x56, 0xba); /* bit 7-4, PIRQC; */
|
||||
/* 3-0, PIRQB */
|
||||
pci_write_config_byte(pdev, 0x57, 0xd0); /* bit 7-4, PIRQD */
|
||||
|
||||
/* enable function 5/6, audio/modem */
|
||||
pci_read_config_byte(pdev, 0x85, &c);
|
||||
c &= ~(0x3 << 2);
|
||||
pci_write_config_byte(pdev, 0x85, c);
|
||||
|
||||
printk(KERN_INFO"via686b fix: ISA bridge done\n");
|
||||
}
|
||||
|
||||
static void __init loongson2e_686b_func1_fixup(struct pci_dev *pdev)
|
||||
{
|
||||
printk(KERN_INFO"via686b fix: IDE\n");
|
||||
|
||||
/* Modify IDE controller setup */
|
||||
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 48);
|
||||
pci_write_config_byte(pdev, PCI_COMMAND,
|
||||
PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
|
||||
PCI_COMMAND_MASTER);
|
||||
pci_write_config_byte(pdev, 0x40, 0x0b);
|
||||
/* legacy mode */
|
||||
pci_write_config_byte(pdev, 0x42, 0x09);
|
||||
|
||||
#if 1/* play safe, otherwise we may see notebook's usb keyboard lockup */
|
||||
/* disable read prefetch/write post buffers */
|
||||
pci_write_config_byte(pdev, 0x41, 0x02);
|
||||
|
||||
/* use 3/4 as fifo thresh hold */
|
||||
pci_write_config_byte(pdev, 0x43, 0x0a);
|
||||
pci_write_config_byte(pdev, 0x44, 0x00);
|
||||
|
||||
pci_write_config_byte(pdev, 0x45, 0x00);
|
||||
#else
|
||||
pci_write_config_byte(pdev, 0x41, 0xc2);
|
||||
pci_write_config_byte(pdev, 0x43, 0x35);
|
||||
pci_write_config_byte(pdev, 0x44, 0x1c);
|
||||
|
||||
pci_write_config_byte(pdev, 0x45, 0x10);
|
||||
#endif
|
||||
|
||||
printk(KERN_INFO"via686b fix: IDE done\n");
|
||||
}
|
||||
|
||||
static void __init loongson2e_686b_func2_fixup(struct pci_dev *pdev)
|
||||
{
|
||||
/* irq routing */
|
||||
pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
|
||||
}
|
||||
|
||||
static void __init loongson2e_686b_func3_fixup(struct pci_dev *pdev)
|
||||
{
|
||||
/* irq routing */
|
||||
pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
|
||||
}
|
||||
|
||||
static void __init loongson2e_686b_func5_fixup(struct pci_dev *pdev)
|
||||
{
|
||||
unsigned int val;
|
||||
unsigned char c;
|
||||
|
||||
/* enable IO */
|
||||
pci_write_config_byte(pdev, PCI_COMMAND,
|
||||
PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
|
||||
PCI_COMMAND_MASTER);
|
||||
pci_read_config_dword(pdev, 0x4, &val);
|
||||
pci_write_config_dword(pdev, 0x4, val | 1);
|
||||
|
||||
/* route ac97 IRQ */
|
||||
pci_write_config_byte(pdev, 0x3c, 9);
|
||||
|
||||
pci_read_config_byte(pdev, 0x8, &c);
|
||||
|
||||
/* link control: enable link & SGD PCM output */
|
||||
pci_write_config_byte(pdev, 0x41, 0xcc);
|
||||
|
||||
/* disable game port, FM, midi, sb, enable write to reg2c-2f */
|
||||
pci_write_config_byte(pdev, 0x42, 0x20);
|
||||
|
||||
/* we are using Avance logic codec */
|
||||
pci_write_config_word(pdev, 0x2c, 0x1005);
|
||||
pci_write_config_word(pdev, 0x2e, 0x4710);
|
||||
pci_read_config_dword(pdev, 0x2c, &val);
|
||||
|
||||
pci_write_config_byte(pdev, 0x42, 0x0);
|
||||
}
|
||||
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686,
|
||||
loongson2e_686b_func0_fixup);
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
|
||||
loongson2e_686b_func1_fixup);
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2,
|
||||
loongson2e_686b_func2_fixup);
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3,
|
||||
loongson2e_686b_func3_fixup);
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5,
|
||||
loongson2e_686b_func5_fixup);
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
|
||||
loongson2e_nec_fixup);
|
||||
|
|
@ -29,83 +29,60 @@
|
|||
#define PCI_ACCESS_READ 0
|
||||
#define PCI_ACCESS_WRITE 1
|
||||
|
||||
/*
|
||||
* PCI configuration cycle AD bus definition
|
||||
*/
|
||||
/* Type 0 */
|
||||
#define PCI_CFG_TYPE0_REG_SHF 0
|
||||
#define PCI_CFG_TYPE0_FUNC_SHF 8
|
||||
#ifdef CONFIG_LEMOTE_FULONG
|
||||
#define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(BONITO_PCICFG_BASE | (offset))
|
||||
#define ID_SEL_BEGIN 11
|
||||
#else
|
||||
#define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset))
|
||||
#define ID_SEL_BEGIN 10
|
||||
#endif
|
||||
#define MAX_DEV_NUM (31 - ID_SEL_BEGIN)
|
||||
|
||||
/* Type 1 */
|
||||
#define PCI_CFG_TYPE1_REG_SHF 0
|
||||
#define PCI_CFG_TYPE1_FUNC_SHF 8
|
||||
#define PCI_CFG_TYPE1_DEV_SHF 11
|
||||
#define PCI_CFG_TYPE1_BUS_SHF 16
|
||||
|
||||
static int bonito64_pcibios_config_access(unsigned char access_type,
|
||||
struct pci_bus *bus,
|
||||
unsigned int devfn, int where,
|
||||
u32 * data)
|
||||
{
|
||||
unsigned char busnum = bus->number;
|
||||
u32 busnum = bus->number;
|
||||
u32 addr, type;
|
||||
u32 dummy;
|
||||
u64 pci_addr;
|
||||
|
||||
/* Algorithmics Bonito64 system controller. */
|
||||
|
||||
if ((busnum == 0) && (PCI_SLOT(devfn) > 21)) {
|
||||
/* We number bus 0 devices from 0..21 */
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Clear cause register bits */
|
||||
BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
|
||||
BONITO_PCICMD_MTABORT_CLR);
|
||||
|
||||
/*
|
||||
* Setup pattern to be used as PCI "address" for
|
||||
* Type 0 cycle
|
||||
*/
|
||||
if (busnum == 0) {
|
||||
/* IDSEL */
|
||||
pci_addr = (u64) 1 << (PCI_SLOT(devfn) + 10);
|
||||
} else {
|
||||
/* Bus number */
|
||||
pci_addr = busnum << PCI_CFG_TYPE1_BUS_SHF;
|
||||
|
||||
/* Device number */
|
||||
pci_addr |=
|
||||
PCI_SLOT(devfn) << PCI_CFG_TYPE1_DEV_SHF;
|
||||
}
|
||||
|
||||
/* Function (same for Type 0/1) */
|
||||
pci_addr |= PCI_FUNC(devfn) << PCI_CFG_TYPE0_FUNC_SHF;
|
||||
|
||||
/* Register number (same for Type 0/1) */
|
||||
pci_addr |= (where & ~0x3) << PCI_CFG_TYPE0_REG_SHF;
|
||||
void *addrp;
|
||||
int device = PCI_SLOT(devfn);
|
||||
int function = PCI_FUNC(devfn);
|
||||
int reg = where & ~3;
|
||||
|
||||
if (busnum == 0) {
|
||||
/* Type 0 */
|
||||
BONITO_PCIMAP_CFG = pci_addr >> 16;
|
||||
/* Type 0 configuration for onboard PCI bus */
|
||||
if (device > MAX_DEV_NUM)
|
||||
return -1;
|
||||
|
||||
addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg;
|
||||
type = 0;
|
||||
} else {
|
||||
/* Type 1 */
|
||||
BONITO_PCIMAP_CFG = (pci_addr >> 16) | 0x10000;
|
||||
/* Type 1 configuration for offboard PCI bus */
|
||||
addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
|
||||
type = 0x10000;
|
||||
}
|
||||
|
||||
pci_addr &= 0xffff;
|
||||
/* Clear aborts */
|
||||
BONITO_PCICMD |= BONITO_PCICMD_MABORT_CLR | BONITO_PCICMD_MTABORT_CLR;
|
||||
|
||||
BONITO_PCIMAP_CFG = (addr >> 16) | type;
|
||||
|
||||
/* Flush Bonito register block */
|
||||
dummy = BONITO_PCIMAP_CFG;
|
||||
iob(); /* sync */
|
||||
mmiowb();
|
||||
|
||||
/* Perform access */
|
||||
addrp = CFG_SPACE_REG(addr & 0xffff);
|
||||
if (access_type == PCI_ACCESS_WRITE) {
|
||||
*(volatile u32 *) (_pcictrl_bonito_pcicfg + (u32)pci_addr) = *(u32 *) data;
|
||||
|
||||
writel(cpu_to_le32(*data), addrp);
|
||||
#ifndef CONFIG_LEMOTE_FULONG
|
||||
/* Wait till done */
|
||||
while (BONITO_PCIMSTAT & 0xF);
|
||||
#endif
|
||||
} else {
|
||||
*(u32 *) data = *(volatile u32 *) (_pcictrl_bonito_pcicfg + (u32)pci_addr);
|
||||
*data = le32_to_cpu(readl(addrp));
|
||||
}
|
||||
|
||||
/* Detect Master/Target abort */
|
||||
|
|
@ -121,6 +98,7 @@ static int bonito64_pcibios_config_access(unsigned char access_type,
|
|||
}
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -207,6 +207,12 @@
|
|||
#define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */
|
||||
#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
|
||||
|
||||
/*
|
||||
* Valid machtype for group LEMOTE
|
||||
*/
|
||||
#define MACH_GROUP_LEMOTE 27
|
||||
#define MACH_LEMOTE_FULONG 0
|
||||
|
||||
#define CL_SIZE COMMAND_LINE_SIZE
|
||||
|
||||
const char *get_system_type(void);
|
||||
|
|
|
|||
42
include/asm-mips/mach-lemote/dma-coherence.h
Normal file
42
include/asm-mips/mach-lemote/dma-coherence.h
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2006, 07 Ralf Baechle <ralf@linux-mips.org>
|
||||
* Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
|
||||
* Author: Fuxin Zhang, zhangfx@lemote.com
|
||||
*
|
||||
*/
|
||||
#ifndef __ASM_MACH_LEMOTE_DMA_COHERENCE_H
|
||||
#define __ASM_MACH_LEMOTE_DMA_COHERENCE_H
|
||||
|
||||
struct device;
|
||||
|
||||
static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
|
||||
size_t size)
|
||||
{
|
||||
return virt_to_phys(addr) | 0x80000000;
|
||||
}
|
||||
|
||||
static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
|
||||
struct page *page)
|
||||
{
|
||||
return page_to_phys(page) | 0x80000000;
|
||||
}
|
||||
|
||||
static inline unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
|
||||
{
|
||||
return dma_addr & 0x7fffffff;
|
||||
}
|
||||
|
||||
static inline void plat_unmap_dma_mem(dma_addr_t dma_addr)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int plat_device_is_coherent(struct device *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* __ASM_MACH_LEMOTE_DMA_COHERENCE_H */
|
||||
36
include/asm-mips/mach-lemote/mc146818rtc.h
Normal file
36
include/asm-mips/mach-lemote/mc146818rtc.h
Normal file
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 1998, 2001, 03, 07 by Ralf Baechle (ralf@linux-mips.org)
|
||||
*
|
||||
* RTC routines for PC style attached Dallas chip.
|
||||
*/
|
||||
#ifndef __ASM_MACH_LEMOTE_MC146818RTC_H
|
||||
#define __ASM_MACH_LEMOTE_MC146818RTC_H
|
||||
|
||||
#include <linux/io.h>
|
||||
|
||||
#define RTC_PORT(x) (0x70 + (x))
|
||||
#define RTC_IRQ 8
|
||||
|
||||
static inline unsigned char CMOS_READ(unsigned long addr)
|
||||
{
|
||||
outb_p(addr, RTC_PORT(0));
|
||||
return inb_p(RTC_PORT(1));
|
||||
}
|
||||
|
||||
static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
|
||||
{
|
||||
outb_p(addr, RTC_PORT(0));
|
||||
outb_p(data, RTC_PORT(1));
|
||||
}
|
||||
|
||||
#define RTC_ALWAYS_BCD 0
|
||||
|
||||
#ifndef mc146818_decode_year
|
||||
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_MACH_LEMOTE_MC146818RTC_H */
|
||||
|
|
@ -26,7 +26,12 @@
|
|||
/* offsets from base register */
|
||||
#define BONITO(x) (x)
|
||||
|
||||
#else /* !__ASSEMBLY__ */
|
||||
#elif defined(CONFIG_LEMOTE_FULONG)
|
||||
|
||||
#define BONITO(x) (*(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x)))
|
||||
#define BONITO_IRQ_BASE 32
|
||||
|
||||
#else
|
||||
|
||||
/*
|
||||
* Algorithmics Bonito64 system controller register base.
|
||||
|
|
|
|||
Loading…
Reference in a new issue