This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which
allows to disable usage of builtin flash-type table. Not enabling this
option saves some space in the generated driver.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The TMIO chips are only found (and thus tested) on ARM machines.
Moreover, we don't want the TMIO cells to be built if one of the TMIO
driver is not selected (which indirectly make the TMIO cells drivers
depend on ARM as well).
Signed-off-by: Samuel Ortiz <sameo@openedhand.com>
This patch adds support for the NAND controller commonly found in
TMIO based MFDs.
Signed-off-by: Ian Molton <spyro@f2s.com>
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Samuel Ortiz <sameo@openedhand.com>
This was a reference board for which support never got merged upstream.
Kill it off, at rmk's suggestion.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
There's no reason to prevent the Atmel NAND driver from
building as a module.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Make the atmel_nand driver selectable on AVR32, and update the Kconfig
help text to reflect this.
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The AT91 NAND driver needs just a few tiny modifications to work on
AVR32 as well. Rename it atmel_nand to reflect this.
Also move the ECC register definitions into drivers/mtd/nand since they
are only useful to the atmel_nand driver, and get rid of the useless
filename at the top of each file.
Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Once upon a time, the MTD repository was using CVS.
This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.
This also includes code that printed them to the user.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is a patch to use the hardware ECC controller of
the AT91SAM9260 and AT91SAM9263 for the AT91 nand.
On AT91 NAND, there's now a choice between ECC soft,
ECC hard or no ECC (for debug).
It has been tested on AT91SAM9263 with 8 bits large
and small page NAND.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is very simple driver, NAND is connected through localbus,
and User-Programmable Machine is doing various adjustments to
speak NAND. No special efforts needed to do read and write cycles,
though to control ALE and CLE phases, we ask UPM to generate exact
pre-programmed signals on the localbus lines.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is preliminary since:
1. It supports only _one_ chip select at the moment. As there is no
existing platforms available using two chip selects of the NAND
controller, it shall really not include code for supporting the
2nd chip select for now, as such code cannot be verified.
2. It resorts to the default and simpliest memory based badblock
table
3. Only limited types of nand flash are currently supported. Most
PXA3xx processors come with on-chip NAND flash dies, so there
isn't much flexibility for other types of NAND.
4. The NAND controller should be configured to detect the device's
ID, thus making it difficult to use nand_scan_ident() to assist
the detection process (though it's not impossible)
TODO: fix all the above limitations of cuz :-)
Signed-off-by: eric miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Driver for the device bus NAND controller in the Marvell Orion family
of ARM SoCs.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Jörn Engel <joern@logfs.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Plumbing for NAND connected via localbus on PA Semi PWRficient-based
boards.
From: Egor Martovetsky <egor@pasemi.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is the driver for latest Blackfin on-chip nand flash controller
- use nand_chip and mtd_info common nand driver interface
- provide both PIO and dma operation
- compiled with ezkit bf548 configuration
- use hardware 1-bit ECC
- tested with YAFFS2 and can mount YAFFS2 filesystem as rootfs
ChangeLog from try#1
- use hweight32() instead of count_bits()
- replace bf54x with bf5xx and BF54X with BF5XX
- compare against plat->page_size in 2 cases when enable hardware ECC
ChangeLog from try#2
- passed nand_test suites
- use cpu_relax() instead of busy wait loop
- some coding style issue pointed out by Andrew
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Unlike most stuff on the market the chip inside these two allows raw
flash access and doesn't implement and FTL, leaving that functionality
to the device driver.
Raw flash access in a cheap USB cardreader! An MTD test device one can
attach to a PC! What a deal!
The command set of the chip is not documented, so information was
obtained from the existing mass-storage driver
(drivers/usb/storage/alauda.c), its documentation
(http://alauda.sourceforge.net/wikka.php?wakka=BulkCommandReference),
additional reverse engineering and comparison with a vendor driver for a
related chip
(http://www.ratocsystems.com/english/download/driver/linux/sma03u.html).
Signed-off-by: Joern Engel <joern@logfs.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
These drivers are specific to 4xx support in arch/ppc at the moment. Make
sure they don't get built on arch/powerpc.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The price might drop to $100 in a few years.
But currently, a more reasonable name might be "$175 laptop".
Let's simply call it "OLPC laptop" without any price tag.
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This patch adds 405 platform support to the 440 NDFC driver. The new
AMCC 405EZ PPC is equipped with the same NDFC core as the 440EP(x)
and other will follow soon.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This patch adds support for generic platform NAND driver.
Updated after tglx's review/discussion in IRC #mtd channel.
Signed-off-by: Vitaly Wool <vitalywool@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This patch provides MTD support for NAND flash devices on CM-x270 modules.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Use menuconfigs instead of menus, so the whole menu can be disabled at once
instead of going through all options.
Signed-off-by: Jan Engelhardt <jengelh@gmx.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The support for obsolete ancient NAND chips adds .data size and one
of the old ids conflicts with a modern one. Make the support for
such chips depending on a config option.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This is a nand flash driver for the eXcite series of intelligent
cameras manufactured by Basler Vision Technologies AG.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Add support for correcting errors detected by the
hardware ECC.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Select MTD_NAND_ECC_SMC (ECC byte order according to the Smart Media
Specification) if MTD_NAND_NDFC is used.
Using the wrong byte order causes fatal, unnoticed data damage.
For further information see:
http://lists.infradead.org/pipermail/linux-mtd/2006-November/016920.html
Signed-off-by: Timo Lindhorst <lindhors@linux.vnet.ibm.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This patch converts drivers/mtd/nand/rtc_from4.c to use the new
lib/bitrev.c
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This version only differs from version posted by Savin Zlobec (20 Jun
2006) in that the AT91RM9200-specific chip-select / bus setup code has
been moved from the at91_nand.c driver into the processor-specific file.
From: Savin Zlobec <savin@epico.si>
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
PCI is faked on these devices by SMM traps. Don't depend on that --
check for the chipset directly instead.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Unrolling the loops produces denser and much faster code.
Add a config switch which allows to select the byte order of the
resulting ecc code. The current Linux implementation has a byte
swap versus the SmartMedia specification
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The patch below adds support for the NAND device on the Amstrad Delta.
This is a 32MiB 8bit Toshiba device, with the data bus connected to the
OMAP MPUIO pins and ALE, CLE, NCE, NRE, NWE and NWP all connected to the
Delta's latch2 16bit latch.
Signed-Off-By: Jonathan McDowell <noodles@earth.li>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
