Techwizz/kernel-fxtec-pro1x
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18 commits

Author SHA1 Message Date
Ralf Baechle
fc5d2d279f [MIPS] Use the proper technical term for naming some of the cache macros. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-07-13 21:26:04 +01:00
Kumba
44d921b246 [MIPS] Treat R14000 like R10000. 
Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-06-01 00:28:35 +01:00
Chris Dearman
c620953c32 [MIPS] Fix detection and handling of the 74K processor. 
Nothing exciting; Linux just didn't know it yet so this is most adding
a value to a case statement.
    
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-06-01 00:28:30 +01:00
Maciej W. Rozycki
9cf8ff9644 [MIPS] Fix CPU type bitmasks for MIPS III, IV and V. 
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-02-14 19:13:25 +00:00
Ralf Baechle
0401572a9b MIPS: Reorganize ISA constants strictly as bitmasks. 
Signed-off-by: Ralf Baechle <ralf@ongar.mips.com>
 2006-01-10 13:39:07 +00:00
Ralf Baechle
b4672d3729 MIPS: Introduce machinery for testing for MIPSxxR1/2. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-01-10 13:39:06 +00:00
Ralf Baechle
e7958bb90d MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-01-10 13:39:06 +00:00
Andrew Isaacson
93ce2f524e Add support for SB1A CPU. 
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:32:46 +01:00
Ralf Baechle
02cf211968 Cleanup the mess in cpu_cache_init. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:32:32 +01:00
Maciej W. Rozycki
98e316d4b1 Move MIPS Technologies processor IDs to where they belong. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:32:16 +01:00
Pete Popov
bdf21b18b4 Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:54 +01:00
Ralf Baechle
8f40611d2b Detect the MIPS R2 vectored interrupt, external interrupt controller 
options and the precense of the MT ASE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:51 +01:00
Ralf Baechle
bbc7f22f6d Detect the 34K. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:45 +01:00
Ralf Baechle
e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:17 +01:00
Ralf Baechle
4194318c39 Cleanup decoding of MIPSxx config registers. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:12 +01:00
Pete Popov
e3ad1c23ba Base Au1200 2.6 support. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:30:47 +01:00
Ralf Baechle
55a6feb671 Add a few more PrId vendor IDs. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:30:29 +01:00
Linus Torvalds
1da177e4c3 Linux-2.6.12-rc2 
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
 2005-04-16 15:20:36 -07:00