a3e72cd297
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
67 lines
2.1 KiB
C
67 lines
2.1 KiB
C
/*
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* Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/irq_cpu.h>
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#include <bcm47xx.h>
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void plat_irq_dispatch(void)
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{
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u32 cause;
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cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
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clear_c0_status(cause);
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if (cause & CAUSEF_IP7)
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do_IRQ(7);
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if (cause & CAUSEF_IP2)
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do_IRQ(2);
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if (cause & CAUSEF_IP3)
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do_IRQ(3);
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if (cause & CAUSEF_IP4)
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do_IRQ(4);
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if (cause & CAUSEF_IP5)
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do_IRQ(5);
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if (cause & CAUSEF_IP6)
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do_IRQ(6);
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}
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void __init arch_init_irq(void)
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{
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#ifdef CONFIG_BCM47XX_BCMA
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if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
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bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
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BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
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/*
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* the kernel reads the timer irq from some register and thinks
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* it's #5, but we offset it by 2 and route to #7
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*/
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cp0_compare_irq = 7;
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}
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#endif
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mips_cpu_irq_init();
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}
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