bcm47xx: fix irq assignment for new SoCs.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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1 changed files with 12 additions and 0 deletions
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@ -26,6 +26,7 @@
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/irq_cpu.h>
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#include <bcm47xx.h>
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void plat_irq_dispatch(void)
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{
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@ -51,5 +52,16 @@ void plat_irq_dispatch(void)
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void __init arch_init_irq(void)
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{
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#ifdef CONFIG_BCM47XX_BCMA
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if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
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bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
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BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
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/*
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* the kernel reads the timer irq from some register and thinks
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* it's #5, but we offset it by 2 and route to #7
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*/
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cp0_compare_irq = 7;
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}
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#endif
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mips_cpu_irq_init();
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}
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