ff2e27ae0b
Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
||
---|---|---|
.. | ||
arm_timer.h | ||
cache-l2x0.h | ||
cache-tauros2.h | ||
clps7111.h | ||
coresight.h | ||
cs89712.h | ||
debug-8250.S | ||
debug-pl01x.S | ||
dec21285.h | ||
entry-macro-gic.S | ||
entry-macro-iomd.S | ||
ep7211.h | ||
ep7212.h | ||
gic.h | ||
icst.h | ||
ioc.h | ||
iomd.h | ||
iop3xx-adma.h | ||
iop3xx-gpio.h | ||
iop3xx.h | ||
iop_adma.h | ||
it8152.h | ||
linkup-l1110.h | ||
locomo.h | ||
memc.h | ||
pci_v3.h | ||
pl080.h | ||
pl330.h | ||
sa1111.h | ||
scoop.h | ||
sp810.h | ||
ssp.h | ||
uengine.h | ||
vic.h |