Commit graph

68 commits

Author SHA1 Message Date
Russell King
ff2e27ae0b ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt.  Move this into the common GIC code.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:42 +00:00
Russell King
384895330e ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
We don't need to re-pass the base address for the CPU interfaces to the
GIC for secondary CPUs, as it will never be different from the boot CPU
- and even if it was, we'd overwrite the boot CPU's base address.

Get rid of this argument, and rename to gic_secondary_init().

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:40 +00:00
Russell King
b580b899dd ARM: GIC: provide a single initialization function for boot CPU
Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:30 +00:00
Magnus Damm
161d190760 ARM: 6475/1: Introduce asm/hardware/entry-macro-gic.S
This patch is the identical GIC demux implementation
merge V3. Instead of implementing same code over and
over simply share it in entry-macro-gic.S. The shared
code is based on the realview implementation.

Each GIC demux instance still has to setup the base address
of the controller using the get_irqnr_preamble macro. The
rest of the GIC specific code can be shared.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-07 09:20:24 +00:00
Eric Miao
12cdcc8523 ARM: pxa: fix the missing definition of IRQ_BOARD_END
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: Mike Rapoport <mike@compulab.co.il>
2010-11-03 23:11:17 +08:00
Russell King
be6786ac73 Merge branch 'l2x0-pull-rmk' of git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into devel-stable 2010-10-28 14:42:06 +01:00
Russell King
f9cef50681 Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable
Conflicts:
	arch/arm/mach-s3c64xx/dev-audio.c
2010-10-28 12:27:34 +01:00
Santosh Shilimkar
5ba7037228 ARM: l2x0: Determine the cache size
The cache size is needed for to optimise range based
maintainance operations

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26 11:40:03 +05:30
Santosh Shilimkar
7db27e864a ARM: l2x0: Fix coding-style in the cache-l2x0.h
Replace tab with space after #define to be consisten with other
define in the file. Also move the bit mask below the register offsets.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26 11:40:02 +05:30
Kyungmin Park
63612a1f91 ARM: Add L2X0 PREFETCH and POWER control register
This patch adds L2X0 Prefetch and Power control register.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:11:01 +09:00
Linus Torvalds
229aebb873 Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
  Update broken web addresses in arch directory.
  Update broken web addresses in the kernel.
  Revert "drivers/usb: Remove unnecessary return's from void functions" for musb gadget
  Revert "Fix typo: configuation => configuration" partially
  ida: document IDA_BITMAP_LONGS calculation
  ext2: fix a typo on comment in ext2/inode.c
  drivers/scsi: Remove unnecessary casts of private_data
  drivers/s390: Remove unnecessary casts of private_data
  net/sunrpc/rpc_pipe.c: Remove unnecessary casts of private_data
  drivers/infiniband: Remove unnecessary casts of private_data
  drivers/gpu/drm: Remove unnecessary casts of private_data
  kernel/pm_qos_params.c: Remove unnecessary casts of private_data
  fs/ecryptfs: Remove unnecessary casts of private_data
  fs/seq_file.c: Remove unnecessary casts of private_data
  arm: uengine.c: remove C99 comments
  arm: scoop.c: remove C99 comments
  Fix typo configue => configure in comments
  Fix typo: configuation => configuration
  Fix typo interrest[ing|ed] => interest[ing|ed]
  Fix various typos of valid in comments
  ...

Fix up trivial conflicts in:
	drivers/char/ipmi/ipmi_si_intf.c
	drivers/usb/gadget/rndis.c
	net/irda/irnet/irnet_ppp.c
2010-10-24 13:41:39 -07:00
Justin P. Mattock
50a23e6eec Update broken web addresses in arch directory.
The patch below updates broken web addresses in the arch directory.

Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Finn Thain <fthain@telegraphics.com.au>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Reviewed-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-10-18 11:03:21 +02:00
Alexander Shishkin
9f5336915b ARM: 6293/1: coresight: cosmetic fixes
Use BIT() macro whenever it is sensible to do so.

Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-04 20:20:44 +01:00
Alexander Shishkin
8234eaef80 ARM: 6291/1: coresight: move struct tracectx inside etm driver
This is done so as to be able to make use of the coresight components'
registers in assembler code (like omap sleep code). Also, there shouldn't
be any users of this structure outside the etm driver.

Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-04 20:20:44 +01:00
Linus Torvalds
bbbfb910d1 Merge branch 'for-linus/samsung-2635' of git://git.fluff.org/bjdooks/linux
* 'for-linus/samsung-2635' of git://git.fluff.org/bjdooks/linux:
  DMAENGINE: correct PL080 register header file
  ARM: SAMSUNG: Fix on build warning about dependency in Kconfig
  ARM: SMDK6410: Make virtual screen twice depth of real
  ARM: S3C64XX: Update consistent DMA size to 8MiB
  ARM: S3C64XX: Add audio support to SmartQ
  ARM: S3C64XX: Framebuffer fix for SmartQ5
  ARM: S3C64XX: Set wifi and iNAND as permanently connected SD devices on SmartQ boards
  ARM: S3C64XX: Move SmartQ LCD control platform definition to shared file
  ARM: mach-real6410: add sdhc device support
  ARM: mach-real6410: add dm9000 ethernet support for mach-real6410
  ARM: S3C64XX: Support for Real6410

Fix up trivial conflicts in arch/arm/mach-s3c64xx/mach-smartq5.c
("remove pixclock" vs "Framebuffer fix for SmartQ5")
2010-08-14 11:59:44 -07:00
Linus Walleij
d92342df2a DMAENGINE: correct PL080 register header file
This PL008 among all other variables named PL080 doesn't seem
right. Fix it. Also add some missing defined that I use in the
new PL08x driver.

Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-08-14 16:29:55 +01:00
Russell King
0b019a4155 Merge branches 'master' and 'devel' into for-linus
Conflicts:
	arch/arm/Kconfig
	arch/arm/mm/Kconfig
2010-08-10 23:17:52 +01:00
Alexander Shishkin
9e354ea8e0 ARM: 6292/1: coresight: add ETM management registers
Add notion of ETM OS lock, save and restore registers.

Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-08-10 22:10:53 +01:00
Marek Vasut
983536e7b5 [ARM] scoop: Add CPR register bit definitions
Add bit definitions of the CPR register of the SCOOP chip into scoop.h. Also,
cleanup the GPCR definitions to match coding style.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-08-05 14:32:26 +08:00
Russell King
c39e52a793 Merge branches 'at91', 'bcmring', 'ep93xx', 'iop', 'misc', 'nomadik', 'omap', 'pxa', 'spear' and 'versatile' into devel
Conflicts:
	arch/arm/Makefile
	arch/arm/common/Makefile
	arch/arm/mm/Kconfig
2010-05-17 11:53:39 +01:00
Jassi Brar
75070612c4 ARM: 6132/1: PL330: Add common core driver
PL330 is a configurable DMA controller PrimeCell device.
The register map of the device is well defined.
The configuration of a particular implementation can be
read from the six configuration registers CR0-4,Dn.

This patch implements a driver for the specification:-
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424a/DDI0424A_dmac_pl330_r0p0_trm.pdf

The exported interface should be sufficient to implement
a driver for any DMA API.

Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-15 15:03:50 +01:00
Jason McMullan
64039be822 ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310
The L310 cache controller's interface is almost identical
to the L210. One major difference is that the PL310 can
have up to 16 ways.

This change uses the cache's part ID and the Associativity
bits in the AUX_CTRL register to determine the number of ways.

Also, this version prints out the CACHE_ID and AUX_CTRL registers.

Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jason S. McMullan <jason.mcmullan@netronome.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-15 15:03:50 +01:00
Russell King
c5a0adb510 ARM: ICST: kill duplicate icst code
The only difference between ICST307 and ICST525 are the two arrays
for calculating the S parameter; the code is now identical.  Merge
the two files and kill the duplicated code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02 09:35:33 +01:00
Russell King
232eaf7f26 ARM: ICST: indirect s2div and idx2s arrays via icst_params
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02 09:35:32 +01:00
Russell King
e73a46a3d3 ARM: ICST: move minimum VCO frequency to icst_params
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02 09:35:31 +01:00
Russell King
64fceb1dcd ARM: ICST: use Hz instead of kHz
This makes the ICST support fit more nicely with the clk API,
eliminating the need to *1000 and /1000 in places.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02 09:35:31 +01:00
Russell King
4de2edbd15 ARM: ICST: provide definitions for max/min VCO frequencies
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02 09:35:30 +01:00
Russell King
643761ac43 ARM: ICST: icst.*_ps_to_vco() functions are unused, remove them
These functions were originally implemented for the CLCD driver before
we had clk API support.  Since the CLCD driver does not use these
anymore, we can remove them.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02 09:35:30 +01:00
Russell King
39c0cb02db ARM: ICST: merge common ICST VCO structures
The structures for the ICST307 and ICST525 VCO devices are
identical, so merge them together.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02 09:35:29 +01:00
Russell King
ba02a21544 ARM: Improve documentation in arm_timer.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-29 18:04:15 +01:00
viresh kumar
ff37f6e591 ARM: 6021/1: ST SPEAr: Added ARM PrimeXsys System Controller SP810 header file
Reviewed-by: Linus Walleij <linux.walleij@stericsson.com>

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14 11:34:38 +01:00
Russell King
988addf82e Merge branch 'origin' into devel-stable
Conflicts:
	arch/arm/mach-mx2/devices.c
	arch/arm/mach-mx2/devices.h
	sound/soc/pxa/pxa-ssp.c
2010-03-08 20:21:04 +00:00
Eric Miao
0dc726bb26 [ARM] pxa: move board board IRQ definitions out of irqs.h
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:51 +08:00
Eric Miao
19851c58e6 [ARM] sa1111: allow cascaded IRQs to be used by platforms
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:51 +08:00
Eric Miao
ac609d266e [ARM] locomo: allow cascaded IRQ base to be specified by platforms
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02 07:40:50 +08:00
Roel Kluin
f1acb878b6 iop-adma: redundant/wrong tests in iop_*_count()?
When we reach the loop, len is at least 1, we only stay in the loop when
len is at least MAX_BYTE_COUNT + 1, MAX_BYTE_COUNT is subtracted in each
iteration. So when we leave the loop, or didn't take it, len is at least 1.
Testing whether len is non-zero appears redundant.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2010-02-28 22:22:12 -07:00
Russell King
0719dc3413 Merge branch 'devel-stable' into devel 2009-12-05 10:35:33 +00:00
Alexander Shishkin
c5d6c7708c ARM: 5841/1: a driver for on-chip ETM and ETB
This driver implements support for on-chip Embedded Tracing Macrocell and
Embedded Trace Buffer. It allows to trigger tracing of kernel execution flow
and exporting trace output to userspace via character device and a sysrq
combo.

Trace output can then be decoded by a fairly simple open source tool [1]
which is already sufficient to get the idea of what the kernel is doing.

[1]: http://github.com/virtuoso/etm2human

Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-02 10:25:22 +00:00
Russell King
d7931d9f7a Merge branch 'for-rmk' of git://git.marvell.com/orion into devel-stable 2009-12-01 18:22:54 +00:00
Lennert Buytenhek
573a652fb0 ARM: Add Tauros2 L2 cache controller support
Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-11-27 15:43:21 -05:00
Mikael Pettersson
980f2296b5 iop: enable generic time
This updates the IOP platform to use the kernel's generic time
framework. With clockevent support in place, this reduces to
selecting GENERIC_TIME and removing the platform's private timer
->offset() operation (iop_gettimeoffset).

Tested on n2100, compile-tested for all plat-iop machines.

Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-10-29 11:46:55 -07:00
Mikael Pettersson
469d30448d iop: clockevent support
This updates the IOP platform to expose the interrupting
timer 0 as a clockevent object. The timer interrupt handler
is changed to call the clockevent ->event_handler() instead
of timer_tick(), and ->set_next_event() and ->set_mode()
operations are added to allow the mode of the timer to be
updated (required for ONESHOT/NOHZ mode).

Timer 0 must now be properly initialised, which requires
a new write_tcr0() function from the mach-specific code.

The mode of timer 0 must be read at the start of ->set_mode(),
which requires a new read_tmr0() function from the mach-
specific code.

Initial setup of timer 0 is also rewritten to be more robust.

Tested on n2100, compile-tested for all plat-iop machines.

Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-10-29 11:46:54 -07:00
Mikael Pettersson
a91549a8f2 iop: clocksource support
This updates the IOP platform to expose the free-running
timer 1 as a clocksource object. This timer is now also
properly initialised, which requires a new write_tcr1()
function from the mach-specific code. Apart from the
explicit initialisation, there is no functional change
in how timer 1 is programmed.

Tested on n2100, compile-tested for all plat-iop machines.

Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-10-29 11:46:54 -07:00
Russell King
534d0c92cf Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/xscaleiop
Conflicts:
	MAINTAINERS
2009-10-02 22:31:04 +01:00
Dan Williams
bbb20089a3 Merge branch 'dmaengine' into async-tx-next
Conflicts:
	crypto/async_tx/async_xor.c
	drivers/dma/ioat/dma_v2.h
	drivers/dma/ioat/pci.c
	drivers/md/raid5.c
2009-09-08 17:55:21 -07:00
Dan Williams
3e48e65690 Merge branch 'iop-raid6' into async-tx-next 2009-09-08 17:53:57 -07:00
Dan Williams
308136d1ab iop-adma: implement a private tx_list
Drop iop-adma's use of tx_list from struct dma_async_tx_descriptor in
preparation for removal of this field.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-09-08 17:53:02 -07:00
Dan Williams
f9dd213437 Merge branch 'md-raid6-accel' into ioat3.2
Conflicts:
	include/linux/dmaengine.h
2009-09-08 17:42:29 -07:00
Dan Williams
7bf649aee8 iop-adma: P+Q support for iop13xx adma engines
iop33x support is not included because that engine is a bit more awkward
to handle in that it can either be in xor mode or pq mode.  The
dmaengine/async_tx layers currently only comprehend static capabilities.

Note iop13xx does not support hardware PQ continuation so the driver
must handle the DMA_PREP_CONTINUE flag for operations across > 16
sources. From the comment for dma_maxpq:

/* When an engine does not support native continuation we need 3 extra
 * source slots to reuse P and Q with the following coefficients:
 * 1/ {00} * P : remove P from Q', but use it as a source for P'
 * 2/ {01} * Q : use Q to continue Q' calculation
 * 3/ {00} * Q : subtract Q from P' to cancel (2)
 */

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-08-29 19:12:39 -07:00
Dan Williams
ad283ea4a3 async_tx: add sum check flags
Replace the flat zero_sum_result with a collection of flags to contain
the P (xor) zero-sum result, and the soon to be utilized Q (raid6 reed
solomon syndrome) zero-sum result.  Use the SUM_CHECK_ namespace instead
of DMA_ since these flags will be used on non-dma-zero-sum enabled
platforms.

Reviewed-by: Andre Noll <maan@systemlinux.org>
Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-08-29 19:09:26 -07:00