dba538ff56
Pull x86/intel-mid changes from Ingo Molnar: "Update the 'intel mid' (mobile internet device) platform code as Intel is rolling out more SoC designs. This gets rid of most of the 'MRST' platform code in the process, mostly by renaming and shuffling code around into their respective 'intel-mid' platform drivers" * 'x86-intel-mid-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, intel-mid: Do not re-introduce usage of obsolete __cpuinit intel_mid: Move platform device setups to their own platform_<device>.* files x86: intel-mid: Add section for sfi device table intel-mid: sfi: Allow struct devs_id.get_platform_data to be NULL intel_mid: Moved SFI related code to sfi.c intel_mid: Added custom handler for ipc devices intel_mid: Added custom device_handler support intel_mid: Refactored sfi_parse_devs() function intel_mid: Renamed *mrst* to *intel_mid* pci: intel_mid: Return true/false in function returning bool intel_mid: Renamed *mrst* to *intel_mid* mrst: Fixed indentation issues mrst: Fixed printk/pr_* related issues
209 lines
4.8 KiB
C
209 lines
4.8 KiB
C
/*
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* RTC related functions
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*/
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#include <linux/platform_device.h>
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#include <linux/mc146818rtc.h>
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#include <linux/acpi.h>
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#include <linux/bcd.h>
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#include <linux/export.h>
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#include <linux/pnp.h>
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#include <linux/of.h>
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#include <asm/vsyscall.h>
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#include <asm/x86_init.h>
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#include <asm/time.h>
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#include <asm/intel-mid.h>
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#include <asm/rtc.h>
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#ifdef CONFIG_X86_32
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/*
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* This is a special lock that is owned by the CPU and holds the index
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* register we are working with. It is required for NMI access to the
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* CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
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*/
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volatile unsigned long cmos_lock;
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EXPORT_SYMBOL(cmos_lock);
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#endif /* CONFIG_X86_32 */
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/* For two digit years assume time is always after that */
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#define CMOS_YEARS_OFFS 2000
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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/*
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* In order to set the CMOS clock precisely, set_rtc_mmss has to be
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* called 500 ms after the second nowtime has started, because when
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* nowtime is written into the registers of the CMOS clock, it will
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* jump to the next second precisely 500 ms later. Check the Motorola
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* MC146818A or Dallas DS12887 data sheet for details.
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*/
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int mach_set_rtc_mmss(const struct timespec *now)
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{
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unsigned long nowtime = now->tv_sec;
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struct rtc_time tm;
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int retval = 0;
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rtc_time_to_tm(nowtime, &tm);
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if (!rtc_valid_tm(&tm)) {
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retval = set_rtc_time(&tm);
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if (retval)
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printk(KERN_ERR "%s: RTC write failed with error %d\n",
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__FUNCTION__, retval);
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} else {
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printk(KERN_ERR
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"%s: Invalid RTC value: write of %lx to RTC failed\n",
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__FUNCTION__, nowtime);
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retval = -EINVAL;
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}
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return retval;
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}
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void mach_get_cmos_time(struct timespec *now)
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{
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unsigned int status, year, mon, day, hour, min, sec, century = 0;
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unsigned long flags;
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spin_lock_irqsave(&rtc_lock, flags);
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/*
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* If UIP is clear, then we have >= 244 microseconds before
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* RTC registers will be updated. Spec sheet says that this
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* is the reliable way to read RTC - registers. If UIP is set
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* then the register access might be invalid.
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*/
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while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
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cpu_relax();
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sec = CMOS_READ(RTC_SECONDS);
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min = CMOS_READ(RTC_MINUTES);
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hour = CMOS_READ(RTC_HOURS);
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day = CMOS_READ(RTC_DAY_OF_MONTH);
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mon = CMOS_READ(RTC_MONTH);
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year = CMOS_READ(RTC_YEAR);
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#ifdef CONFIG_ACPI
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if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
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acpi_gbl_FADT.century)
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century = CMOS_READ(acpi_gbl_FADT.century);
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#endif
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status = CMOS_READ(RTC_CONTROL);
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WARN_ON_ONCE(RTC_ALWAYS_BCD && (status & RTC_DM_BINARY));
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spin_unlock_irqrestore(&rtc_lock, flags);
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if (RTC_ALWAYS_BCD || !(status & RTC_DM_BINARY)) {
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sec = bcd2bin(sec);
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min = bcd2bin(min);
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hour = bcd2bin(hour);
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day = bcd2bin(day);
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mon = bcd2bin(mon);
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year = bcd2bin(year);
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}
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if (century) {
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century = bcd2bin(century);
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year += century * 100;
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} else
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year += CMOS_YEARS_OFFS;
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now->tv_sec = mktime(year, mon, day, hour, min, sec);
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now->tv_nsec = 0;
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}
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/* Routines for accessing the CMOS RAM/RTC. */
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unsigned char rtc_cmos_read(unsigned char addr)
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{
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unsigned char val;
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lock_cmos_prefix(addr);
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outb(addr, RTC_PORT(0));
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val = inb(RTC_PORT(1));
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lock_cmos_suffix(addr);
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return val;
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}
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EXPORT_SYMBOL(rtc_cmos_read);
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void rtc_cmos_write(unsigned char val, unsigned char addr)
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{
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lock_cmos_prefix(addr);
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outb(addr, RTC_PORT(0));
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outb(val, RTC_PORT(1));
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lock_cmos_suffix(addr);
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}
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EXPORT_SYMBOL(rtc_cmos_write);
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int update_persistent_clock(struct timespec now)
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{
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return x86_platform.set_wallclock(&now);
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}
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/* not static: needed by APM */
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void read_persistent_clock(struct timespec *ts)
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{
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x86_platform.get_wallclock(ts);
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}
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static struct resource rtc_resources[] = {
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[0] = {
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.start = RTC_PORT(0),
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.end = RTC_PORT(1),
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.flags = IORESOURCE_IO,
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},
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[1] = {
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.start = RTC_IRQ,
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.end = RTC_IRQ,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device rtc_device = {
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.name = "rtc_cmos",
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.id = -1,
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.resource = rtc_resources,
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.num_resources = ARRAY_SIZE(rtc_resources),
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};
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static __init int add_rtc_cmos(void)
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{
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#ifdef CONFIG_PNP
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static const char * const const ids[] __initconst =
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{ "PNP0b00", "PNP0b01", "PNP0b02", };
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struct pnp_dev *dev;
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struct pnp_id *id;
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int i;
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pnp_for_each_dev(dev) {
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for (id = dev->id; id; id = id->next) {
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for (i = 0; i < ARRAY_SIZE(ids); i++) {
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if (compare_pnp_id(id, ids[i]) != 0)
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return 0;
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}
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}
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}
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#endif
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if (of_have_populated_dt())
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return 0;
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/* Intel MID platforms don't have ioport rtc */
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if (intel_mid_identify_cpu())
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return -ENODEV;
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#ifdef CONFIG_ACPI
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if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) {
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/* This warning can likely go away again in a year or two. */
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pr_info("ACPI: not registering RTC platform device\n");
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return -ENODEV;
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}
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#endif
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platform_device_register(&rtc_device);
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dev_info(&rtc_device.dev,
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"registered platform RTC device (no PNP device found)\n");
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return 0;
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}
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device_initcall(add_rtc_cmos);
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