Add Samsung Exynos5250 SoC specific data to enable pinctrl support for
all platforms based on Exynos5250.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
These are device tree conversions for a number of platforms,
with the intention of turning code from board files into
device tree descriptions. Notable changes are:
* davinci bindings for pinctrl, MTD, RTC, watchdog and i2c
* nomadik bindings for all devices, removing the board files
* bcm2835 bindings for mmc and i2c
* tegra bindings for hdmi, keyboard, audio, as well as some updates
* at91 bindings for hardware ecc and for devices on RM9200
* mxs bindings for cfa100xx
* sunxi support for Miniand Hackberry board
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree conversions from Arnd Bergmann:
"These are device tree conversions for a number of platforms, with the
intention of turning code from board files into device tree
descriptions. Notable changes are:
- davinci bindings for pinctrl, MTD, RTC, watchdog and i2c
- nomadik bindings for all devices, removing the board files
- bcm2835 bindings for mmc and i2c
- tegra bindings for hdmi, keyboard, audio, as well as some updates
- at91 bindings for hardware ecc and for devices on RM9200
- mxs bindings for cfa100xx
- sunxi support for Miniand Hackberry board"
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (72 commits)
Revert "sunxi: a10-cubieboard: Add user LEDs to the device tree"
Revert "sunxi: a13-olinuxino: Add user LED to the device tree"
clk: tegra: initialise parent of uart clocks
ARM: tegra: remove clock-frequency properties from serial nodes
clk: tegra: fix driver to match DT binding
clk: tegra: local arrays should be static
clk: tegra: Add missing spinlock for hclk and pclk
clk: tegra: Implement locking for super clock
clk: tegra: fix wrong clock index between se to sata_cold
sunxi: a13-olinuxino: Add user LED to the device tree
ARM: davinci: da850 DT: add support for machine reboot
ARM: davinci: da850: add wdt DT node
ARM: davinci: da850: add DT node for I2C0
ARM: at91: at91sam9n12: add DT parameters to enable PMECC
ARM: at91: at91sam9x5: add DT parameters to enable PMECC
ARM: at91: add EMAC bindings to RM9200 DT
ARM: at91: add SSC bindings to RM9200 DT
ARM: at91: add MMC bindings to RM9200 DT
ARM: at91: Animeo IP: enable watchdog support
ARM: nomadik: fix OF compilation regression
...
This is another cleanup series, containing the move of the Renesas
SH-Mobile pin controller code from arch/arm/mach-shmobile over to the
generic pinctrl subsystem, changing it over to the common interfaces in
the process.
Based on agreement between Olof, Paul Mundt, Linus Walleij and Simon,
we're merging this large branch of pinctrl conversion through arm-soc,
even though it contains the corresponding conversions for arch/sh. Main
reason for this is tight dependencies (that will now mostly be broken)
between the arch/sh and mach-shmobile implementations.
There will be more of this in 3.10 to do device-tree bindings, but this
is the initial conversion.
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Merge tag 'sh-pinmux' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull sh-mobile pinctrl conversion from Arnd Bergmann:
"This is another cleanup series, containing the move of the Renesas
SH-Mobile pin controller code from arch/arm/mach-shmobile over to the
generic pinctrl subsystem, changing it over to the common interfaces
in the process.
Based on agreement between Olof, Paul Mundt, Linus Walleij and Simon,
we're merging this large branch of pinctrl conversion through arm-soc,
even though it contains the corresponding conversions for arch/sh.
Main reason for this is tight dependencies (that will now mostly be
broken) between the arch/sh and mach-shmobile implementations.
There will be more of this in 3.10 to do device-tree bindings, but
this is the initial conversion."
* tag 'sh-pinmux' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (81 commits)
sh-pfc: sh_pfc_probe() sizeof() fix
sh-pfc: Move sh_pfc.h from include/linux/ to driver directory
sh-pfc: Remove pinmux_info definition
sh: Remove unused sh_pfc_register_info() function
sh: shx3: pinmux: Use driver-provided pinmux info
sh: sh7786: pinmux: Use driver-provided pinmux info
sh: sh7785: pinmux: Use driver-provided pinmux info
sh: sh7757: pinmux: Use driver-provided pinmux info
sh: sh7734: pinmux: Use driver-provided pinmux info
sh: sh7724: pinmux: Use driver-provided pinmux info
sh: sh7723: pinmux: Use driver-provided pinmux info
sh: sh7722: pinmux: Use driver-provided pinmux info
sh: sh7720: pinmux: Use driver-provided pinmux info
sh: sh7269: pinmux: Use driver-provided pinmux info
sh: sh7264: pinmux: Use driver-provided pinmux info
sh: sh7203: pinmux: Use driver-provided pinmux info
ARM: shmobile: sh73a0: Use driver-provided pinmux info
ARM: shmobile: sh7372: Use driver-provided pinmux info
ARM: shmobile: r8a7779: Use driver-provided pinmux info
ARM: shmobile: r8a7740: Use driver-provided pinmux info
...
Bug fixes that did not make it into v3.8, mostly because they were not
considered important enough, and in some cases because bugs only show
up in combination with other patches destined for 3.9.
This includes a few larger patches for GPIO on the Marvell PXA platform
and a lot of Samsung specific bug fixes, as well as a series from Arnd
to fix older build warnings.
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Merge tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull non-critical ARM SoC bug fixes from Arnd Bergmann:
"Bug fixes that did not make it into v3.8, mostly because they were not
considered important enough, and in some cases because bugs only show
up in combination with other patches destined for 3.9. This includes
a few larger patches for GPIO on the Marvell PXA platform and a lot of
Samsung specific bug fixes, as well as a series from Arnd to fix older
build warnings."
* tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
ARM: SPEAr13xx: Enable CONFIG_ARCH_HAS_CPUFREQ
ARM: imx: MACH_MX31ADS_WM1133_EV1 needs REGULATOR_WM8350
scripts/sortextable: silence script output
ARM: s3c: i2c: add platform_device forward declaration
ARM: mvebu: allow selecting mvebu without Armada XP
ARM: pick Versatile by default for !MMU
ARM: integrator: fix build with INTEGRATOR_AP off
ARM: integrator/versatile: fix NOMMU warnings
ARM: sa1100: don't warn about mach/ide.h
ARM: shmobile: fix defconfig warning on CONFIG_USB
ARM: w90x900: fix legacy assembly syntax
ARM: samsung: fix assembly syntax for new gas
ARM: disable virt_to_bus/virt_to_bus almost everywhere
ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl
ARM: SAMSUNG: Silence empty switch warning in fimc-core.h
ARM: SAMSUNG: Silence empty switch warning in sdhci.h
ARM: msm: proc_comm_boot_wait should not be __init
arm: vt8500: Update MAINTAINERS entry for arch-vt8500
ARM: integrator: ensure ap_syscon_base is initialised when !CONFIG_MMU
ARM: S5PV210: Fix early uart output in fifo mode
...
Here is the big driver core merge for 3.9-rc1
There are two major series here, both of which touch lots of drivers all
over the kernel, and will cause you some merge conflicts:
- add a new function called devm_ioremap_resource() to properly be
able to check return values.
- remove CONFIG_EXPERIMENTAL
If you need me to provide a merged tree to handle these resolutions,
please let me know.
Other than those patches, there's not much here, some minor fixes and
updates.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull driver core patches from Greg Kroah-Hartman:
"Here is the big driver core merge for 3.9-rc1
There are two major series here, both of which touch lots of drivers
all over the kernel, and will cause you some merge conflicts:
- add a new function called devm_ioremap_resource() to properly be
able to check return values.
- remove CONFIG_EXPERIMENTAL
Other than those patches, there's not much here, some minor fixes and
updates"
Fix up trivial conflicts
* tag 'driver-core-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (221 commits)
base: memory: fix soft/hard_offline_page permissions
drivercore: Fix ordering between deferred_probe and exiting initcalls
backlight: fix class_find_device() arguments
TTY: mark tty_get_device call with the proper const values
driver-core: constify data for class_find_device()
firmware: Ignore abort check when no user-helper is used
firmware: Reduce ifdef CONFIG_FW_LOADER_USER_HELPER
firmware: Make user-mode helper optional
firmware: Refactoring for splitting user-mode helper code
Driver core: treat unregistered bus_types as having no devices
watchdog: Convert to devm_ioremap_resource()
thermal: Convert to devm_ioremap_resource()
spi: Convert to devm_ioremap_resource()
power: Convert to devm_ioremap_resource()
mtd: Convert to devm_ioremap_resource()
mmc: Convert to devm_ioremap_resource()
mfd: Convert to devm_ioremap_resource()
media: Convert to devm_ioremap_resource()
iommu: Convert to devm_ioremap_resource()
drm: Convert to devm_ioremap_resource()
...
- Grabbing of default pinctrl handles from the device core.
These are the hunks hitting drivers/base. All is ACKed by
Greg, after a long discussion about different alternatives.
- Some stuff also touches the MFD and ARM SoC trees, this has
been coordinated and ACKed.
- New drivers for:
- The Tegra 114 sub-SoC
- Allwinner sunxi
- New ABx500 driver and sub-SoC drivers for AB8500,
AB8505, AB9540 and AB8540.
- Make it possible for hogged pins to enter a sleep mode,
and make it possible for drivers to control that mode.
- Various clean-up, extensions and device tree support to
various pin controllers.
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Merge tag 'pinctrl-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl changes from Linus Walleij:
"These are the main pinctrl changes for the v3.9 merge window. The
most interesting change by far is how the device core grabs pinctrl
default handles avoiding the need to stick boilerplate into driver
consumers.
- Grabbing of default pinctrl handles from the device core. These
are the hunks hitting drivers/base. All is ACKed by Greg, after a
long discussion about different alternatives.
- Some stuff also touches the MFD and ARM SoC trees, this has been
coordinated and ACKed.
- New drivers for:
- The Tegra 114 sub-SoC
- Allwinner sunxi
- New ABx500 driver and sub-SoC drivers for AB8500, AB8505, AB9540
and AB8540.
- Make it possible for hogged pins to enter a sleep mode, and make it
possible for drivers to control that mode.
- Various clean-up, extensions and device tree support to various pin
controllers."
* tag 'pinctrl-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (68 commits)
pinctrl: tegra: add clfvs function to Tegra114 support
pinctrl: generic: rename input schmitt disable
pinctrl/pinconfig: add debug interface
pinctrl: samsung: remove duplicated line
ARM: ux500: use real AB8500 IRQ numbers instead of virtual ones
ARM: ux500: remove irq_base property from platform_data
pinctrl/abx500: use direct IRQ defines
pinctrl/abx500: replace IRQ offsets with table read-in values
pinctrl/abx500: move IRQ handling to ab8500-core
pinctrl: exynos5440: remove erroneous __init
pinctrl/abx500: adjust offset for get_mode()
pinctrl/abx500: add Device Tree support
pinctrl/abx500: align GPIO cluster boundaries
pinctrl/abx500: prevent error path from corrupting returning error
pinctrl: sunxi: add of_xlate function
pinctrl/lantiq: fix pin number in ltq_pmx_gpio_request_enable
pinctrl/lantiq: add functionality to falcon_pinconf_dbg_show
pinctrl/lantiq: fix pinconfig parameters
pinctrl/lantiq: one of the boot leds was defined incorrectly
pinctrl/lantiq: only probe available pad controllers
...
Fix sizeof() usage in sh-pfc/core.c to allocate space
for the full data structure instead of a pointer.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds the definition for the cldvfs function for Tegra114 pinctrl
support. This is based on work by Pritesh Raithatha.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rename PIN_CONFIG_INPUT_SCHMITT_DISABLE to
PIN_CONFIG_INPUT_SCHMITT_ENABLE. It's used to make it more generialize.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is a branch of fixes that originally were scheduled for 3.8 but
due to the request from Linus to hold back on all but the most critical
of fixes, we're re-queueing them for 3.9 here.
* fixes-for-3.9:
ARM: dts: imx6: fix fec ptp clock slow 10 time
ARM: highbank: mask cluster id from cpu_logical_map
ARM: scu: mask cluster id from cpu_logical_map
ARM: scu: add empty scu_enable for !CONFIG_SMP
ARM: at91/at91sam9x5.dtsi: fix usart3 TXD
ARM: at91: at91sam9x5: fix usart3 pinctrl name
ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440
ARM: dts: fix tick and alarm irq numbers for exynos5440
ARM: dts: fix compatible value for exynos pinctrl
ARM: dts: Fix compatible value of pinctrl module on EXYNOS5440
ARM: S3C24XX: fix uninitialized variable warning
mfd/vexpress: vexpress_sysreg_setup must not be __init
ARM: ux500: Fix u9540 booting issues
arm: mvebu: i2c come back in defconfig
arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
Dove: activate GPIO interrupts in DT
ARM: ux500: add spin_unlock(&master_lock).
ARM: ux500: Disable Power Supply and Battery Management by default
Signed-off-by: Olof Johansson <olof@lixom.net>
This update adds a debugfs interface to modify a pin configuration
for a given state in the pinctrl map. This allows to modify the
configuration for a non-active state, typically sleep state.
This configuration is not applied right away, but only when the state
will be entered.
This solution is mandated for us by HW validation: in order
to test and verify several pin configurations during sleep without
recompiling the software.
Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch removes duplicated line of samsung_pinctrl_register(),
because the number of pins is redundantly assigned twice.
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Make it harder to do mistakes by introducing the actual
defined ABx500 IRQ number into the IRQ cluster definitions.
Deduct cluster offset from the GPIO offset to make each
cluster coherent.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ABx500 GPIO controller used to provide a set of virtual contiguous
IRQs for use by sub-devices, but they have been removed after a request
from Mainline Maintainers. Now the AB8500 core driver deals with almost
all IRQ related issues instead.
The ABx500 GPIO driver is now only used to convert between GPIO and IRQ
numbers which is actually quite difficult, as the ABx500 GPIO's
associated IRQs are clustered together throughout the interrupt number
space at irregular intervals. To solve this quandary, we have placed the
read-in values into the existing cluster information table to use during
conversion.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Moved irq_base removal into this patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In its current state the gpio-ab8500 driver looks after some GPIO
lines found on the AB8500 MFD chip. It also controls all of its
own IRQ handling for these GPIOs by inventing some virtual IRQs
and handing those out to sub-devices. There has been quite a bit
of controversy over this and it was a contributing factor to the
driver being marked as BROKEN in Mainline.
The reason for adopting this method was due to added complexity
in the hardware. Unusually, each GPIO has two separate IRQs
associated with it, one for a rising and a different one for a
falling interrupt. Using this method complicates matters further
because the GPIO IRQs are actually sandwiched between a bunch
of IRQs which are handled solely by the AB8500 core driver.
The best way for us to take this forward is to get rid of the
virtual IRQs and only hand out the rising IRQ lines. If a
sub-driver wishes to request a falling interrupt, they can do
so by requesting a rising line in the normal way. They just
have to add IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH, if
they require both in the flags. Then if a falling IRQ is
triggered, the AB8500 core driver will know how to handle the
added complexity accordingly. This should greatly simply things.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augment to keep irq_base for a while (removed later)]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This removes the __init notation from some of the
the exynos 5440 pin controller set-up functions. These
functions are called from probe() and as such may be
discarded before probe() completes.
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The set_mode() and get_mode() functions in the abx500 were
not mirrored, leading to the wrong GPIO control bits being
read out.
Cc: Lee Jones <lee.jones@linaro.org>
Reported-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch will allow the ABX500 Pinctrl driver to be probed when
Device Tree is enabled with an appropriate node contained.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Not quite sure how this ever worked. In ab8500_gpio_to_irq() the
GPIO for conversion is passed through as the second argument. If
GPIO13, which is a valid GPIO for IRQ functionality, was received;
it would be rejected by the following guard:
GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */
if (offset >= cluster->start && offset <= cluster->end)
/* Valid GPIO for IRQ use */
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Augmented to account for off-by-one problem]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Prior to this patch abx500_gpio_probe() would return the return-value
of gpiochip_remove() during its error patch regardless of what the
actual failure was. So as long as gpiochip_remove() succeeded, probe()
would look like it succeeded too.
This patch ensures the correct error value is returned and that
mutex_destroy() is invoked if gpiochip_add_pin_range() were to fail.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since the pin controller of sunxi chips is represented as a
single bank in the driver.
Since this is neither convenient nor represented that way in the
datasheets, define a custom of_xlate function with the layout
<bank pin flag>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The mapping logic inside ltq_pmx_gpio_request_enable() was
broken. This only effected Falcon SoC.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The current code only has a stub for falcon_pinconf_dbg_show.
This patch adds proper functionality.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Falcon driver only defined the pinconf parameters but
did not pass them properly to the underlying api.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On the Falcon SoC the bootleds are located on pins 9->14.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The template falcon.dtsi lists all 6 pad controllers that
can be loaded. Only probe those that have status = "okay";
inside the dts file.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When setting the OpenDrain bit we should really honour the
argument passed inside the devicetree.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
While converting the boards inside OpenWrt to OF I noticed
that the we are missing a pinconf parameter to set a pin
to output.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
While converting all the boards supported by OpenWrt to OF
I noticed that this feature is missing. Adding it makes the
devicetrees more readable.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The logic of the OD bit was inverted when calling the
pinconf get method.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The XWAY pinctrl driver invalidly uses the port and not the pin
number to work out the registers and bits to be set for the
opendrain and pullup/down resistors.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
the default of_gpio_simple_xlate() will make us fail while getting gpios
bigger than 32 by of_get_named_gpio() or related APIs.
this patch adds a specific of_xlate callback for sirf gpio_chip and fix
the problem.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.
Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Current failure path neglects to mutex_destroy() before returning
an error due to an invalid parameter or an error received from
gpiochip_add(). This patch aims to remedy that behaviour.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch provides some superficial changes to the driver to
aid with readability and maintainability. We're mostly fixing
things like white-space errors, spreading out code which as
been clumped together impeding readability and comment layout,
such as using the new "/**" comment start for function headers
etc. No code semantics were harmed in the making of this patch.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently in the empty abx500_pin_config_get() function, we're
returning -EINVAL, with a comment stating that the reason for the
failure is that the function isn't implemented yet. Well there's
a proper return code for that. If we use it, we can do away with
the comment too, as it would be implied.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The BIT() macro provides a simple and easy to read way of
obtaining bit offsets into things like masks and hardware
registers. In this patch we're simply replacing all
instances of '1 << x' with 'bit(x)'.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB8540 sub driver to the ABx500 family, pins, pin groups and
gpio range.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB9540 sub driver to the ABx500 family, pins, pin groups and
gpio range.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add AB8505 sub driver to the ABx5x family.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since the Allwinner SoCs variants don't have the same set of pins to
handle, we need to declare the pin ranges available.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a subdriver for the AB8500 pinctrl portions.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the AB8500 core driver, which will be utilized by
the follow-on drivers for different ABx500 variants.
Sselect the driver from the DBX500_SOC, as this chip is
powering and clocking that SoC.
Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
'pinctrl_release' is used only in this file. Hence make it static.
Without this patch we get the following sparse error:
drivers/pinctrl/core.c:815:6: warning:
symbol 'pinctrl_release' was not declared. Should it be static?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The IP responsible for the muxing on the Allwinner SoCs are also
handling the GPIOs on the system. This patch adds the needed driver that
relies on the pinctrl driver for most of its operations.
The number of pins available for GPIOs operations are already declared
in the pinctrl driver, we only need to probe a generic driver to handle
the banks available for each SoC.
This driver has been tested on a A13-Olinuxino.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
nmk_prcm_gpiocr_get_mode is only needed for debugfs output at
the moment, which can be compile-time disabled. Marking
the function __maybe_unused still gives us compile-time
coverage, but avoids a gcc warning.
Without this patch, building nhk8815_defconfig results in:
drivers/pinctrl/pinctrl-nomadik.c:676:12: warning: 'nmk_prcm_gpiocr_get_mode' defined but not used [-Wunused-function]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Functions called from a driver probe() method must not be
marked __init, because they may get called after the
init phase is done, when the device shows up late, or
because of deferred probing.
Without this patch, building exynos_defconfig results in
multiple warnings like:
WARNING: drivers/pinctrl/built-in.o(.text+0x51bc): Section mismatch in reference from the function exynos5440_pinctrl_probe() to the function .init.text:exynos5440_gpiolib_register()
The function exynos5440_pinctrl_probe() references
the function __init exynos5440_gpiolib_register().
This is often because exynos5440_pinctrl_probe lacks a __init
annotation or the annotation of exynos5440_gpiolib_register is wrong.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix the incorrect compatible property value of pinctrl for EXYNOS4 SoCs.
Cc: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This moves the instances of the Nomadik pin controller and the
Nomadik GPIO blocks (also handled by the GPIO driver) over to
the device tree. A new compatible string is added to the
pin control driver in the process.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The header file isn't used by arch code anymore. Make it private to the
driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pinmux information should be provided by the pinmux driver, not arch
code. Make it possible to do so by supporting pinmux information passed
through the driver_data field in the platform ID table. Platform data
will remain supported until all arch code has been converted.
Rename the sh_pfc_platform_data structure to sh_pfc_soc_info to reflect
this.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This makes the device core auto-grab the pinctrl handle and set
the "default" (PINCTRL_STATE_DEFAULT) state for every device
that is present in the device model right before probe. This will
account for the lion's share of embedded silicon devcies.
A modification of the semantics for pinctrl_get() is also done:
previously if the pinctrl handle for a certain device was already
taken, the pinctrl core would return an error. Now, since the
core may have already default-grabbed the handle and set its
state to "default", if the handle was already taken, this will
be disregarded and the located, previously instanitated handle
will be returned to the caller.
This way all code in drivers explicitly requesting their pinctrl
handlers will still be functional, and drivers that want to
explicitly retrieve and switch their handles can still do that.
But if the desired functionality is just boilerplate of this
type in the probe() function:
struct pinctrl *p;
p = devm_pinctrl_get_select_default(&dev);
if (IS_ERR(p)) {
if (PTR_ERR(p) == -EPROBE_DEFER)
return -EPROBE_DEFER;
dev_warn(&dev, "no pinctrl handle\n");
}
The discussion began with the addition of such boilerplate
to the omap4 keypad driver:
http://marc.info/?l=linux-input&m=135091157719300&w=2
A previous approach using notifiers was discussed:
http://marc.info/?l=linux-kernel&m=135263661110528&w=2
This failed because it could not handle deferred probes.
This patch alone does not solve the entire dilemma faced:
whether code should be distributed into the drivers or
if it should be centralized to e.g. a PM domain. But it
solves the immediate issue of the addition of boilerplate
to a lot of drivers that just want to grab the default
state. As mentioned, they can later explicitly retrieve
the handle and set different states, and this could as
well be done by e.g. PM domains as it is only related
to a certain struct device * pointer.
ChangeLog v4->v5 (Stephen):
- Simplified the devicecore grab code.
- Deleted a piece of documentation recommending that pins
be mapped to a device rather than hogged.
ChangeLog v3->v4 (Linus):
- Drop overzealous NULL checks.
- Move kref initialization to pinctrl_create().
- Seeking Tested-by from Stephen Warren so we do not disturb
the Tegra platform.
- Seeking ACK on this from Greg (and others who like it) so I
can merge it through the pinctrl subsystem.
ChangeLog v2->v3 (Linus):
- Abstain from using IS_ERR_OR_NULL() in the driver core,
Russell recently sent a patch to remove it. Handle the
NULL case explicitly even though it's a bogus case.
- Make sure we handle probe deferral correctly in the device
core file. devm_kfree() the container on error so we don't
waste memory for devices without pinctrl handles.
- Introduce reference counting into the pinctrl core using
<linux/kref.h> so that we don't release pinctrl handles
that have been obtained for two or more places.
ChangeLog v1->v2 (Linus):
- Only store a pointer in the device struct, and only allocate
this if it's really used by the device.
Cc: Felipe Balbi <balbi@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Mitch Bradley <wmb@firmworks.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Rickard Andersson <rickard.andersson@stericsson.com>
Cc: Russell King <linux@arm.linux.org.uk>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[swarren: fixed and simplified error-handling in pinctrl_bind_pins(), to
correctly handle deferred probe. Removed admonition from docs not to use
pinctrl hogs for devices]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
devm_ioremap_resource() provides its own error messages so all explicit
error messages can be removed from the failure code paths.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Since the Allwinner SoCs variants don't have the same set of pins to
handle, we need to declare the pin ranges available.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Allwinner SoCs have an IP module that handle both the muxing and the
GPIOs.
This IP has 8 banks of 32 bits, with a number of pins actually useful
for each of these banks varying from one to another, and depending on
the SoC used on the board.
This driver only implements the pinctrl part, the gpio part will come
eventually.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This reverts commit 2e8b2eab94.
Conflicts:
drivers/pinctrl/pinctrl-single.c
ERROR: "__aeabi_uldivmod" [drivers/pinctrl/pinctrl-single.ko]
undefined!]
On Fri, Jan 11, 2013 at 4:00 PM, Russell King wrote:
> The above error happens in builds including pinctrl-single - the
> reason
> is this, where resource_size_t may be 64-bit.
>
> gpio->range.pin_base = (r.start - pcs->res->start) /
> mux_bytes;
> gpio->range.npins = (r.end - r.start) / mux_bytes + 1;
The reason of not fixing this issue and reverting the patch instead is
this patch can't handle another case. It's not easy to handle multiple
gpios sharing one pin register. So this gpio range feature will be
implemented by other patches.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add new function to get devname from pinctrl_dev. pinctrl_dev_get_name()
can only get pinctrl description name. If we want to use gpio driver to
find pinctrl device node, we need to fetch the pinctrl device name.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Nomadik Pinctrl driver requires access to some PRCMU registers
in order to run with full functionality. When Device Tree is
disabled the required PRCMU base address is passed in via platform
data, so in order for Device Tree booting to be as functional, we
need a similar mechanism to fetch it from Device Tree.
The new semantics goes like this: Parse the Device Tree and look
for the PRCMU node using a provided Phandle. Obtain the ioremaped
address from that node. If one was supplied via platform data
over-write it with anything found in Device Tree. Fail if either
the prcm_base can't be found if we're running on anything other
than an STN8815 ASIC.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.
Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Note that I am not sure about the MPP value for the PTP functionality.
It seems that the PTP references have been removed from the Marvell
hardware specifications available to me.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
match->data is const void * where as dev.platform_data is just void *.
Add a cast to remove the const, which is causing the compiler warning:
drivers/pinctrl/mvebu/pinctrl-kirkwood.c:461:26: warning: assignment
discards 'const' qualifier from pointer target type
Dove has the exact same warning, so gets the same cast.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix the following warnings when building with W=1 option:
drivers/pinctrl/pinctrl-mxs.c: In function 'mxs_dt_free_map':
drivers/pinctrl/pinctrl-mxs.c:151:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
drivers/pinctrl/pinctrl-mxs.c: In function 'mxs_pinctrl_enable':
drivers/pinctrl/pinctrl-mxs.c:208:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
drivers/pinctrl/pinctrl-mxs.c: In function 'mxs_pinconf_group_set':
drivers/pinctrl/pinctrl-mxs.c:265:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
drivers/pinctrl/pinctrl-mxs.c: In function 'mxs_pinctrl_parse_group':
drivers/pinctrl/pinctrl-mxs.c:376:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a driver for the Tegra114 pinmux, and required
parameterization data for Tegra114.
The driver uses the common Tegra pincontrol driver utility
functions to implement the majority of the driver.
This driver is not compatible with the earlier NVIDIA's SoCs,
hence add new compatibile as "nvidia,tegra114-pinmux".
Originally written by Pritesh.
ldewangan:
- cleanup the patches,
- remove non-require tables.
- Use module_platform_driver() for driver registartion.
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
NVIDIA's Tegra114 added two more configuration parameter in pinmux i.e.
rcv-sel and drive type.
rcv-sel: Select between High and Normal VIL/VIH receivers.
RCVR_SEL=1: High VIL/VIH
RCVR_SEL=0: Normal VIL/VIH
drv_type: Ouptput drive type:
33-50 ohm driver: 0x1
66-100ohm driver: 0x0
Add support of these parameters to be configure from DTS file.
Tegra20 and Tegra30 does not support this configuration and hence initialize their
pinmux structure with reg = -1.
Originally written by Pritesh Raithatha.
Changes by ldewangan:
- remove drvtype_width as it is always 2.
- Better describe the change.
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now, PINCTRL_SAMSUNG should be enabled with PINCTRL_EXYNOS so we don't
need to add 'depends on' condition already added in PINCTRL_EXYNOS.
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
commit af1024e0f7cde9023ddd0f3116db03911d5914c0
"pinctrl: skip deferral of hogs"
Attempts to avoid probe deferral on hogged pins, but we
forgot the device tree case. This patch fixes this.
Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This implements pin multiplexing and pin configuration for
the Nomadik pin controller using the device tree.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Instead of jumping to a label later in the probe just return
with an error code whenever probe() fails. Make sure to remove
the gpiochip on irqdomain error now that we're at it.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some leftovers in the driver were using NOMADIK_* macros to
translate the irq numbers to offsets, while the first base IRQ
was already being passed from platform data, and the function
setting the disable mask could just as well use the irqdomain.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a definition of a generic output configuration
for a certain pin when using the generic pin configuration
library. Whereas driving pins low/high is usually a GPIO
business, you may want to set up pins into a default state
using hogs, and never touch them again. This helps out
with that scenario.
Based on a patch from Patrice Chotard.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This fix makes pinctrl-nomadik able to handle
suspend/resume events and change hogged pins states
accordingly.
Signed-off-by: Julien Delacou <julien.delacou@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This fix allows handling sleep mode for hogged
pins in pinctrl. It provides functions to set pins
to sleep/default configurations according to their
current state.
Signed-off-by: Julien Delacou <julien.delacou@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Up until now, as hogs were always taken at the end of the
pin control device registration, it didn't cause any problem.
But when starting to hog pins from the device core it will
cause deferral of the pin controller device itself since the
default pin fetch is done *before* the device probes, so
let's fix this annoyance (which is also aesthetically ugly).
Also take some care to make sure that if any one map entry
results in a deferral rather than a failure, then that
deferral will take precedence.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
People are back from the holiday breaks, and it shows. Here are a bunch of
fixes for a number of platforms:
- A couple of small fixes for Nomadik
- A larger set of changes for kirkwood/mvebu
- uart driver selection, dt clocks, gpio-poweroff fixups,
a few __init annotation fixes and some error handling improvement
in their xor dma driver.
- i.MX had a couple of minor fixes (and a critical one for flexcan2
clock setup)
- MXS has a small board fix and a framebuffer bugfix
- A set of fixes for Samsung Exynos, fixing default bootargs and some
Exynos5440 clock issues
- A set of OMAP changes including PM fixes and a few sparse warning
fixups
All in all a bit more positive code delta than we'd ideally want to see
here, mostly from the OMAP PM changes, but nothing overly crazy.
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Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"People are back from the holiday breaks, and it shows. Here are a
bunch of fixes for a number of platforms:
- A couple of small fixes for Nomadik
- A larger set of changes for kirkwood/mvebu
- uart driver selection, dt clocks, gpio-poweroff fixups, a few
__init annotation fixes and some error handling improvement in
their xor dma driver.
- i.MX had a couple of minor fixes (and a critical one for flexcan2
clock setup)
- MXS has a small board fix and a framebuffer bugfix
- A set of fixes for Samsung Exynos, fixing default bootargs and some
Exynos5440 clock issues
- A set of OMAP changes including PM fixes and a few sparse warning
fixups
All in all a bit more positive code delta than we'd ideally want to
see here, mostly from the OMAP PM changes, but nothing overly crazy."
* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)
ARM: clps711x: Fix bad merge of clockevents setup
ARM: highbank: save and restore L2 cache and GIC on suspend
ARM: highbank: add a power request clear
ARM: highbank: fix secondary boot and hotplug
ARM: highbank: fix typos with hignbank in power request functions
ARM: dts: fix highbank cpu mpidr values
ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
ARM: mx5: Fix MX53 flexcan2 clock
ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
pinctrl: mvebu: make pdma clock on dove mandatory
ARM: Dove: Add pinctrl clock to DT
dma: mv_xor: fix error handling for clocks
dma: mv_xor: fix error handling of mv_xor_channel_add()
arm: mvebu: Add missing ; for cpu node.
arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
arm: mvebu: Armada XP MV78230 has two cores, not one
clk: mvebu: Remove inappropriate __init tagging
ARM: Kirkwood: Use fixed-regulator instead of board gpio call
ARM: Kirkwood: Fix missing sdio clock
ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
...
With the ability to pass clocks through DT, now make the pdma
clock of dove pinctrl mandatory. Otherwise, pinctrl will hang
the system when accessing some registers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Here are the remaining __dev* removal patches against the 3.8-rc2 tree.
All of these patches were previously sent to the subsystem maintainers,
most of them were picked up and pushed to you, but there were a number
that fell through the cracks, and new drivers were added during the
merge window, so this series cleans up the rest of the instances of
these markings.
Third time's the charm...
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-3.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull driver core __dev* removal patches - take 3 - from Greg Kroah-Hartman:
"Here are the remaining __dev* removal patches against the 3.8-rc2
tree. All of these patches were previously sent to the subsystem
maintainers, most of them were picked up and pushed to you, but there
were a number that fell through the cracks, and new drivers were added
during the merge window, so this series cleans up the rest of the
instances of these markings.
Third time's the charm...
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>"
Fixed up trivial conflict with the pinctrl pull in pinctrl-sirf.c.
* tag 'driver-core-3.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (54 commits)
misc: remove __dev* attributes.
include: remove __dev* attributes.
Documentation: remove __dev* attributes.
Drivers: misc: remove __dev* attributes.
Drivers: block: remove __dev* attributes.
Drivers: bcma: remove __dev* attributes.
Drivers: char: remove __dev* attributes.
Drivers: clocksource: remove __dev* attributes.
Drivers: ssb: remove __dev* attributes.
Drivers: dma: remove __dev* attributes.
Drivers: gpu: remove __dev* attributes.
Drivers: infinband: remove __dev* attributes.
Drivers: memory: remove __dev* attributes.
Drivers: mmc: remove __dev* attributes.
Drivers: iommu: remove __dev* attributes.
Drivers: power: remove __dev* attributes.
Drivers: message: remove __dev* attributes.
Drivers: macintosh: remove __dev* attributes.
Drivers: mfd: remove __dev* attributes.
pstore: remove __dev* attributes.
...
CONFIG_HOTPLUG is going away as an option. As a result, the __dev*
markings need to be removed.
This change removes the use of __devinit, __devexit_p, __devinitdata,
and __devexit from these drivers.
Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.
Cc: Bill Pemberton <wfp5p@virginia.edu>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Barry Song <baohua.song@csr.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch adds a check for npct->prcm_base to make sure that the
address is not NULL before using it, as the driver was made capable of
loading even without a proper memory resource in:
f1671bf pinctrl/nomadik: make independent of prcmu driver
Also, refuses to probe without prcm_base on anything else than nomadik.
This solves the following crash, introduced during the merge window when
booting on U8500 with device tree:
pinctrl-nomadik pinctrl-db8500: No PRCM base, assume no ALT-Cx control is available
Unable to handle kernel NULL pointer dereference at virtual address 00000138
pgd = c0004000
[00000138] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 Not tainted (3.7.0-02892-g1ebaf4f #631)
PC is at nmk_pmx_enable+0x1bc/0x4d0
LR is at clk_disable+0x40/0x44
[snip]
[<c01d5e50>] (nmk_pmx_enable+0x1bc/0x4d0) from [<c01d3ba8>] (pinmux_enable_setting+0x12c/0x1ec)
[<c01d3ba8>] (pinmux_enable_setting+0x12c/0x1ec) from [<c01d1dc8>] (pinctrl_select_state_locked+0xfc/0x134)
[<c01d1dc8>] (pinctrl_select_state_locked+0xfc/0x134) from [<c01d2814>] (pinctrl_register+0x26c/0x43c)
[<c01d2814>] (pinctrl_register+0x26c/0x43c) from [<c01d668c>] (nmk_pinctrl_probe+0x114/0x238)
[<c01d668c>] (nmk_pinctrl_probe+0x114/0x238) from [<c0211cc4>] (platform_drv_probe+0x28/0x2c)
[<c0211cc4>] (platform_drv_probe+0x28/0x2c) from [<c0210738>] (driver_probe_device+0x84/0x21c)
[<c0210738>] (driver_probe_device+0x84/0x21c) from [<c02109c0>] (__device_attach+0x50/0x54)
[<c02109c0>] (__device_attach+0x50/0x54) from [<c020eb1c>] (bus_for_each_drv+0x54/0x9c)
[<c020eb1c>] (bus_for_each_drv+0x54/0x9c) from [<c0210668>] (device_attach+0x84/0x9c)
[<c0210668>] (device_attach+0x84/0x9c) from [<c020fbac>] (bus_probe_device+0x94/0xb8)
[<c020fbac>] (bus_probe_device+0x94/0xb8) from [<c020e084>] (device_add+0x4f0/0x5bc)
[<c020e084>] (device_add+0x4f0/0x5bc) from [<c0276400>] (of_device_add+0x40/0x48)
[<c0276400>] (of_device_add+0x40/0x48) from [<c0276a98>] (of_platform_device_create_pdata+0x68/0x98)
[<c0276a98>] (of_platform_device_create_pdata+0x68/0x98) from [<c0276bac>] (of_platform_bus_create+0xe4/0x260)
[<c0276bac>] (of_platform_bus_create+0xe4/0x260) from [<c0276bf8>] (of_platform_bus_create+0x130/0x260)
[<c0276bf8>] (of_platform_bus_create+0x130/0x260) from [<c0276d94>] (of_platform_populate+0x6c/0xac)
[<c0276d94>] (of_platform_populate+0x6c/0xac) from [<c04a8224>] (u8500_init_machine+0x78/0x140)
[<c04a8224>] (u8500_init_machine+0x78/0x140) from [<c04a3560>] (customize_machine+0x24/0x30)
[<c04a3560>] (customize_machine+0x24/0x30) from [<c00087b0>] (do_one_initcall+0x130/0x1b0)
[<c00087b0>] (do_one_initcall+0x130/0x1b0) from [<c033ff9c>] (kernel_init+0x138/0x2e8)
[<c033ff9c>] (kernel_init+0x138/0x2e8) from [<c000eb18>] (ret_from_fork+0x14/0x20)
Code: 0a00001b e19400b2 e59a200c e0822000 (e592c000)
---[ end trace 1b75b31a2719ed1c ]---
note: swapper/0[1] exited with preempt_count 1
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
commit 7bec207427 remove sirfsoc_gpio_set_pull function,
this patches takes the feature back by adding sirf,pullups and
sirf,pulldowns prop in dts, and the driver will set the GPIO
pull according to the dts.
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The function at91_dt_node_to_map is ultimately called by the function
pinctrl_get, which is an exported function. Since it is possible that this
function is not called from within a probe function, for safety, the kfree
is converted to a devm_kfree, to both free the data and remove it from the
device in a failure situation.
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 is an invalid value for the CAN1_IPP_IND_CANRX_SELECT_INPUT
register. Set it to 2, which correctly selects the GPIO_8 pad.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
I got below build error with random config if CONFIG_PINCTRL_SAMSUNG=y &&
CONFIG_PINCTRL_EXYNOS5440=y.
Fix the build error by making pcfgs static.
LD drivers/pinctrl/built-in.o
drivers/pinctrl/pinctrl-exynos5440.o: In function `.LANCHOR0':
pinctrl-exynos5440.c:(.data+0x54): multiple definition of `pcfgs'
drivers/pinctrl/pinctrl-samsung.o:pinctrl-samsung.c:(.data+0x54): first defined here
make[2]: *** [drivers/pinctrl/built-in.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make: *** [drivers] Error 2
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
struct samsung_pin_bank does not have a member called reg_offset.
It should be pctl_offset instead.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Here are more patches in the progression towards multiplatform, sparse
irq conversions in particular.
Tegra has a handful of cleanups and general groundwork, but is
not quite there yet on full enablement.
Platforms that are enabled through this branch are VT8500 and Zynq. note
that i.MX was converted in one of the earlier cleanup branches as
well (before we started a separate topic for multiplatform). And both
new platforms for this merge window, sunxi and bcm, were merged with
multiplatform support enabled.
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Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC multiplatform conversion patches from Olof Johansson:
"Here are more patches in the progression towards multiplatform, sparse
irq conversions in particular.
Tegra has a handful of cleanups and general groundwork, but is not
quite there yet on full enablement.
Platforms that are enabled through this branch are VT8500 and Zynq.
Note that i.MX was converted in one of the earlier cleanup branches as
well (before we started a separate topic for multiplatform). And both
new platforms for this merge window, sunxi and bcm, were merged with
multiplatform support enabled."
Fix up conflicts mostly as per Olof.
* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
ARM: zynq: Remove all unused mach headers
ARM: zynq: add support for ARCH_MULTIPLATFORM
ARM: zynq: make use of debug_ll_io_init()
ARM: zynq: remove TTC early mapping
ARM: tegra: move debug-macro.S to include/debug
ARM: tegra: don't include iomap.h from debug-macro.S
ARM: tegra: decouple uncompress.h and debug-macro.S
ARM: tegra: simplify DEBUG_LL UART selection options
ARM: tegra: select SPARSE_IRQ
ARM: tegra: enhance timer.c to get IO address from device tree
ARM: tegra: enhance timer.c to get IRQ info from device tree
ARM: timer: fix checkpatch warnings
ARM: tegra: add TWD to device tree
ARM: tegra: define DT bindings for and instantiate RTC
ARM: tegra: define DT bindings for and instantiate timer
clocksource/mtu-nomadik: use apb_pclk
clk: ux500: Register mtu apb_pclocks
ARM: plat-nomadik: convert platforms to SPARSE_IRQ
mfd/db8500-prcmu: use the irq_domain_add_simple()
mfd/ab8500-core: use irq_domain_add_simple()
...
Continued device tree conversion and enablement across a number of
platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
smaller series as well.
ux500 has seen continued conversion for platforms. Several platforms have
seen pinctrl-via-devicetree conversions for simpler multiplatform. Tegra
is adding data for new devices/drivers, and Exynos has a bunch of new
bindings and devices added as well.
So, pretty much the same progression in the right direction as the last
few releases.
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree conversions and enablement from Olof Johansson:
"Continued device tree conversion and enablement across a number of
platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
smaller series as well.
ux500 has seen continued conversion for platforms. Several platforms
have seen pinctrl-via-devicetree conversions for simpler
multiplatform. Tegra is adding data for new devices/drivers, and
Exynos has a bunch of new bindings and devices added as well.
So, pretty much the same progression in the right direction as the
last few releases."
Fix up conflicts as per Olof.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (185 commits)
ARM: ux500: Rename dbx500 cpufreq code to be more generic
ARM: dts: add missing ux500 device trees
ARM: ux500: Stop registering the PCM driver from platform code
ARM: ux500: Move board specific GPIO info out to subordinate DTS files
ARM: ux500: Disable the MMCI gpio-regulator by default
ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
ARM: Kirkwood: Add support LED of OpenBlocks A6
ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
ARM: kirkwood: Add support DT of second I2C bus
ARM: kirkwood: Convert mplcec4 board to pinctrl
ARM: Kirkwood: Convert km_kirkwood to pinctrl
ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
ARM: Kirkwood: Convert IX2-200 to pinctrl.
ARM: Kirkwood: Convert lsxl boards to pinctrl.
ARM: Kirkwood: Convert ib62x0 to pinctrl.
ARM: Kirkwood: Convert GoFlex Net to pinctrl.
ARM: Kirkwood: Convert dreamplug to pinctrl.
ARM: Kirkwood: Convert dockstar to pinctrl.
...
This contains the bulk of new SoC development for this merge window.
Two new platforms have been added, the sunxi platforms (Allwinner A1x
SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
series of ARMv7 platforms from them, where the hope is that we can
keep the platform code generic enough to have them all share one mach
directory. The new Broadcom platform is contributed by Christian Daudt.
Highbank has grown support for Calxeda's next generation of hardware,
ECX-2000.
clps711x has seen a lot of cleanup from Alexander Shiyan, and he's also
taken on maintainership of the platform.
Beyond this there has been a bunch of work from a number of people on
converting more platforms to IRQ domains, pinctrl conversion, cleanup
and general feature enablement across most of the active platforms.
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Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC updates from Olof Johansson:
"This contains the bulk of new SoC development for this merge window.
Two new platforms have been added, the sunxi platforms (Allwinner A1x
SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
series of ARMv7 platforms from them, where the hope is that we can
keep the platform code generic enough to have them all share one mach
directory. The new Broadcom platform is contributed by Christian
Daudt.
Highbank has grown support for Calxeda's next generation of hardware,
ECX-2000.
clps711x has seen a lot of cleanup from Alexander Shiyan, and he's
also taken on maintainership of the platform.
Beyond this there has been a bunch of work from a number of people on
converting more platforms to IRQ domains, pinctrl conversion, cleanup
and general feature enablement across most of the active platforms."
Fix up trivial conflicts as per Olof.
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits)
mfd: vexpress-sysreg: Remove LEDs code
irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids
clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids
irq: versatile: delete dangling variable
ARM: sunxi: add missing include for mdelay()
ARM: EXYNOS: Avoid early use of of_machine_is_compatible()
ARM: dts: add node for PL330 MDMA1 controller for exynos4
ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
ARM: EXYNOS: add UART3 to DEBUG_LL ports
ARM: S3C24XX: Add clkdev entry for camif-upll clock
ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
ARM: sunxi: Add missing sun4i.dtsi file
pinctrl: samsung: Do not initialise statics to 0
ARM i.MX6: remove gate_mask from pllv3
ARM i.MX6: Fix ethernet PLL clocks
ARM i.MX6: rename PLLs according to datasheet
ARM i.MX6: Add pwm support
ARM i.MX51: Add pwm support
ARM i.MX53: Add pwm support
ARM: mx5: Replace clk_register_clkdev with clock DT lookup
...
Here's the large driver core updates for 3.8-rc1.
The biggest thing here is the various __dev* marking removals. This is
going to be a pain for the merge with different subsystem trees, I know,
but all of the patches included here have been ACKed by their various
subsystem maintainers, as they wanted them to go through here.
If this is too much of a pain, I can pull all of them out of this tree
and just send you one with the other fixes/updates and then, after
3.8-rc1 is out, do the rest of the removals to ensure we catch them all,
it's up to you. The merges should all be trivial, and Stephen has been
doing them all in linux-next for a few weeks now quite easily.
Other than the __dev* marking removals, there's nothing major here, some
firmware loading updates and other minor things in the driver core.
All of these have (much to Stephen's annoyance), been in linux-next for
a while.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull driver core updates from Greg Kroah-Hartman:
"Here's the large driver core updates for 3.8-rc1.
The biggest thing here is the various __dev* marking removals. This
is going to be a pain for the merge with different subsystem trees, I
know, but all of the patches included here have been ACKed by their
various subsystem maintainers, as they wanted them to go through here.
If this is too much of a pain, I can pull all of them out of this tree
and just send you one with the other fixes/updates and then, after
3.8-rc1 is out, do the rest of the removals to ensure we catch them
all, it's up to you. The merges should all be trivial, and Stephen
has been doing them all in linux-next for a few weeks now quite
easily.
Other than the __dev* marking removals, there's nothing major here,
some firmware loading updates and other minor things in the driver
core.
All of these have (much to Stephen's annoyance), been in linux-next
for a while.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>"
Fixed up trivial conflicts in drivers/gpio/gpio-{em,stmpe}.c due to gpio
update.
* tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (93 commits)
modpost.c: Stop checking __dev* section mismatches
init.h: Remove __dev* sections from the kernel
acpi: remove use of __devinit
PCI: Remove __dev* markings
PCI: Always build setup-bus when PCI is enabled
PCI: Move pci_uevent into pci-driver.c
PCI: Remove CONFIG_HOTPLUG ifdefs
unicore32/PCI: Remove CONFIG_HOTPLUG ifdefs
sh/PCI: Remove CONFIG_HOTPLUG ifdefs
powerpc/PCI: Remove CONFIG_HOTPLUG ifdefs
mips/PCI: Remove CONFIG_HOTPLUG ifdefs
microblaze/PCI: Remove CONFIG_HOTPLUG ifdefs
dma: remove use of __devinit
dma: remove use of __devexit_p
firewire: remove use of __devinitdata
firewire: remove use of __devinit
leds: remove use of __devexit
leds: remove use of __devinit
leds: remove use of __devexit_p
mmc: remove use of __devexit
...
As can be seen from the diffstat the major changes
are:
- A big conversion of the AT91 pinctrl driver and
the associated ACKed platform changes under
arch/arm/max-at91 and its device trees. This
has been coordinated with the AT91 maintainers
to go in through the pinctrl tree.
- A larger chunk of changes to the SPEAr drivers
and the addition of the "plgpio" driver for the
SPEAr as well.
- The removal of the remnants of the Nomadik driver
from the arch/arm tree and fusion of that into
the Nomadik driver and platform data header files.
- Some local movement in the Marvell MVEBU drivers,
these now have their own subdirectory.
- The addition of a chunk of code to gpiolib under
drivers/gpio to register gpio-to-pin range mappings
from the GPIO side of things. This has been
requested by Grant Likely and is now implemented,
it is particularly useful for device tree work.
Then we have incremental updates all over the place,
many of these are cleanups and fixes from Axel Lin
who has done a great job of removing minor mistakes
and compilation annoyances.
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Merge tag 'pinctrl-for-v3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl changes from Linus Walleij:
"These are the first and major pinctrl changes for the v3.8 merge
cycle. Some of this is used as merge base for other trees so I better
be early on the trigger.
As can be seen from the diffstat the major changes are:
- A big conversion of the AT91 pinctrl driver and the associated ACKed
platform changes under arch/arm/max-at91 and its device trees. This
has been coordinated with the AT91 maintainers to go in through the
pinctrl tree.
- A larger chunk of changes to the SPEAr drivers and the addition of
the "plgpio" driver for the SPEAr as well.
- The removal of the remnants of the Nomadik driver from the arch/arm
tree and fusion of that into the Nomadik driver and platform data
header files.
- Some local movement in the Marvell MVEBU drivers, these now have
their own subdirectory.
- The addition of a chunk of code to gpiolib under drivers/gpio to
register gpio-to-pin range mappings from the GPIO side of things.
This has been requested by Grant Likely and is now implemented, it
is particularly useful for device tree work.
Then we have incremental updates all over the place, many of these are
cleanups and fixes from Axel Lin who has done a great job of removing
minor mistakes and compilation annoyances."
* tag 'pinctrl-for-v3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (114 commits)
ARM: mmp: select PINCTRL for ARCH_MMP
pinctrl: Drop selecting PINCONF for MMP2, PXA168 and PXA910
pinctrl: pinctrl-single: Fix error check condition
pinctrl: SPEAr: Update error check for unsigned variables
gpiolib: Fix use after free in gpiochip_add_pin_range
gpiolib: rename pin range arguments
pinctrl: single: support gpio request and free
pinctrl: generic: add input schmitt disable parameter
pinctrl/u300/coh901: stop spawning pinctrl from GPIO
pinctrl/u300/coh901: let the gpio_chip register the range
pinctrl: add function to retrieve range from pin
gpiolib: return any error code from range creation
pinctrl: make range registration defer properly
gpiolib: rename find_pinctrl_*
gpiolib: let gpiochip_add_pin_range() specify offset
ARM: at91: pm9g45: add mmc support
ARM: at91: Animeo IP: add mmc support
ARM: at91: dt: add mmc pinctrl for Atmel reference boards
ARM: at91: dt: at91sam9: add mmc pinctrl support
ARM: at91/dts: add nodes for atmel hsmci controllers for atmel boards
...
From Kukjin Kim:
* 'next/pinctrl-samsung-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
pinctrl: samsung: Do not initialise statics to 0
Signed-off-by: Olof Johansson <olof@lixom.net>
CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CONFIG_HOTPLUG is going away as an option so __devinitconst is no
longer needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Barry Song <baohua.song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CONFIG_HOTPLUG is going away as an option so __devinitdata is no
longer needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
- ehci-orion dt binding
- gpio-poweroff
- use dt regulators
- move mpp to DT/pinctrl
Depends on:
- orion/boards
- merge conflicts
- keep all 'select's in Kconfig
- remove all #includes in board-*.c
- pinctrl/devel up to:
- 06763c7 pinctrl: mvebu: move to its own directory
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Merge tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux into next/dt
From Jason Cooper:
orion dt for v3.8
- ehci-orion dt binding
- gpio-poweroff
- use dt regulators
- move mpp to DT/pinctrl
Depends on:
- orion/boards
- merge conflicts
- keep all 'select's in Kconfig
- remove all #includes in board-*.c
- pinctrl/devel up to:
- 06763c7 pinctrl: mvebu: move to its own directory
* tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux: (211 commits)
ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
ARM: Kirkwood: Add support LED of OpenBlocks A6
ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
ARM: kirkwood: Add support DT of second I2C bus
ARM: kirkwood: Convert mplcec4 board to pinctrl
ARM: Kirkwood: Convert km_kirkwood to pinctrl
ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
ARM: Kirkwood: Convert IX2-200 to pinctrl.
ARM: Kirkwood: Convert lsxl boards to pinctrl.
ARM: Kirkwood: Convert ib62x0 to pinctrl.
ARM: Kirkwood: Convert GoFlex Net to pinctrl.
ARM: Kirkwood: Convert dreamplug to pinctrl.
ARM: Kirkwood: Convert dockstar to pinctrl.
ARM: Kirkwood: Convert dnskw to pinctrl
ARM: Kirkwood: Convert iConnect to pinctrl.
ARM: Kirkwood: Convert TS219 to pinctrl.
ARM: Kirkwood: Add DTSI files for pinctrl
ARM: Kirkwood: Make use of mvebu pincltl and gpio drivers
...
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
This is adding support for exynos5440, including Quad ARM Cortex-A15
cores and its reference board SSDK5440.
Note, at this moment, just enabled minimal system part for initial kernel
boot and pinctrl driver.
* 'next/soc-exynos5440' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Add pin controller node for Samsung EXYNOS5440 SoC
pinctrl: exynos5440: add pinctrl driver for Samsung EXYNOS5440 SoC
ARM: dts: add initial dts file for EXYNOS5440, SSDK5440
ARM: EXYNOS: add support for EXYNOS5440 SoC
Add/add conflict in arch/arm/boot/dts/Makefile.
Signed-off-by: Olof Johansson <olof@lixom.net>
The Marvell 98DX412x SoC embed a kirkwood variant that does not have
pinctrl support yet. Even though this kirkwood is very similar to the
88f6281, on the MPP front a lot of pins are not available. That's why a
new kirkwood pinctrl variant is needed.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
When setting audio1 pinmux the bits in the corresponding registers
are not cleared. This fix first clears all bits and then sets the
required bits according to the selected function.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
There has been a change in readl/writel to require registers
addresses marked as IOMEM(). This patch takes care of this and
also replaces ORing address offsets with adding them.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Static variables are initialised to 0 by GCC.
Fixes the following checkpatch error:
ERROR: do not initialise statics to 0 or NULL
FILE: pinctrl/pinctrl-samsung.c:50:
static unsigned int pin_base = 0;
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
*map should be tested for NULL instead of map.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add a new pinctrl driver for Samsung EXYNOS5440 SoC. The pin controller
module in EXYNOS5440 is different from the pin controller found on other
Samsung SoC. Hence, the pin controller driver for EXYNOS5440 SoC is
independent of the Samsung pinctrl framework.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
From Kukjin Kim:
Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12
SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA
PHY.
As I commented on [4/7], this branch merged pinctrl/samsung to support
pinctrl for exynos4x12 without useless merge conflicts.
* 'next/dt-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (32 commits)
ARM: EXYNOS: DT Support for SATA and SATA PHY
ARM: dts: Remove broken-voltage property from sdhci node for exynos4210-trats
ARM: dts: Add node for touchscreen for exynos4210-trats
ARM: dts: Add node for touchscreen voltage regulator for exynos4210-trats
ARM: dts: Add node for i2c3 bus for exynos4210-trats
ARM: dts: Add nodes for GPIO keys available on Trats
ARM: dts: Update for pinctrl-samsung driver for exynos4210-trats
ARM: dts: Add nodes for pin controllers for exynos4x12
pinctrl: samsung: Add support for EXYNOS4X12
gpio: samsung: Skip registration if pinctrl driver is present on EXYNOS4X12
ARM: EXYNOS: Skip wakeup-int setup if pinctrl driver is used on EXYNOS4X12
ARM: dts: add board dts file for EXYNOS4412 based SMDK board
ARM: dts: Add support for EXYNOS4X12 SoCs
ARM: EXYNOS: Add devicetree node for TMU driver for exynos5
ARM: EXYNOS: Add devicetree node for TMU driver for exynos4
ARM: EXYNOS: Add MFC device tree support
ARM: dts: Enable serial controllers on Origen and SMDKV310
Documentation: Update samsung-pinctrl device tree bindings documentation
pinctrl: samsung: Add GPIO to IRQ translation
pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
...
Add/add conflicts in:
arch/arm/boot/dts/exynos5250-smdk5250.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/mach-exynos/mach-exynos5-dt.c
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12
SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA
PHY.
As I commented on [4/7], this branch merged pinctrl/samsung to support
pinctrl for exynos4x12 without useless merge conflicts.
* samsung/pinctrl:
pinctrl: samsung: Update error check for unsigned variables
pinctrl: samsung: Add support for EXYNOS4X12
Documentation: Update samsung-pinctrl device tree bindings documentation
pinctrl: samsung: Add GPIO to IRQ translation
pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts
pinctrl: samsung: Use one GPIO chip per pin bank
pinctrl: exynos: Use one IRQ domain per pin bank
pinctrl: samsung: Include bank-specific eint offset in bank struct
pinctrl: samsung: Hold pointer to driver data in bank struct
pinctrl: samsung: Match pin banks with their device nodes
ARM: dts: exynos4210-pinctrl: Add nodes for pin banks
pinctrl: samsung: Distinguish between pin group and bank nodes
pinctrl: samsung: Remove static pin enumerations
pinctrl: samsung: Assing pin numbers dynamically
pinctrl: samsung: Do not pass gpio_chip to pin_to_reg_bank
pinctrl: samsung: Detect and handle unsupported configuration types
Marvell's PXA/MMP silicon also match the behavior of pinctrl-single.
Each pin binds to one register. A lot of pins could be configured
as gpio.
GPIO range is defined as a child node of pinmux in .dtsi file. If those
pins are with the same gpio function configuration in the pinmux
register, they could be defined in the same GPIO range. For this new
child node, two properties are used.
reg = <the start of pinmux register in range, size of range>
pinctrl-single,gpio: <gpio base in range, the gpio function of the range
in the pinmux register>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In Marvell PXA/MMP silicons, input schmitt disable value is 0x40, not 0.
So append new config parameter -- input schmitt disable.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Let's stop spawning the pinctrl driver from the GPIO driver,
we have these two mechanisms broken apart now, and they can
each probe in isolation. If the GPIO driver cannot find its
pin controller (pinctrl-u300), the pin controller core will
tell it to defer probing.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Instead of having the pinctrl driver register the GPIO range
for the gpio_chip, making it necessary to instantiate the
pin controller from the GPIO driver and pass the GPIO chip as
platform data, now let the GPIO chip driver register it's own
ranges and have the pinctrl driver look up the GPIO chip from
the pinctrl core as necessary.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a function to the pinctrl core to retrieve the GPIO
range associated with a certain pin for a certain controller.
This is needed when a pinctrl driver want to look up the
corresponding struct gpio_chip for a certain pin. As the
GPIO drivers can now create these ranges themselves, the
pinctrl driver no longer knows about all its associated GPIO
chips.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This makes the pinctrl_find_and_add_gpio_range() return
-EPROBE_DEFER if the range hosting pin controller cannot be
located. We may assume that the common case for why adding a
range fails is that the targe pin controller device has not
probed yet.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rename the function find_pinctrl_and_add_gpio_range()
to pinctrl_find_and_add_gpio_range() so as to be consistent
with the rest of the functions.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch extends the driver with any necessary SoC-specific
definitions to support EXYNOS4X12 SoCs.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
They are not referenced outside of this file, make them static.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
of_match_device() may return NULL.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dump pinmux register value, not only function part in the pinmux
register.
Also fix the issue on caluclating pin offset. The last parameter
should be pin number, not register offset.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
SPEAr SoC's don't do anything in clk_prepare() of plgpio driver,
so there is no need to call this routine multiple times. Just
call it once at probe.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver allows clk_get() failure, and still work without it.
This patch adds !IS_ERR(plgpio->clk) checking in plgpio_request() error path
so we only call clk_disable_unprepare() if clk_prepare_enable() is called.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently get_gpio_pingroup() may return NULL or ERR_PTR(-EINVAL) when
no gpio_pingroup found. The caller in gpio_request_endisable() only
checks if the return value is NULL. Return ERR_PTR(-EINVAL) for
get_gpio_pingroup() causes problem and seems not necessary.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Return -ENOMEM instead of 0 if irq_domain_add_linear fails.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Current code does not work if count > 1, fix it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Current code sets "pin_reg = &info->pin_regs[i];" in each loop iteration,
so in the case of no-match, pin_reg is not NULL.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The main samsung pinctrl module references the specific exynos4210
pinctrl driver, which selects the main driver in Kconfig.
Making the main driver a silent "bool" option avoid this potential
build error if CONFIG_PINCTRL_SAMSUNG=y && CONFIG_PINCTRL_EXYNOS4=n:
drivers/built-in.o:(.rodata+0x4e4): undefined reference to `exynos4210_pin_ctrl'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
They are not referenced outside of this file, make them static.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The clkout group is split into groups clkout1 and clkout2
which allows pins cklkout1 and clkout2 to be muxed
separately.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The clkout group is split into groups clkout1 and clkout2
which allows pins cklkout1 and clkout2 to be muxed
separately.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use managed resources API to simplify the code.
Also ensure we do request mem_region before ioremap.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Then we can remove "select PINMUX && PINCONF" from PINCTRL_TEGRA{20,30}.
This simplifies the dependency.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Then we can remove "select PINMUX && PINCONF" from PINCTRL_IMX{23,28}.
This simplifies the dependency.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
They are not referenced outside of this file, make them static.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently pinmux_enable_setting does not release all taken pins if
ops->enable() returns error. This patch ensures all taken pins are
released in any error paths.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Both ltq_pinctrl_dt_node_to_map() and ltq_pinctrl_dt_free_map() are not
referenced outside of this file. Make them static.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Current code adds empty ltq_pmx_disable() because pinmux_check_ops() requires
this callback to be defined.
This is not required since commit 02b50ce4cb
"pinctrl: make pinmux disable function optional".
Thus remove ltq_pmx_disable() function.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Different SPEAr SoCs have different approach to configure pins as gpios. Some
configure a group of gpios with single register bit and others have one bit per
gpio pin. Only earlier one is implemented till now, this patch adds support for
later one.
Here we add callbacks to SoC specific code to configure gpios in
gpio_request_enable(). That will do additional SoC specific configuration to
enable gpio pins.
We also implement this callback for SPEAr1340 in this patch.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
They are not referenced outside respective driver.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Simon Arlott <simon@fire.lp0.eu>
Cc: John Crispin <blogic@openwrt.org>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Most of SPEAr SoCs, which support pinctrl, can configure & use pads as gpio.
This patch gpio enable support for SPEAr pinctrl drivers.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The fact that of_gpiochip_add_pin_range() and
gpiochip_add_pin_range() share too much code is fragile and
will invariably mean that bugs need to be fixed in two places
instead of one.
So separate the concerns of gpiolib.c and gpiolib-of.c and
have the latter call the former as back-end. This is necessary
also when going forward with other device descriptions such
as ACPI.
This is done by:
- Adding a return code to gpiochip_add_pin_range() so we can
reliably check whether this succeeds.
- Get rid of the custom of_pinctrl_add_gpio_range() from
pinctrl. Instead create of_pinctrl_get() to just retrive the
pin controller per se from an OF node. This composite
function was just begging to be deleted, it was way to
purpose-specific.
- Use pinctrl_dev_get_name() to get the name of the retrieved
pin controller and use that to call back into the generic
gpiochip_add_pin_range().
Now the pin range is only allocated and tied to a pin
controller from the core implementation in gpiolib.c.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Staticize sirfsoc_gpio_irq_map() function.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Staticize u300_pin_config_get() and u300_pin_config_set() functions.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the U300 pin controller to use managed resources
(devm_*) for it's memory region.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This switches the COH 901 pin controller to use managed
resources (devm_*) for memory remaps, clocks, etc.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This switches the COH 901 pinctrl driver to allocate its GPIO
IRQs dynamically, and start to use a linear irqdomain to map
from the hardware IRQs.
This way we can cut away the complex allocation of IRQ numbers
from the <mach/irqs.h> file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Most of SPEAr SoCs, which support pinctrl, can configure & use
pads as gpio. This patch adds plgpio driver for configuring
these pads as gpio.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl subsystem needs gpio chip base to prepare set of gpio
pin ranges, which a given pinctrl driver can handle. This is
important to handle pinctrl gpio request calls in order to
program a given pin properly for gpio operation.
As gpio base is allocated dynamically during gpiochip
registration, presently there exists no clean way to pass this
information to the pinctrl subsystem.
After few discussions from [1], it was concluded that may be
gpio controller reporting the pin range it supports, is a
better way than pinctrl subsystem directly registering it.
[1] http://comments.gmane.org/gmane.linux.ports.arm.kernel/184816
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
[Edited documentation a bit]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This reverts earlier commit which removed
pinctrl_remove_gpio_range(), because at that time there
weren't any more users of that routine. It was removed as the
removal of ranges was done in unregister of pinctrl.
But as we are now registering stuff from gpiolib, we may
remove and insert a gpio module multiple times. So, we
need this routine again.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The of_device_id table is supposed to be zero-terminated.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The driver supports old up SiRFprimaII SoCs, this patch makes it support
the new SiRFmarco as well.
SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to
disable GPIO pad, we should write 1 to the corresponding bit in the new
CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Like the spear platform, the mvebu platform has multiple files: one
core file, and then one file per SoC family. More files will be added
later, as support for mach-orion5x and mach-mv78xx0 SoCs is added to
pinctrl-mvebu. For those reasons, having a separate subdirectory,
drivers/pinctrl/mvebu/ makes sense, and it had already been suggested
by Linus Wallej when the driver was originally submitted.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Including the core.h header for the pinctrl subsystem is not
necessary, and it is actually causing problems when moving the
pinctrl-mvebu drivers into a separate subdirectory.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The mach-kirkwood and mach-dove architectures have not yet been
integrated into the mach-mvebu directory, which should ultimately
contain the support for all Marvell SoCs from the Engineering Business
Unit.
However, before this can happen, we need to let mach-kirkwood and
mach-dove use the pinctrl-mvebu driver, which supports the kirkwood
and dove SoC families. In order to do that, we make this driver
available as soon as PLAT_ORION is selected, instead of using
ARCH_MVEBU as a condition. In the long term, PLAT_ORION should
disappear and be fully replaced by ARCH_MVEBU, but the plan is to make
the migration step by step, by first having the existing mach-*
directories for Marvell SoCs converge on several infrastructures,
including the pinctrl one.
Also, like the spear pinctrl driver, we put all pinctrl-mvebu Kconfig
options under a if, in order to avoid having certain options
(PINCTRL_DOVE, PINCTRL_KIRKWOOD, etc.) selecting an option
(PINCTLR_MVEBU) which itself has a dependency (on ARCH_MVEBU). In this
a construct, the dependency is in fact ignored due to the selects.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This switches the way that pins are reserved for multiplexing:
We used to do this when the map was parsed, at the creation of
the settings inside the pinctrl handle, in pinmux_map_to_setting().
However this does not work for us, because we want to use the
same set of pins with different devices at different times: the
current code assumes that the pin groups in a pinmux state will
only be used with one single device, albeit different groups can
be active at different times. For example if a single I2C driver
block is used to drive two different busses located on two
pin groups A and B, then the pins for all possible states of a
function are reserved when fetching the pinctrl handle: the
I2C bus can choose either set A or set B by a mux state at
runtime, but all pins in both group A and B (the superset) are
effectively reserved for that I2C function and mapped to the
device. Another device can never get in and use the pins in
group A, even if the device/function is using group B at the
moment.
Instead: let use reserve the pins when the state is activated
and drop them when the state is disabled, i.e. when we move to
another state. This way different devices/functions can use the
same pins at different times.
We know that this is an odd way of doing things, but we really
need to switch e.g. an SD-card slot to become a tracing output
sink at runtime: we plug in a special "tracing card" then mux
the pins that used to be an SD slot around to the tracing
unit and push out tracing data there instead of SD-card
traffic.
As a side effect pinmux_free_setting() is unused but the stubs
are kept for future additions of code.
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Loic Pallardy <loic.pallardy@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Jean Nicolas Graux <jean-nicolas.graux@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
One group definition was missing, so add it.
Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently there are some unnecessary criss-cross
dependencies between the PRCMU driver in MFD and a lot of
other drivers, mainly because other drivers need to poke
around in the PRCM register range.
In cases like this there are actually just a few select
registers that the pinctrl driver need to read/modify/write,
and it turns out that no other driver is actually using
these registers, so there are no concurrency issues
whatsoever.
So: don't let the location of the register range complicate
things, just poke into these registers directly and skip
a layer of indirection.
Take this opportunity to add kerneldoc to the pinctrl
state container.
Cc: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch fixes below build error when !CONFIG_OF_GPIO.
CC drivers/pinctrl/pinctrl-samsung.o
drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins':
drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable]
drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register':
drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node'
make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make: *** [drivers] Error 2
The samsung pinctrl driver supports only device tree enabled
platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB.
The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available
when GPIOLIB is selected.
Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make
PINCTRL_EXYNOS4 depend on OF && GPIOLIB.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The platform_device_id table is supposed to be zero-terminated.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
CLCD pads must be configured differently for sleep mode. This patch adds support
for clcd_sleep_pingroup.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some gpio pins are used to control DDR reset and clock enable while the system
is moved into Low power. This patch adds in the corresponding GPIO entries in
the pads_as_gpio_pins to ensure the pads are available as gpio's.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pad direction must also be updated for SPEAr1310, while setting pads values.
This patch adds support for that.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
SPEAr1310 has separate PCI and PCIe implementations which are not muxed with
each other. Presently they have been implemented as muxed together with SATA and
are represented wrongly in the software.
In reality only PCIe and SATA implementations are muxed with each other. This
patch separates out pci pins creating a new pingroup and function for pci.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All group names in SPEAr pinctrl have "_grp" at the end of their name. Do the
same for clcd_high_res_grp.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pin entries of rmii and smii are interchanged by mistake. Fix it.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
To have pwm on pad no. 34 we also need to select between pwm and SD_LED
functions. Add this to pwm pin mux register configuration.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Not all bits of a register are used for pinctrl in SPEAr. So only update bits
relevant to pinctrl using muxreg->mask.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the Nomadik and Ux500 platforms to use SPARSE_IRQ.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This merges the old <plat/pincfg.h> header into
<linux/platform_data/pinctrl-nomadik.h> and rids us of
yet one more <plat/*> include.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the platform data header for the Nomadik pin controller
to <linux/platform_data/pinctrl-nomadik.h>.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
kp_a_2 pin group was defined but was not declared
as a group of kp function.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In pinctrl-nomadik-db8500.c, add missing definitions that deal
with other alternate-C functions.
Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This merges the old <plat/pincfg.h> header into
<linux/platform_data/pinctrl-nomadik.h> and rids us of
yet one more <plat/*> include.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the platform data header for the Nomadik pin controller
to <linux/platform_data/pinctrl-nomadik.h>.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Move NMK_GPIO_PER_CHIP to gpio-nomadik.h and define it with a
shift operator.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
With DB8500 the number of GPIO chips = number GPIO bank =
number of GPIO ranges.
With DB8540, a new GPIO range configuration is used, some GPIO
banks can have several GPIO ranges.
For example, DB8540 GPIO bank0 (GPIO0 to GPIO32) have 2 GPIO
ranges:
- GPIO0 to GPIO17 : routed
- GPIO18 to GPIO21 : hole
- GPIO22 to GPIO28 : routed
- GPIO29 to GPIO32 : hole
Previously, during nmk_pinctrl_probe(), all GPIO ranges were
parsed, as GPIO ranges are larger than the number of GPIO chips,
a warning occurs. This commit allows each bank to have several
GPIO ranges.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The variable pin is initialized but never used
otherwise, so remove the unused variable.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Using for_each_set_bit() to simplify the code.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Remove duplicated include.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
/opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c: In function 'at91_pinctrl_probe_dt':
/opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c:952:12: warning: assignment discards qualifiers from pointer target type
/opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c: In function 'at91_gpio_probe':
/opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c:1517:17: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
If we do this
interrupt-parent = <&pioA>;
interrupts = <7 0x0>;
The current core map the irq correctly but the gpio is not configured as input.
The pinctrl configure the pin as gpio with the correct mux parameter but is
not responsible to configure it as input.
So do it during the xlate
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When creating the simple irqdomain, pass the DT node pointer along,
as is apropriate.
Acked-by: Lee Jones <lee.jones@linaro.org>
Reported-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The irqdomain semantics were supposed to be such that a linear
domain would be used if the passed first_irq was zero or
negative, but I got it wrong so only passing zero as first_irq
will work properly. Well, zero is NO_IRQ these days so let's
pass zero. The semantics of irqdomain_add_simple() will be
fixed in a separate patch.
Acked-by: Lee Jones <lee.jones@linaro.org>
Reported-by: Rikard Olsson <rikard.p.olsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the missing unlock on the error handle path in function
pinctrl_groups_show().
Cc: stable@kernel.org
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since in the DT case, the linear domain path will not allocate
descriptors for the IRQs, we need to use irq_create_mapping()
for mapping hwirqs to Linux IRQs, so these descriptors get
created on-the-fly in this case.
ChangeLog v1->v2:
- Just use irq_create_mapping() in the .to_irq function since
this is called before unmasking or enabling any interrupt
lines, so irq_find_mapping() should be sufficient for the
IRQ handler function.
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Mutex is locked duplicatly by pinconf_groups_show() and
pin_config_group_get(). It results dead lock. So avoid to lock mutex
in pinconf_groups_show().
Cc: stable@kernel.org
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some drivers require a way to translate GPIO pins to their IRQ numbers.
This patch adds the .to_irq() gpiolib callback to pinctrl-samsung
driver, which creates (if not present yet) and returns an IRQ mapping
for given GPIO pin.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pins used as wake-up interrupts need to be configured as EINTs. This
patch adds the required configuration code to exynos_wkup_irq_set_type,
to set the pin as EINT when its interrupt trigger type is configured.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch reworks wake-up interrupt handling in pinctrl-exynos driver,
so each pin bank, which provides wake-up interrupts, has its own IRQ
domain.
Information about whether given pin bank provides wake-up interrupts,
how many and whether they are separate or muxed are parsed from device
tree.
It gives following advantages:
- interrupts can be specified in device tree in a more readable way,
e.g. :
device {
/* ... */
interrupt-parent = <&gpx2>;
interrupts = <4 0>;
/* ... */
};
- the amount and layout of interrupts is not hardcoded in the code
anymore, but defined in SoC-specific structure
- bank and pin of each wake-up interrupt can be easily identified, to
allow operations, such as setting the pin to EINT function, from
irq_set_type() callback
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch modifies the pinctrl-samsung driver to register one GPIO chip
per pin bank, instead of a single chip for all pin banks of the
controller.
It simplifies GPIO accesses a lot (constant time instead of looping
through the list of banks to find the right one) and should have a good
effect on performance of any bit-banging driver.
In addition it allows to reference GPIO pins by a phandle to the bank
node and a local pin offset inside of the bank (similar to previous
gpiolib driver), which is more clear and readable than using indices
relative to the whole pin controller.
Example:
device {
/* ... */
gpios = <&gpk0 4 0>;
/* ... */
};
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Instead of registering one IRQ domain for all pin banks of a pin
controller, this patch implements registration of per-bank domains.
At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts
of Exynos4x12) it simplifies driver code and device tree sources,
because GPIO interrupts can be now specified per banks.
Example:
device {
/* ... */
interrupt-parent = <&gpa1>;
interrupts = <3 0>;
/* ... */
};
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some SoCs, like Exynos4x12, have non-sequential layout of EINT control
registers and so current way of calculating register addresses does not
work correctly for them.
This patch adds eint_offset field to samsung_pin_bank struct and
modifies the driver to use it instead of calculating the offsets from
bank index.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch is a preparation for converting the pinctrl-samsung driver to
one GPIO chip and IRQ domain per bank. It allows one having only
a pointer to particular bank struct to access driver data struct.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch is a preparation for converting the pinctrl-samsung driver to
one GPIO chip and IRQ domain per bank. It binds banks defined by
internal driver data with bank nodes in device tree.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch modifies the loop iterating over all child nodes and parsing
pin groups to check whether the node is really a pin group node by
checking for existence of samsung,pins property.
This is a prerequisite for further patches adding additional subnodes to
the pinctrl node, required for per bank GPIO and interrupt specifiers.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since pin numbers are now assigned dynamically, those are not needed
anymore.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch modifies the pinctrl-samsung driver to assign numbers to pins
dynamically instead of static enumerations.
Thanks to this change the amount of code requried to support a SoC can
be greatly reduced and the code made more readable.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pointer to gpio_chip passed to pin_to_reg_bank utility function is
used only to retrieve a pointer to samsung_pinctrl_drv_data structure.
This patch modifies the function and its users to pass a pointer to
samsung_pinctrl_drv_data directly.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch modifies the pinctrl-samsung driver to detect when width of a
bit field is set to zero (which means that such configuraton type is not
supported) and return an error instead of trying to modify an inexistent
register.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since the simple irqdomain will fall back to a linear domain
if the first_irq provided is <= 0, just use this, just make
sure the first_irq is negative in the device tree case.
Cc: Rob Herring <rob.herring@calxeda.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The compilation of the pinctrl driver failed on the legacy
Nomadik NHK8815 platform because it was not providing the PRCMU
interfaces needed to support the extended alternate functions
used by the ux500 series.
Solve this by providing some stubs for the legacy platform, to
avoid too much #ifdefs in the code per se. Theoretically this
actually allows the Nomadik and Ux500 to have a single kernel
image with support for the PRCM registers on the Ux500 (though
they have incompatible archs, but the spirit is there).
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Remove duplicated include.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The prima2 platform advertises needing no mach/gpio.h header file,
but its pinctrl driver now has a sirfsoc_gpio_set_pull function
that uses constants defined in arch/arm/mach-prima2/include/mach/gpio.h,
which fails to build.
Fortunately, the sirfsoc_gpio_set_pull is not used anywhere in the
kernel, so we can safely remove it. Any out of tree drivers using
it will have to be converted to use proper pinctrl functions to
do the same.
Without this patch, building prima2_defconfig results in:
drivers/pinctrl/pinctrl-sirf.c: In function 'sirfsoc_gpio_set_pull':
drivers/pinctrl/pinctrl-sirf.c:1331:7: error: 'SIRFSOC_GPIO_PULL_NONE' undeclared (first use in this function)
drivers/pinctrl/pinctrl-sirf.c:1331:7: note: each undeclared identifier is reported only once for each function it appears in
drivers/pinctrl/pinctrl-sirf.c:1334:7: error: 'SIRFSOC_GPIO_PULL_UP' undeclared (first use in this function)
drivers/pinctrl/pinctrl-sirf.c:1338:7: error: 'SIRFSOC_GPIO_PULL_DOWN' undeclared (first use in this function)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In case of error, the function pinctrl_register() returns
NULL not ERR_PTR(). The PTR_ERR() in the return value
should be replaced with error no.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Remove duplicated include.
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pointer to "pdev->dev" is already stored in "dev", so use it in
devm_request_and_ioremap().
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The samsung pinctrl driver has a probe function that is
__devinit and that calls a lot of other functions that are
marked __init, which kbuild complains about.
Marking everything __devinit means that the code does not
discarded when CONFIG_HOTPLUG is set, which is a little
more wasteful, but also more consistent
Without this patch, building exynos_defconfig results in:
WARNING: drivers/pinctrl/built-in.o(.devinit.text+0x124): Section mismatch in reference from the function samsung_pinctrl_probe() to the function .init.text:samsung_gpiolib_register()
The function __devinit samsung_pinctrl_probe() references
a function __init samsung_gpiolib_register().
If samsung_gpiolib_register is only used by samsung_pinctrl_probe then
annotate samsung_gpiolib_register with a matching annotation.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is also include the gpio controller as the IP share both.
Each soc will have to describe the SoC limitation and pin configuration via
DT.
This will allow to do not need to touch the C code when adding new SoC if the
IP version is supported.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This alters the Nomadik pinctrl driver to:
- Call irqdomain_add_linear() for the DT case so we get
all independent from IRQ numbers in this case.
- Call irqdomain_add_simple() for the legacy case, which
allocates the IRQ descriptors for the Nomadik pin controller
dynamically.
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Upgrade nomadik pinctrl driver to enable selection of other
alternate-C[1-4] functions on some specific ux500 SoC pins.
Handling of those functions is done thanks to PRCM GPIOCR
registers. This was previously managed in PRCMU driver and
it was not really convenient. Idea is to provide a common
way to control all alternate functions.
Note that this improvement does not support the old-fashioned way
used to control nomadik pins, namely the "nmk_config_pin()" function
and its derivatives.
Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pull MIPS update from Ralf Baechle:
"This is the MIPS update for 3.7.
A fair chunk of them are platform updates to the Cavium Octeon SOC
(which involves machine generated header files of considerable size),
Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx
platforms.
Support for the commercial MIPS simulator MIPSsim has been removed as
MIPS Technologies is shifting away from this product and Qemu is
offering various more powerful platforms. The generic MIPS code can
now also probe for no-execute / write-only TLB features implemented
without the full SmartMIPS extension as permitted by the latest MIPS
processor architecture. Lots of small changes to generic code."
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits)
MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs
MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x
MIPS: BCM63XX: Properly handle mac address octet overflow
MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user.
MIPS: Replace `-' in defconfig filename wth `_' for consistency.
MIPS: Wire kcmp syscall.
MIPS: MIPSsim: Remove the MIPSsim platform.
MIPS: NOTIFY_RESUME is not needed in TIF masks
MIPS: Merge the identical "return from syscall" per-ABI code
MIPS: Unobfuscate _TIF..._MASK
MIPS: Prevent hitting do_notify_resume() with !user_mode(regs).
MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.
MIPS: Add base architecture support for RI and XI.
MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.
MIPS: uasm: Add INS and EXT instructions.
MIPS: Avoid pipeline stalls on some MIPS32R2 cores.
MIPS: Make VPE count to be one-based.
MIPS: Add new end of interrupt functionality for GIC.
MIPS: Add EIC support for GIC.
MIPS: Code clean-ups for the GIC.
...
This branch contains updates to OMAP and Marvell platforms (kirkwood,
dove, mvebu) that came in after we had done the big multiplatform merges,
so they were kept separate from the rest, and not separated into the
traditional topics of cleanup/driver/platform features.
For OMAP, the updates are:
- Runtime PM conversions for the GPMC and RNG IP blocks
- Preparation patches for the OMAP common clock framework conversion
- clkdev alias additions required by other drivers
- Performance Monitoring Unit (PMU) support for OMAP2, 3, and non-4430 OMAP4
- OMAP hwmod code and data improvements
- Preparation patches for the IOMMU runtime PM conversion
- Preparation patches for OMAP4 full-chip retention support
For Kirkwood/Dove/mvebu:
- New driver for "address decoder controller" for mvebu, which
is a piece of hardware that configures addressable devices and
peripherals. First user is the boot rom aperture on armada XP since
it is needed for SMP support.
- New device tree bindings for peripherals such as gpio-fan, iconnect
nand, mv_cesa and the above address decoder controller.
- Some defconfig updates, mostly to enable new DT boards and a few drivers.
- New drivers using the pincontrol subsystem for dove, kirkwood and mvebu
- New clean gpio driver for mvebu
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Merge tag 'soc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull late ARM soc platform updates from Olof Johansson:
"This branch contains updates to OMAP and Marvell platforms (kirkwood,
dove, mvebu) that came in after we had done the big multiplatform
merges, so they were kept separate from the rest, and not separated
into the traditional topics of cleanup/driver/platform features.
For OMAP, the updates are:
- Runtime PM conversions for the GPMC and RNG IP blocks
- Preparation patches for the OMAP common clock framework conversion
- clkdev alias additions required by other drivers
- Performance Monitoring Unit (PMU) support for OMAP2, 3, and
non-4430 OMAP4
- OMAP hwmod code and data improvements
- Preparation patches for the IOMMU runtime PM conversion
- Preparation patches for OMAP4 full-chip retention support
For Kirkwood/Dove/mvebu:
- New driver for "address decoder controller" for mvebu, which is a
piece of hardware that configures addressable devices and
peripherals. First user is the boot rom aperture on armada XP
since it is needed for SMP support.
- New device tree bindings for peripherals such as gpio-fan, iconnect
nand, mv_cesa and the above address decoder controller.
- Some defconfig updates, mostly to enable new DT boards and a few
drivers.
- New drivers using the pincontrol subsystem for dove, kirkwood and
mvebu
- New clean gpio driver for mvebu"
* tag 'soc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (98 commits)
ARM: mvebu: fix build breaks from multi-platform conversion
ARM: OMAP4460/4470: PMU: Enable PMU for OMAP4460/70
ARM: OMAP2+: PMU: Add runtime PM support
ARM: OMAP4430: PMU: prepare to create PMU device via HWMOD
ARM: OMAP2+: PMU: Convert OMAP2/3 devices to use HWMOD
ARM: OMAP3: hwmod data: Add debugss HWMOD data
ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems
ARM: OMAP: Add a timer attribute for timers that can interrupt the DSP
hwrng: OMAP: remove SoC restrictions from driver registration
ARM: OMAP: split OMAP1, OMAP2+ RNG device registration
hwrng: OMAP: convert to use runtime PM
hwrng: OMAP: store per-device data in per-device variables, not file statics
ARM: OMAP2xxx: hwmod/CM: add RNG integration data
ARM: OMAP2+: gpmc: minimal driver support
ARM: OMAP2+: gpmc: Adapt to HWMOD
ARM: OMAP2/3: hwmod data: add gpmc
ARM: OMAP4: hwmod data: add mmu hwmod for ipu and dsp
ARM: OMAP3: hwmod data: add mmu data for iva and isp
ARM: OMAP: iommu: fix including iommu.h without IOMMU_API selected
ARM: OMAP4: hwmod data: add missing HWMOD_NO_IDLEST flags to some PRCM IP blocks
...
- Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs,
provide platform config for the Nomadik.
- Add a driver for the i.MX35.
- Add a driver for the BCM2835, an advanced GPIO expander.
- Various fixes and clean-ups and minor improvements for the core,
Nomadik, pinctr-single, sirf drivers.
- Some platform config for the ux500.
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Merge tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl changes from Linus Walleij:
"Some of this stuff is hitting arch/arm/* and have been ACKed by the
ARM SoC folks, or it's device tree bindings pertaining to the specific
driver.
These are the bulk pinctrl changes for kernel v3.7:
- Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs,
provide platform config for the Nomadik.
- Add a driver for the i.MX35.
- Add a driver for the BCM2835, an advanced GPIO expander.
- Various fixes and clean-ups and minor improvements for the core,
Nomadik, pinctr-single, sirf drivers.
- Some platform config for the ux500."
* tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (27 commits)
pinctrl: add bcm2835 driver
pinctrl: clarify idle vs sleep states
pinctrl/nomadik: use irq_find_mapping()
pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irq
pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_range
pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_input
pinctrl: sirf: add missing pins to pinctrl list
pinctrl: sirf: fix a typo in sirfsoc_gpio_probe
pinctrl: pinctrl-single: add debugfs pin h/w state info
ARM: ux500: 8500: update I2C sleep states pinctrl
pinctrl: Fix potential memory leak in pinctrl_register_one_pin()
ARM: ux500: tidy up pin sleep modes
ARM: ux500: fix spi2 pin group
pinctrl: imx: remove duplicated const
pinctrl: document semantics vs GPIO
ARM: ux500: 8500: use hsit_a_2 group for HSI
pinctrl: use kasprintf() in pinmux_request_gpio()
pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux
pinctrl/nomadik : add MC1_a_2 pin MC1 function group list
pinctrl: pinctrl-single: Make sure we do not change bits outside of mask
...
- A long-coming conversion of various platforms to a common LED
infrastructure
- AT91 is moved over to use the newer MCI driver for MMC
- Pincontrol conversions for samsung platforms
- DT bindings for gscaler on samsung
- i2c driver fixes for tegra, acked by i2c maintainer
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Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc driver specific changes from Olof Johansson:
- A long-coming conversion of various platforms to a common LED
infrastructure
- AT91 is moved over to use the newer MCI driver for MMC
- Pincontrol conversions for samsung platforms
- DT bindings for gscaler on samsung
- i2c driver fixes for tegra, acked by i2c maintainer
Fix up conflicts as per Olof.
* tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
drivers: bus: omap_l3: use resources instead of hardcoded irqs
pinctrl: exynos: Fix wakeup IRQ domain registration check
pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data
pinctrl: exynos: Correct the detection of wakeup-eint node
pinctrl: exynos: Mark exynos_irq_demux_eint as inline
pinctrl: exynos: Handle only unmasked wakeup interrupts
pinctrl: exynos: Fix typos in gpio/wkup _irq_mask
pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa
drivers: bus: Move the OMAP interconnect driver to drivers/bus/
i2c: tegra: dynamically control fast clk
i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20
ARM: tegra: clock: remove unused clock entry for i2c
ARM: tegra: clock: add connection name in i2c clock entry
i2c: tegra: pass proper name for getting clock
ARM: tegra: clock: add i2c fast clock entry in clock table
ARM: EXYNOS: Adds G-Scaler device from Device Tree
ARM: EXYNOS: Add clock support for G-Scaler
ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform
ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC
ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used
...
A shorter cleanup branch submitted separately due to dependencies with
some of the previous topics.
Major thing here is that the Broadcom bcmring platform is removed. It's an
SoC that's used on some stationary VoIP platforms, and is in desperate
need of some cleanup. Broadcom came back and suggested that we just
deprecate the platform for now, since they aren't going to spend the
resources needed on cleaning it up, and there are no users of the platform
directly from mainline.
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Merge tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc cleanups, part 2 from Olof Johansson:
"A shorter cleanup branch submitted separately due to dependencies with
some of the previous topics.
Major thing here is that the Broadcom bcmring platform is removed.
It's an SoC that's used on some stationary VoIP platforms, and is in
desperate need of some cleanup. Broadcom came back and suggested that
we just deprecate the platform for now, since they aren't going to
spend the resources needed on cleaning it up, and there are no users
of the platform directly from mainline."
Fix some conflicts due to BCM2835 getting added next to the removed
BCMRING, and removal of tegra files that had been converted to
devicetree.
* tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: Orion5x: ts78xx: Add IOMEM for virtual addresses.
ARM: ux500: use __iomem pointers for MMIO
ARM: Remove mach-bcmring
ARM: clps711x: Remove board support for CEIVA
ARM: clps711x: Fix register definitions
ARM: clps711x: Fix lowlevel debug-macro
ARM: clps711x: Added simple clock framework
pinctrl: tegra: move pinconf-tegra.h content into drivers/pinctrl
ARM: tegra: delete unused headers
ARM: tegra: remove useless includes of <mach/*.h>
ARM: tegra: remove dead code
Device tree conversion and enablement branch. Mostly a bunch of new
bindings and setup for various platforms, but the Via/Winchip VT8500
platform is also converted over from being 100% legacy to now use
device tree for probing. More of that will come for 3.8.
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc device tree updates from Olof Johansson:
"Device tree conversion and enablement branch. Mostly a bunch of new
bindings and setup for various platforms, but the Via/Winchip VT8500
platform is also converted over from being 100% legacy to now use
device tree for probing. More of that will come for 3.8."
Trivial conflicts due to removal of vt8500 files, and one documentation
file that was added with slightly different contents both here and in
the USb tree.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (212 commits)
arm: vt8500: Fixup for missing gpio.h
ARM: LPC32xx: LED fix in PHY3250 DTS file
ARM: dt: mmp-dma: add binding file
arm: vt8500: Update arch-vt8500 to devicetree support.
arm: vt8500: gpio: Devicetree support for arch-vt8500
arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
arm: vt8500: clk: Add Common Clock Framework support
video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
serial: vt8500: Add devicetree support for vt8500-serial
rtc: vt8500: Add devicetree support for vt8500-rtc
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support
ARM: tegra: Add Avionic Design Medcom-Wide support
ARM: tegra: Add Avionic Design Plutux support
ARM: tegra: Add Avionic Design Tamonten support
ARM: tegra: dts: Add pwm label
ARM: ux500: Fix SSP register address format
ARM: ux500: Apply tc3589x's GPIO/IRQ properties to HREF's DT
ARM: ux500: Remove redundant #gpio-cell properties from Snowball DT
ARM: ux500: Add all encompassing sound node to the HREF Device Tree
...
The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt
controller, and pinmux/control device.
Original driver by Simon Arlott.
Rewrite including GPIO chip device by Chris Boot.
Upstreaming changes by Stephen Warren:
* Wrote DT binding documentation.
* Changed brcm,function to an integer to more directly match the
datasheet, and to match brcm,pins being an integer.
* Implemented pull-up/down pin config.
* Removed read-only DT property and related code. The restriction this
implemented are driven by the board, not the GPIO HW block, so don't
really make sense of a HW block binding, were in general incomplete
(since they could only know about the few pins hard-coded into the
Raspberry Pi B board design and not the uncommitted GPIOS), and are
better represented simply by not writing incorrect data into pin
configuration nodes.
* Don't set GPIO_IN function select in gpio_request_enable() to avoid
glitches; defer this to gpio_set_direction(). Consequently, removed
empty bcm2835_pmx_gpio_request_enable().
* Simplified enabled_irq_map[]; make it explicitly 1 entry per bank.
* Lifted use of enabled_irq_map[] outside the per-interrupt loop in
IRQ handler, thus fixing an issue where the code was indexing into
enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID.
* Removed locking in IRQ handler, since all other code uses
spin_lock_irqsave() and so guarantees it doesn't run concurrently
with the handler.
* Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of
bcm2835_gpio_pins[].
* Remove range-checking from bcm2835_pctl_get_groups_count() since we've
decided to trust the pinctrl core.
* Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set()
directly for simplicity.
* Fixed body of dt_free_map() to match latest dt_node_to_map().
* Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl
core owns doing this.
* Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more
descriptive.
* Simplified remove(); removed call to non-existent
pinctrl_remove_gpio_range(), remove early return on error.
* Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's
base GPIO number.
* Error-handling cleanups in probe().
* Switched to module_platform_driver() rather than open-coding.
* Made pin, group, and function names lower-case.
* s/broadcom/brcm/ in DT property names.
* s/2708/2835/.
* Fixed a couple minor checkpatch warnings, and other minor cleanup.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
