This patch adds basic support for Dave/DENX QongEVB-LITE i.MX31-based
board. It includes support for clocks initialization, UART1, NOR-flash,
FPGA-attached NAND flash and DNET ethernet controller (inside FPGA).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds clkdev support for i.MX31. This is done in a
similar way done previously for i.MX27
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds clock support for i.MX35 SoCs. We do not support setting
of clock rates yet, but most interesting clock rates should be reported.
I couldn't test all clock rates and the datasheet contains some obvious
bugs, so expect some bugs in this code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We had hardcoded cpu_is_ macros for mxc architectures till now. As we
want to run the same kernel on i.MX31 and i.MX35 this patch adds cpu_is_
macros which expand to 0 or 1 if only one architecture is compiled in and
only check for the cpu type if more than one architecture is compiled
in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch moves the stuff common to i.MX31 and i.MX35 to mx3x.h and the
specifics to mx31.h/mx35.h. We can build a kernel which runs on i.MX31 and
i.MX35, so always include mx31.h and mx35.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This enables our mx31moboard to be used on the different baseboards that
we are developping according to the application needs. There are not
many differences between the boards for now, but when other peripherals
are available for mx31 the differences are going to grow.
v2: takes Sascha's comments into account
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make sure not to create spurious pulses on GPIOs, when configuring them as
output: first set required level, then switch direction.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver has been tested on MX27/MX31. It should work on MX1/MX1
aswell, but the actual setting of the PWM is missing so far.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This new implemenatation avoids that two physical pins are claimed by
the same driver (also with the the gpr hardware modes).
The gpio kernel lib is also called when a capable gpio pin is assigned
its gpio function.
The mxc_iomux_mode function is still here for backward compatibility but
should not be used anymore.
V2:
In the precendent revision, the iomux code was claiming a pin when its
hardware mode was changed. This was uncorrect: when the hardware mode is
changed, the pin must still be claimed through the iomux.
In order to have a pin working in mode hw2, we must fist issue the
mxc_iomux_set_gpr call and then the corresponding mxc_iomux_mode calls
with the FUNC mode (usually done with mxc_iomux_setup_multiple_pins).
The reverse calls must be done to fee the pins.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several of the macros in mx31ads.h depend on mx31.h which is no longer
included in quite so many standard headers as it once was. Include it
directly so we can build.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch mimicks what Martin wrote on the mailing list:
* move arch/arm/mach-imx/include/mach/imxfb.h into
arch/arm/mach-mxc/include/mach/imxfb.h
* changes Kconfig so that CONFIG_FB_IMX is selectable
* adds a platform device (copied from some pengutronix
patches)
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on code from "Martin Fuzzey" <mfuzzey@gmail.com>
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* define new CONFIG_ARCH_MX21 (this one is currently mutually exclusive to
CONFIG_ARCH_MX27, but this might change)
* splits one header file. Memory definitions, interrupt sources,
DMA channels are split into common part, i.MX27 specific and i.MX21
specific.
* guard access to UART5/UART6, which don't exist on i.MX21
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Here are some of the warnings that get fixed by this:
> 200 times: warning: cast adds address space to expression (<asn:2>)
twelve times: warning: symbol 'xxx' was not declared. Should it be static
two times: warning: symbol 'clock' shadows an earlier one
five times: warning: incorrect type in initializer (different address spaces)
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch only adds general clkdev support without actually switching
any MXC architecture to clkdev.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The context makes it clear already that these are clocks, so there's
no need for such a suffix. This patch only changes the clocks actually
used in the tree. The remaining clocks are renamed in the subsequent
architecture specific patches.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- rename mxc_clocks_init to architecture specific versions. This
allows us to have more than one architecture compiled in.
- call mxc_timer_init from clock initialisation instead from board
code
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We had 3 versions of this function in clock support for MX1/2/3
Use a single one instead. I picked the one from the MX3 as it seems
to calculate more accurate as the other ones. Also, on MX27 and MX31 mfn
can be negative, this hasn't been handled correctly on MX27 since now.
This patch has been tested on MX27 and MX31 and produces the same clock
frequencies for me.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* adds Kconfig variables
* specifies different physical address for i.MX21 because of the
different memory layouts
* disables support for UART5/UART6 in the i.MX serial driver
(the i.MX21 doesn't have those modules)
Based on code from "Martin Fuzzey" <mfuzzey@gmail.com>
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* removed iomux-mx1-mx2.h completely
* distributes the former contents to four different files (iomux-mx1.h,
iomux-mx21.h, iomux-mx27.h and the file iomux-mx2x.h, which is common to
both i.MX21 and i.MX27).
* adds all documented IOMUX definitions for i.MX21 and i.MX27
* fixes a few that were wrong (PD14_AOUT_FEC_CLR, PE16_AF_RTCK).
* don't silenly include <linux/io.h>
* and fixes all collateral damage from above
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a framebuffer driver for i.MX31 SoCs. It only supports synchronous
displays, vertical panning supported, no overlay support.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This reverts commit 86528da229.
This version of the patch was tab-to-space corrupted before
application.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This patch adds a MX2/MX3 specific SDHC driver. The hardware is basically
the same as in the MX1, but unlike the MX1 controller the MX2
controller just works as expected. Since the MX1 driver has more
workarounds for bugs than anything else I had no success with supporting
MX1 and MX2 in a sane way in one driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This is a framebuffer driver for i.MX31 SoCs. It only supports synchronous
displays, vertical panning supported, no overlay support.
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
i.MX3x SoCs contain an Image Processing Unit, consisting of a Control
Module (CM), Display Interface (DI), Synchronous Display Controller (SDC),
Asynchronous Display Controller (ADC), Image Converter (IC), Post-Filter
(PF), Camera Sensor Interface (CSI), and an Image DMA Controller (IDMAC).
CM contains, among other blocks, an Interrupt Generator (IG) and a Clock
and Reset Control Unit (CRCU). This driver serves IDMAC and IG. They are
supported over dmaengine and irq-chip APIs respectively.
IDMAC is a specialised DMA controller, its DMA channels cannot be used for
general-purpose operations, even though it might be possible to configure
a memory-to-memory channel for memcpy operation. This driver will not work
with generic dmaengine clients, clients, wishing to use it must use
respective wrapper structures, they also must specify which channels they
require, as channels are hard-wired to specific IPU functions.
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Implementation of USB device driver integrated in Freescale's i.MXL
processor.
Adds USB device driver for i.MXL.
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (66 commits)
x86: export vector_used_by_percpu_irq
x86: use logical apicid in x2apic_cluster's x2apic_cpu_mask_to_apicid_and()
sched: nominate preferred wakeup cpu, fix
x86: fix lguest used_vectors breakage, -v2
x86: fix warning in arch/x86/kernel/io_apic.c
sched: fix warning in kernel/sched.c
sched: move test_sd_parent() to an SMP section of sched.h
sched: add SD_BALANCE_NEWIDLE at MC and CPU level for sched_mc>0
sched: activate active load balancing in new idle cpus
sched: bias task wakeups to preferred semi-idle packages
sched: nominate preferred wakeup cpu
sched: favour lower logical cpu number for sched_mc balance
sched: framework for sched_mc/smt_power_savings=N
sched: convert BALANCE_FOR_xx_POWER to inline functions
x86: use possible_cpus=NUM to extend the possible cpus allowed
x86: fix cpu_mask_to_apicid_and to include cpu_online_mask
x86: update io_apic.c to the new cpumask code
x86: Introduce topology_core_cpumask()/topology_thread_cpumask()
x86: xen: use smp_call_function_many()
x86: use work_on_cpu in x86/kernel/cpu/mcheck/mce_amd_64.c
...
Fixed up trivial conflict in kernel/time/tick-sched.c manually
This patch removes the inclusion of mach/hardware.h from mach/irqs.h and
switches to more meaningful names for the irq related macros.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a missing call to local_irq_restore() and fixes some
compiler warnings about unused variables for MX1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drivers which are going to use it will have to select it and use
mxc_set_irq_fiq() to set FIQ mode for this interrupt.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds MX1 architecture to platform MXC. It will supersede mach-imx
and let it die.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix GIUS register setup in the mxc_gpio_mode().
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pins definition for UART5 when used in alternate mode 2
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
UART2 pins when used in functionnal mode
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add basic support to the MX31PDK development board, also known
as MX31 3DS or MX31 3-stack board (http://www.freescale.com/imx31pdk).
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: sascha Hauer <s.hauer@pengutronix.de>
mxc_gpio_setup_multiple_pins used to take several ALLOC_MODE flags. Most
of them are unused, so simplify the function by removing the flags. Also,
instead of using a confusing MXC_GPIO_ALLOC_MODE_RELEASE flag in a function
having alloc in its name, add a mxc_gpio_release_multiple_pins function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The EMMA (Enhanced Multimedia Engine) is divided into two parts, the
postprocessor and the preprocessor. Fix the base addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This one updates DMA support on MX2 which got broken in:
[ARM] Hide ISA DMA API when ISA_DMA_API is unset
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Impact: change calling convention of existing clock_event APIs
struct clock_event_timer's cpumask field gets changed to take pointer,
as does the ->broadcast function.
Another single-patch change. For safety, we BUG_ON() in
clockevents_register_device() if it's not set.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: Ingo Molnar <mingo@elte.hu>
As Al did for Versatile in 2ad4f86b60,
add a typesafe __io implementation for platforms to use. Convert
platforms to use this new simple typesafe implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When ISA_DMA_API is unset, we're not implementing the ISA DMA API,
so there's no point in publishing the prototypes via asm/dma.h, nor
including the machine dependent parts of that API.
This allows us to remove a lot of mach/dma.h files which don't contain
any useful code. Unfortunately though, some platforms put their own
private non-ISA definitions into mach/dma.h, so we leave these behind
and fix the appropriate #include statments.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Let's provide an overridable default instead of having every machine
class define __virt_to_bus and __bus_to_virt to the same thing. What
most platforms are using is bus_addr == phys_addr so such is the default.
One exception is ebsa110 which has no DMA what so ever, so the actual
definition is not important except only for proper compilation. Also
added a comment about the special footbridge bus translation.
Let's also remove comments alluding to set_dma_addr which is not
(and should not) be commonly used.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than:
config CPU_BLAH
bool
depends on ARCH_FOO || MACH_BAR
default y if ARCH_FOO || MACH_BAR
arrange for ARCH_FOO and MACH_BAR to select CPU_BLAH directly.
Acked-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Acked-by: Brian Swetland <swetland@google.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Nicolas Bellido <ml@acolin.be>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Data register holds the value we have written to a gpio. To
get the input value we must read the Pad Status Register MX3 (or Sample
Status register in MX1/2 terms)
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The internal devices of the MX3 Processor have to be mapped
MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* git://git.infradead.org/mtd-2.6: (69 commits)
Revert "[MTD] m25p80.c code cleanup"
[MTD] [NAND] GPIO driver depends on ARM... for now.
[MTD] [NAND] sh_flctl: fix compile error
[MTD] [NOR] AT49BV6416 has swapped erase regions
[MTD] [NAND] GPIO NAND flash driver
[MTD] cmdlineparts documentation change - explain where mtd-id comes from
[MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detection
[MTD] [NAND] Fix compilation warnings in drivers/mtd/nand/cs553x_nand.c
[JFFS2] Write buffer offset adjustment for NOR-ECC (Sibley) flash
[MTD] mtdoops: Fix a bug where block may not be erased
[MTD] mtdoops: Add a magic number to logged kernel oops
[MTD] mtdoops: Fix an off by one error
[JFFS2] Correct parameter names of jffs2_compress() in comments
[MTD] [NAND] sh_flctl: add support for Renesas SuperH FLCTL
[MTD] [NAND] Bug on atmel_nand HW ECC : OOB info not correctly written
[MTD] [MAPS] Remove unused variable after ROM API cleanup.
[MTD] m25p80.c extended jedec support (v2)
[MTD] remove unused mtd parameter in of_mtd_parse_partitions()
[MTD] [NAND] remove dead Kconfig associated with !CONFIG_PPC_MERGE
[MTD] [NAND] driver extension to support NAND on TQM85xx modules
...
This patch adds DMA support for Freescale i.MX27 SoCs. It is derived
from the i.MX1 port and should (though currently untested) still be
working for the i.MX1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix some base address declaration by adding a cast.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This one adds definitions to configure RTCK pad (PE16) in primary and alternate
function. The RTCK Pin is used by one wire master controller and as JTAG Clock
return.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds macros to get CSCR upper, lower and additional registers.
These registers are needed to configure a chip select line. The offset
layouts of these Registers are identical on mx27 and mx31, hence we can
use the macros in generic way
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this adds convenience values usable by mxc_iomux_mode() to configure Pins of the
spi interfaces on mx31.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Needed for 8250 serial port and CS89x0 ethernet interface.
Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The driver(s) below do not use LINUX_VERSION_CODE nor KERNEL_VERSION.
arch/arm/plat-mxc/clock.c
This patch removes the said #include <version.h>.
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds support for the integrated NAND flash controller of the
i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3
aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Remove includes of asm/hardware.h in addition to asm/arch/hardware.h.
Then, since asm/hardware.h only exists to include asm/arch/hardware.h,
update everything to directly include asm/arch/hardware.h and remove
asm/hardware.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
IRQT_* and __IRQT_* were obsoleted long ago by patch [3692/1].
Remove them completely. Sed script for the reference:
s/__IRQT_RISEDGE/IRQ_TYPE_EDGE_RISING/g
s/__IRQT_FALEDGE/IRQ_TYPE_EDGE_FALLING/g
s/__IRQT_LOWLVL/IRQ_TYPE_LEVEL_LOW/g
s/__IRQT_HIGHLVL/IRQ_TYPE_LEVEL_HIGH/g
s/IRQT_RISING/IRQ_TYPE_EDGE_RISING/g
s/IRQT_FALLING/IRQ_TYPE_EDGE_FALLING/g
s/IRQT_BOTHEDGE/IRQ_TYPE_EDGE_BOTH/g
s/IRQT_LOW/IRQ_TYPE_LEVEL_LOW/g
s/IRQT_HIGH/IRQ_TYPE_LEVEL_HIGH/g
s/IRQT_PROBE/IRQ_TYPE_PROBE/g
s/IRQT_NOEDGE/IRQ_TYPE_NONE/g
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds basic mach support for the mx2 processor family, based
on the original freescale code and adapted to mainline kernel coding
style.
This part adds the global build only.
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
This patch adds timer support for the i.MX machine family. This code can
be used on the following machs:
- i.MX1 (tested)
- i.MX2 (i.MX21 (to be tested), i.MX27 (tested))
- i.MX3 (i.MX31 (tested))
TODO: It seems impossible to build a kernel for more than one CPU because the
timer do not follow the platform device rules. So it does only work if
timer 1 can be accessed on all CPUs at the same address.
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch bases on the one from Daniel Mack. The most important change to
Daniel's patch is to be more generic. This gpio routine supports at least
the i.MX27 and i.MX31 processors.
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Acked-by: Daniel Mack <daniel@caiaq.de>
Internal clock path handling for the mxc CPUs.
Changed against the original Freescale code (and against clocklib for example):
- clock rate is always calculated whenever one ask for the current rate
(means struct clk has no more a member called "rate"). So switching the PLL
base frequency will propagate immediately to all other clocks that are
depending on this frequency.
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
From: Juergen Beisert <j.beisert@pengutronix.de>
This patch separates the current code into i.MX2 and i.MX3 and modifies
the Kconfig files to reflect this separation in the menus.
Things happend since last review:
- make i.MX3 compile again
- fix some structure names to be conform with all the shared/common
sources from i.MX1/i.MX2
Previous changes:
- stay conform to other Kconfig files (note from Russell King)
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
From: Juergen Beisert <j.beisert@pengutronix.de>
This patch cleans up the in-kernel platform code from doxygen comments.
We don't know how this could have leak in, but anyway.
Changes since last release:
- none
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Ross Wille <wille@freescale.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds the foundation pieces for
the Freescale MXC platforms, including
i.MX2 and i.MX3 based systems.
The bare-bones MX31 support in this patch
boots to the rootdev panic with 8250 serial
console configured "console=ttyS0,115200".
It assumes that Redboot is the boot loader.
Signed-off-by: Quinn Jensen <quinn.jensen@freescale.com>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
