[ARM] Add a common typesafe __io implementation
As Al did for Versatile in 2ad4f86b60
,
add a typesafe __io implementation for platforms to use. Convert
platforms to use this new simple typesafe implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
parent
cd32a48dc5
commit
0560cf5aa5
23 changed files with 44 additions and 65 deletions
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@ -79,6 +79,14 @@ extern void __iounmap(volatile void __iomem *addr);
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*/
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extern void __readwrite_bug(const char *fn);
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/*
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* A typesafe __io() helper
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*/
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static inline void __iomem *__typesafe_io(unsigned long addr)
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{
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return (void __iomem *)addr;
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}
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/*
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* Now, pick up the machine-defined IO definitions
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*/
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@ -12,7 +12,7 @@
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* We don't actually have real ISA nor PCI buses, but there is so many
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* drivers out there that might just work if we fake them...
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*/
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -23,8 +23,8 @@
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#define IO_SPACE_LIMIT 0xFFFFFFFF
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#ifndef __ASSEMBLY__
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@ -22,8 +22,8 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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/*
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* We don't support ins[lb]/outs[lb]. Make them fault.
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@ -29,8 +29,7 @@
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* We don't actually have real ISA nor PCI buses, but there is so many
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* drivers out there that might just work if we fake them...
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*/
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#define PCIO_BASE 0
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#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#define __mem_isa(a) (a)
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@ -4,5 +4,5 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(p) ((void __iomem *)(p))
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#define __mem_pci(p) (p)
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#define __io(p) __typesafe_io(p)
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#define __mem_pci(p) (p)
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@ -16,7 +16,7 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(a) ((void __iomem *)(a))
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -22,7 +22,7 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(a) ((void __iomem *)(a))
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -239,7 +239,7 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
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#ifndef CONFIG_PCI
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#define __io(v) v
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#define __io(v) __typesafe_io(v)
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#else
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@ -13,7 +13,7 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -15,11 +15,7 @@
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/*
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* There are not real ISA nor PCI buses, so we fake it.
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*/
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static inline void __iomem *__io(unsigned long addr)
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{
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return (void __iomem *)addr;
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}
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#define __io(a) __io(a)
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -14,7 +14,7 @@
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#define IO_SPACE_LIMIT 0xffffffff
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/* No ISA or PCI bus on this machine. */
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif /* __ASM_ARCH_IO_H */
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@ -23,11 +23,7 @@
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void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
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static inline void __iomem *__io(unsigned long addr)
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{
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return (void __iomem *)addr;
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}
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#define __io(a) __io(a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -22,7 +22,7 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(a) ((void __iomem *)(a))
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -13,7 +13,7 @@
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#define IO_SPACE_LIMIT 0xffffffff /* XXX */
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#define __io(a) ((void __iomem *)(a))
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#define __mem_isa(a) (IO_BASE + (a))
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@ -38,14 +38,9 @@ __arch_iounmap(void __iomem *addr)
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__iounmap(addr);
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}
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static inline void __iomem *__io(unsigned long addr)
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{
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return (void __iomem *)addr;
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}
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#define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m)
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#define __arch_iounmap(a) __arch_iounmap(a)
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#define __io(a) __io(a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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@ -15,7 +15,7 @@
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -12,7 +12,7 @@
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* We don't actually have real ISA nor PCI buses, but there is so many
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* drivers out there that might just work if we fake them...
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*/
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -22,12 +22,7 @@
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#define IO_SPACE_LIMIT 0xffffffff
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static inline void __iomem *__io(unsigned long addr)
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{
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return (void __iomem *)addr;
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}
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#define __io(a) __io(a)
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -16,11 +16,7 @@
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* We don't actually have real ISA nor PCI buses, but there is so many
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* drivers out there that might just work if we fake them...
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*/
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static inline void __iomem *__io(unsigned long addr)
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{
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return (void __iomem *)addr;
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}
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#define __io(a) __io(a)
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -22,11 +22,7 @@
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#define IO_SPACE_LIMIT 0xffffffff
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static inline void __iomem *__io(unsigned long addr)
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{
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return (void __iomem *)addr;
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}
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#define __io(a) __io(a)
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -35,8 +35,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
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#endif
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/* io address mapping macro */
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#define __io(a) ((void __iomem *)(a))
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#define __mem_pci(a) (a)
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#endif
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@ -42,8 +42,8 @@
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* We don't actually have real ISA nor PCI buses, but there is so many
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* drivers out there that might just work if we fake them...
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*/
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#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
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#define __mem_pci(a) (a)
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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/*
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* ----------------------------------------------------------------------------
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* ----------------------------------------------------------------------------
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*/
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#define PCIO_BASE 0
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#if defined(CONFIG_ARCH_OMAP1)
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#define IO_PHYS 0xFFFB0000
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