* Convert {ide_hwif_t,ide_pci_device_t}->host_flag to be u16.
* Add IDE_HFLAG_POST_SET_MODE host flag to indicate the need to program
the host for the transfer mode after programming the device. Set it
in au1xxx-ide, amd74xx, cs5530, cs5535, pdc202xx_new, sc1200, pmac
and via82cxxx host drivers.
* Add IDE_HFLAG_NO_SET_MODE host flag to indicate the need to completely
skip programming of host/device for the transfer mode ("smart" hosts).
Set it in it821x host driver and check it in ide_tune_dma().
* Add ide_set_pio_mode()/ide_set_dma_mode() helpers and convert all
direct ->set_pio_mode/->speedproc users to use these helpers.
* Move ide_config_drive_speed() calls from ->set_pio_mode/->speedproc
methods to callers.
* Rename ->speedproc method to ->set_dma_mode, make it void and update
all implementations accordingly.
* Update ide_set_xfer_rate() comments.
* Unexport ide_config_drive_speed().
v2:
* Fix issues noticed by Sergei:
- export ide_set_dma_mode() instead of moving ->set_pio_mode abuse wrt
to setting DMA modes from sc1200_set_pio_mode() to do_special()
- check IDE_HFLAG_NO_SET_MODE in ide_tune_dma()
- check for (hwif->set_pio_mode) == NULL in ide_set_pio_mode()
- check for (hwif->set_dma_mode) == NULL in ide_set_dma_mode()
- return -1 from ide_set_{pio,dma}_mode() if ->set_{pio,dma}_mode == NULL
- don't set ->set_{pio,dma}_mode on it821x in "smart" mode
- fix build problem in pmac.c
- minor fixes in au1xxx-ide.c/cs5530.c/siimage.c
- improve patch description
Changes in behavior caused by this patch:
- HDIO_SET_PIO_MODE ioctl would now return -ENOSYS for attempts to change
PIO mode if it821x controller is in "smart" mode
- removal of two debugging printk-s (from cs5530.c and sc1200.c)
- transfer modes 0x00-0x07 passed from user space may be programmed twice on
the device (not really an issue since 0x00 is not supported correctly by
any host driver ATM, 0x01 is not supported at all and 0x02-0x07 are invalid)
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Check ide_config_drive_speed() return value.
* While at also call ide_config_drive_speed() if the transfer mode is
XFER_PIO_SLOW (this case happens iff the transfer mode has already been
set on the device by ide-proc.c::set_xfer_rate()) and remove redundant
setting of ->{init,current}_speed.
* Bump driver version.
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Set transfer mode on the device before programming the host controller for
the new timings (matches what auide_tune_chipset() is doing wrt DMA modes).
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Add "good DMA drives" hack for icside to ide-dma.c::ide_find_dma_mode()
(in the long-term it should be either removed or generalized for all hosts).
* Use ide_tune_dma() in icside.c::icside_dma_check().
This results in the following changes in behavior:
- pre-EIDE SWDMA modes are now also respected
- drive->autodma is checked instead of hwif->autodma
(doesn't really matter as icside sets both to "1")
* Make ide-dma.c::__ide_dma_good_drive() static and drop "__" prefix.
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Add missing initialization of hwif->autodma and drive->autodma to
pmac_ide_setup_dma().
* Use ide_tune_dma() in pmac_ide_dma_check().
While at it:
* Fix pmac_ide_dma_check() return value if DMA mode is not programmed
(should be "-1" otherwise ide_set_dma() will try to enable DMA).
* Remove unnecessary drive->using_dma fiddling (->dma_off_quietly is always
called before ide_set_dma() call and ide_set_dma() calls ->ide_dma_on if
->ide_dma_check returns "0").
v2:
* No reason to blacklist all ide_floppy devices and the old code was always
enabling DMA anyway (without even programming controller/device if the
device was ide_floppy).
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Use ide_config_drive_speed() instead of pmac_ide_do_setfeature() and remove
the latter, also ide-iops.c::__ide_wait_stat() could be static again.
Since for IDE PMAC host driver IDE_CONTROL_REG is always true, device's
->quirk_list is always zero and ->ide_dma_host_{on,off} are nops than
the only changes in behavior are:
* if PIO mode is set then ->dma_off_queitly is called to disable DMA
* if setting transfer mode fails ide_dump_status() is called to dump status
v2:
* IDE PMAC controllers allow separate PIO and DMA timings and PPC userland
depends on this fact, and calls "hdparm -p" without calling "hdparm -d".
Therefore to compensate for DMA being disabled by ide_config_drive_speed()
for PIO modes:
- add IDE_HFLAG_SET_PIO_MODE_KEEP_DMA flag and set it in PMAC host driver
- add handling of the new flag to ide-io.c::do_special()
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Upper layers are responsible for controlling nIEN so don't clear nIEN after
command execution in pmac_ide_do_setfeature().
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Use __ide_wait_stat() instead of wait_for_ready() in pmac_ide_do_setfeature().
While at it do following changes to match __ide_wait_stat() call in
ide_config_drive_speed():
* Wait WAIT_CMD time (20 sec) instead of 2 sec for device to clear BUSY_STAT.
* Check DRQ_STAT bit (shouldn't be set for good device status).
Also remove no longer needed wait_for_ready() from ide-iops.c.
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Don't check for good device status before executing the command in
pmac_ide_do_setfeature() (ide_config_drive_speed() doesn't do this).
It is a job of upper layers to guarantee that the device is ready to
accept new command before we get here.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Split off checking of the status register from ide_wait_stat() to
__ide_wait_stat() helper.
* Use the new helper in ide_config_drive_speed(). The only change in the
functionality is that the function now fails if after 20 sec (WAIT_CMD)
device is still busy (BUSY_STAT bit is set) while previously instead of
failing the function continued with checking for the correct device status
(which would give the device additional 10 usec to clear BUSY_STAT bit).
* Remove stale comment for ide_config_drive_speed().
* Remove duplicate comment for ide_wait_stat() from <linux/ide.h>.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Fix pmac_ide_dma_check() to use pmac_ide_tune_chipset() and remove no longer
necessary pmac_ide_{m,u}dma_enable().
* While at it remove some dead code from pmac_ide_dma_check() (leftovers from
conversion to use ide_max_dma_mode()).
There should be no functionality changes caused by this patch.
v2:
* Fix compile by replacing "id" with "drive->id" in pmac_ide_dma_check()
(Noticed by Ben).
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
pmac_ide_do_setfeature() contains matching nIEN setting/clearing so this
Device Control register messing in pmac_ide_dma_check() is totally unnecessary.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Move adjusting of cycle time for devices providing explicit DMA cycle time
from pmac_ide_mdma_enable() to set_timings_mdma().
* Remove no longer needed drive_cycle_time argument.
* BUG() if unsupported speed argument value is passed (shouldn't happen).
* Matching access/recovery timings always exist so remove redundant check.
* Make set_timings_mdma() void.
* Update pmac_ide_tune_chipset()'s comment.
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* Don't check check for pmif == NULL (it should never be NULL if we got here).
* Make a local copy of the timings and set the pmif->timings[] only after
setting the transfer mode on the device (otherwise SELECT_DRIVE() call in
pmac_ide_do_setfeature() will program new timings before the transfer mode
is set on the device - this was pointed out by Sergei). This change makes
pmac_ide_tune_chipset() behavior match this of pmac_ide_{m,u}dma_enable().
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
kauai_lookup_timing() should always return non-zero return value:
* BUG() in kauai_lookup_timing() if the timing info cannot be found.
* Remove code checking for zero return value from all callers.
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This patch removes the unused EXPORT_SYMBOL_GPL(ide_acpi_set_state)
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Cc: Shaohua Li <shaohua.li@intel.com>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
We need to set hwif->chipset or IDE PCI host drivers may try to claim
our ide_hwifs[] slot.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Fix DMI const-ification fallout that appeared when merging subsystem
trees.
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
According to latest memory ordering specification documents from Intel
and AMD, both manufacturers are committed to in-order loads from
cacheable memory for the x86 architecture. Hence, smp_rmb() may be a
simple barrier.
Also according to those documents, and according to existing practice in
Linux (eg. spin_unlock doesn't enforce ordering), stores to cacheable
memory are visible in program order too. Special string stores are safe
-- their constituent stores may be out of order, but they must complete
in order WRT surrounding stores. Nontemporal stores to WB memory can go
out of order, and so they should be fenced explicitly to make them
appear in-order WRT other stores. Hence, smp_wmb() may be a simple
barrier.
http://developer.intel.com/products/processor/manuals/318147.pdfhttp://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24593.pdf
In userspace microbenchmarks on a core2 system, fence instructions range
anywhere from around 15 cycles to 50, which may not be totally
insignificant in performance critical paths (code size will go down
too).
However the primary motivation for this is to have the canonical barrier
implementation for x86 architecture.
smp_rmb on buggy pentium pros remains a locked op, which is apparently
required.
Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
wmb() on x86 must always include a barrier, because stores can go out of
order in many cases when dealing with devices (eg. WC memory).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
movnt* instructions are not strongly ordered with respect to other stores,
so if we are to assume stores are strongly ordered in the rest of the 64
bit code, we must fence these off (see similar examples in 32 bit code).
[ The AMD memory ordering document seems to say that nontemporal stores can
also pass earlier regular stores, so maybe we need sfences _before_
movnt* everywhere too? ]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: (119 commits)
[libata] struct pci_dev related cleanups
libata: use ata_exec_internal() for PMP register access
libata: implement ATA_PFLAG_RESETTING
libata: add @timeout to ata_exec_internal[_sg]()
ahci: fix notification handling
ahci: clean up PORT_IRQ_BAD_PMP enabling
ahci: kill leftover from enabling NCQ over PMP
libata: wrap schedule_timeout_uninterruptible() in loop
libata: skip suppress reporting if ATA_EHI_QUIET
libata: clear ehi description after initial host report
pata_jmicron: match vendor and class code only
libata: add ST9160821AS / 3.ALD to NCQ blacklist
pata_acpi: ACPI driver support
libata-core: Expose gtm methods for driver use
libata: add HDT722516DLA380 to NCQ blacklist
libata: blacklist NCQ on Seagate Barracuda ST380817AS
[libata] Turn on ACPI by default
libata_scsi: Fix ATAPI transfer lengths
libata: correct handling of SRST reset sequences
libata: Integrate ACPI-based PATA/SATA hotplug - version 5
...
Since there is no x86-64 architecture anymore it cannot be maintained.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (37 commits)
PCI: merge almost all of pci_32.h and pci_64.h together
PCI: X86: Introduce and enable PCI domain support
PCI: Add 'nodomains' boot option, and pci_domains_supported global
PCI: modify PCI bridge control ISA flag for clarity
PCI: use _CRS for PCI resource allocation
PCI: avoid P2P prefetch window for expansion ROMs
PCI: skip ISA ioresource alignment on some systems
PCI: remove transparent bridge sizing
pci: write file size to inode on proc bus file write
pci: use size stored in proc_dir_entry for proc bus files
pci: implement "pci=noaer"
PCI: fix IDE legacy mode resources
MSI: Use correct data offset for 32-bit MSI in read_msi_msg()
PCI: Fix incorrect argument order to list_add_tail() in PCI dynamic ID code
PCI: i386: Compaq EVO N800c needs PCI bus renumbering
PCI: Remove no longer correct documentation regarding MSI vector assignment
PCI: re-enable onboard sound on "MSI K8T Neo2-FIR"
PCI: quirk_vt82c586_acpi: Omit reading PCI revision ID
PCI: quirk amd_8131_mmrbc: Omit reading pci revision ID
cpqphp: Use PCI_CLASS_REVISION instead of PCI_REVISION_ID for read
...
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/driver-2.6: (75 commits)
PM: merge device power-management source files
sysfs: add copyrights
kobject: update the copyrights
kset: add some kerneldoc to help describe what these strange things are
Driver core: rename ktype_edd and ktype_efivar
Driver core: rename ktype_driver
Driver core: rename ktype_device
Driver core: rename ktype_class
driver core: remove subsystem_init()
sysfs: move sysfs file poll implementation to sysfs_open_dirent
sysfs: implement sysfs_open_dirent
sysfs: move sysfs_dirent->s_children into sysfs_dirent->s_dir
sysfs: make sysfs_root a regular directory dirent
sysfs: open code sysfs_attach_dentry()
sysfs: make s_elem an anonymous union
sysfs: make bin attr open get active reference of parent too
sysfs: kill unnecessary NULL pointer check in sysfs_release()
sysfs: kill unnecessary sysfs_get() in open paths
sysfs: reposition sysfs_dirent->s_mode.
sysfs: kill sysfs_update_file()
...
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/usb-2.6: (142 commits)
USB: fix race in autosuspend reschedule
atmel_usba_udc: Keep track of the device status
USB: Nikon D40X unusual_devs entry
USB: serial core should respect driver requirements
USB: documentation for USB power management
USB: skip autosuspended devices during system resume
USB: mutual exclusion for EHCI init and port resets
USB: allow usbstorage to have LUNS greater than 2Tb
USB: Adding support for SHARP WS011SH to ipaq.c
USB: add atmel_usba_udc driver
USB: ohci SSB bus glue
USB: ehci build fixes on au1xxx, ppc-soc
USB: add runtime frame_no quirk for big-endian OHCI
USB: funsoft: Fix termios
USB: visor: termios bits
USB: unusual_devs entry for Nikon DSC D2Xs
USB: re-remove <linux/usb_sl811.h>
USB: move <linux/usb_gadget.h> to <linux/usb/gadget.h>
USB: Export URB statistics for powertop
USB: serial gadget: Disable endpoints on unload
...
* master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq:
[CPUFREQ] Don't take semaphore in cpufreq_quick_get()
[CPUFREQ] Support different families in fid/did to frequency conversion
[CPUFREQ] cpufreq_stats: misc cpuinit section annotations
[CPUFREQ] implement !CONFIG_CPU_FREQ stub for cpufreq_unregister_notifier()
[CPUFREQ] mark hotplug notifier callback as __cpuinit
[CPUFREQ] Only check for transition latency on problematic governors (kconfig fix)
[CPUFREQ] allow ondemand and conservative cpufreq governors to be used as default
[CPUFREQ] move policy's governor initialisation out of low-level drivers into cpufreq core
[CPUFREQ] Longhaul - Add support for PM133 northbridge
[CPUFREQ] x86: use num_online_nodes to get physical cpus numbers for
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mfasheh/ocfs2: (23 commits)
ocfs2: Optionally return filldir errors
ocfs2: Write support for directories with inline data
ocfs2: Read support for directories with inline data
ocfs2: Write support for inline data
ocfs2: Read support for inline data
ocfs2: Structure updates for inline data
ocfs2: Cleanup dirent size check
ocfs2: Rename cleanups
ocfs2: Provide convenience function for ino lookup
ocfs2: Implement ocfs2_empty_dir() as a caller of ocfs2_dir_foreach()
ocfs2: Remove open coded readdir()
ocfs2: Pass raw u64 to filldir
ocfs2: Abstract out core dir listing functionality
ocfs2: Move directory manipulation code into dir.c
ocfs2: Small refactor of truncate zeroing code
ocfs2: move nonsparse hole-filling into ocfs2_write_begin()
ocfs2: Sync ocfs2_fs.h with ocfs2-tools
[PATCH] fs/ocfs2/: removed unneeded initial value and function's return value
ocfs2: Implement show_options()
ocfs2: Clear slot map when umounting a local volume
...
* 'isdn-cleanups' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/misc-2.6:
[ISDN] HiSax diva: split setup into three smaller functions
[ISDN] HiSax sedlbauer: move ISAPNP and PCI code into functions of their own
[ISDN] HiSax elsa: split huge setup function into four smaller functions
[ISDN] HiSax avm_pci: split setup into three smaller functions
[ISDN] Remove CONFIG_PCI ifdefs from 100% PCI source code
* fix bug in pci_read() and pci_write() which prevented PCI domain
support from working (hardcoded domain 0).
* unconditionally enable CONFIG_PCI_DOMAINS
* implement pci_domain_nr() and pci_proc_domain(), as required of
all arches when CONFIG_PCI_DOMAINS is enabled.
* store domain in struct pci_sysdata, as assigned by ACPI
* support "pci=nodomains"
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Introduce pci_domains_supported global, hardcoded to zero if
!CONFIG_PCI_DOMAINS.
* Introduce 'nodomains' boot option, which clears pci_domains_supported
on platforms that enable it by default (x86, x86-64, and others when
they are converted to use this).
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Modify PCI Bridge Control ISA flag for clarity
This patch changes PCI_BRIDGE_CTL_NO_ISA to PCI_BRIDGE_CTL_ISA
and modifies it's clarifying comment and locations where used.
The change reduces the chance of future confusion since it makes
the set/unset meaning of the bit the same in both the bridge
control register and bridge_ctl field of the pci_bus struct.
Signed-off-by: Gary Hade <garyhade@us.ibm.com>
Acked-by: Linas Vepstas <linas@austin.ibm.com>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Use _CRS for PCI resource allocation
This patch resolves an issue where incorrect PCI memory and i/o ranges
are being assigned to hotplugged PCI devices on some IBM systems. The
resource mis-allocation not only makes the PCI device unuseable but
often makes the entire system unuseable due to resulting machine checks.
The hotplug capable PCI slots on the affected systems are not located
under a standard P2P bridge but are instead located under PCI root
bridges or subtractive decode P2P bridges. For example, the IBM x3850
contains 2 hotplug capable PCI-X slots and 4 hotplug capable PCIe slots
with the PCI-X slots each located under a PCI root bridge and the PCIe
slots each located under a subtractive decode P2P bridge.
The current i386/x86_64 PCI resource allocation code does not use _CRS
returned resource information. No other resource information source is
available for slots that are not below a standard P2P bridge so
incorrect ranges are being allocated from e820 hole causing the bad
result.
This patch causes the kernel to use _CRS returned resource info. It is
roughly based on a change provided by Matthew Wilcox for the ia64 kernel
in 2005. Due to possible buggy BIOS factor and possible yet to be
discovered kernel issues the function is disabled by default and can be
enabled with pci=use_crs.
Signed-off-by: Gary Hade <gary.hade@us.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Avoid creating P2P prefetch window for expansion ROMs
Because of the future possibility that P2P prefetch windows will contain
address ranges above 4GB some BIOSes are providing space in the P2P
non-prefetch windows for expansion ROMs. This is due to expansion ROM
BAR 32-bit limitation. When expansion ROM BARs without BIOS assigned
address(es) are currently found behind a P2P bridge, the kernel attempts
to create a P2P prefetch window for them even though space for them has
already been provided in the non-prefetch window. _CRS on some systems
with certain resource conservation conscious BIOSes may not provide the
extra 1MB or more memory resource needed for the expansion ROM motivated
prefetch window causing resource allocation errors.
This change corrects the problem by removing IORESOURCE_PREFETCH from
the expansion ROM flags initialization. It also removes
IORESOURCE_CACHEABLE which seems inappropriate if only non-cacheable
memory is available.
Signed-off-by: Gary Hade <gary.hade@us.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Skip ISA ioresource alignment on some systems
To conserve limited PCI i/o resource on some IBM multi-node systems, the
BIOS allocates (via _CRS) and expects the kernel to use addresses in
ranges currently excluded by pcibios_align_resource() [i386/pci/i386.c].
This change allows the kernel to use the currently excluded address
ranges on the IBM x3800, x3850, and x3950.
Signed-off-by: Gary Hade <gary.hade@us.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Remove transparent bridge sizing.
Due to code in pci_read_bridge_bases() [drivers/pci/probe.c] the child
bus of a transparent bridge already has access to the parent bus
resources so transparent bridge sizing appears unnecessary. The bridge
sizing includes alignment and granularity adjustments that can cause
significantly more memory to be reserved from the parant bus than
required by devices on the child bus and allotted by _CRS.
Signed-off-by: Gary Hade <gary.hade@us.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
When a /proc/bus/pci file is written to, the size of that PCI device's
configuration space must be written to the inode. Otherwise, it is
possible for the file to specify a size of 0 on stat if a task is holding
the same file open.
Signed-off-by: David Rientjes <rientjes@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
On pci_proc_attach_device(), the size of the PCI configuration space is
stored in the proc_dir_entry as the size of the file. Thus, the procfs
interface to PCI devices should use it instead of the device directly.
Signed-off-by: David Rientjes <rientjes@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
For cases in which CONFIG_PCIEAER=y (such as distro kernels), allow users
to disable PCIE Advanced Error Reporting by using "pci=noaer" on the
kernel command line.
This can be used to work around hardware or (kernel) software problems.
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
I got the following error on MIPS Cobalt.
PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
pata_via 0000:00:09.1: failed to request/iomap BARs for port 0 (errno=-16)
PCI: Unable to reserve I/O region #3:8@f0000170 for device 0000:00:09.1
pata_via 0000:00:09.1: failed to request/iomap BARs for port 1 (errno=-16)
pata_via 0000:00:09.1: no available native port
The legacy mode IDE resources set the following order.
pci_setup_device()
Legacy mode ATA controllers have fixed addresses.
IDE resources: 0x1F0-0x1F7, 0x3F6, 0x170-0x177, 0x376
|
V
pcibios_fixup_bus()
MIPS Cobalt PCI bus regions have the -0x10000000 offset from PCI resources.
pcibios_fixup_bus() fix PCI bus regions.
0x1F0 - 0x10000000 = 0xF00001F0
|
V
ata_pci_init_one()
PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
In some architectures, PCI bus regions have the offset from PCI resources.
For this reason, pci_setup_device() should set PCI bus regions to
dev->resource[].
[akpm@linux-foundation.org: use struct initialiser]
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Greg KH <greg@kroah.com>
Cc: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
While reading the MSI code trying to find a reason why MSI wouldn't
work for devices that have a 32-bit MSI address capability, I noticed
that read_msi_msg() seems to read the message data from the wrong
offset in this case.
Signed-off-by: Roland Dreier <roland@digitalvampire.org>
Acked-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The code for dynamically assigning new ids to PCI drivers,
store_new_id(), calls list_add_tail() with the list head and new node
arguments in reversed order.
The result is that every new id written essentially overwrites the
previous list of ids.
Caught with the help of Rusty's "horribly bad" list_node patch:
http://lkml.org/lkml/2007/6/10/10
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Force PCI bus renumbering for Compaq EVO N800c laptop, in order to get
the cardbus slot recognised.
Signed-off-by: Juha Laiho <Juha.Laiho@iki.fi>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The MSI vector reservation system described in Documentation/MSI-HOWTO.txt
was removed by Eric in 92db6d10bc. Remove
the references to it in the documentation.
While we're here § 5.5.1 refers to x86 hardware requirements, so make that
clear.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Cc: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
