Commit graph

1628 commits

Author SHA1 Message Date
Russell King
5a58d4bb66 Merge branch 'eseries' into pxa
Conflicts:

	arch/arm/mach-pxa/Makefile
2008-07-12 21:43:36 +01:00
Russell King
7fecc34e07 Merge branch 'pxa-tosa' into pxa
Conflicts:

	arch/arm/mach-pxa/Kconfig
	arch/arm/mach-pxa/tosa.c
	arch/arm/mach-pxa/spitz.c
2008-07-12 21:43:01 +01:00
Russell King
a9da4f7ed6 Merge branches 'pxa-ian' and 'pxa-xm270' into pxa
Conflicts:

	MAINTAINERS
2008-07-12 21:42:04 +01:00
David Woodhouse
a8931ef380 Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 2008-07-11 14:36:25 +01:00
Ian Molton
8fb105f5cc PXA UDC - allow use of inverted GPIO for pullup
Signed-off-by: Ian Molton <spyro@f2s.com>
2008-07-10 20:15:10 +01:00
Ian Molton
c316f101a1 E-series GPIO / IRQ definitions. 2008-07-10 20:14:57 +01:00
Russell King
67f5cd0f6a Merge branches 'pxa-ezx', 'pxa-magician' and 'pxa-palm' into pxa 2008-07-10 19:50:38 +01:00
Mark Brown
54b238469b [ARM] 5113/1: PXA SSP: Additional register definitions for PXA3xx SSP
Also add some white space for a little clarity.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-10 17:07:46 +01:00
Russell King
f0006314d3 Merge branch 'imx' into devel
Conflicts:

	arch/arm/mm/Kconfig
2008-07-10 16:41:50 +01:00
Russell King
a177ba3b7a Merge branches 'at91', 'dyntick', 'ep93xx', 'iop', 'ixp', 'misc', 'orion', 'omap-reviewed', 'rpc', 'rtc' and 's3c' into devel 2008-07-10 16:38:50 +01:00
Stefan Schmidt
390d452fa1 [ARM] 5163/1: pxa27x_udc: Allow choosing the bits in UP2OCR_SEOS
Allow choosing the bits in UP2OCR_SEOS.

Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-10 13:44:54 +01:00
Stefan Schmidt
c1450f156f [ARM] 5164/1: pxafb: Support for RGB666, RGBT666, RGB888 and RGBT888
Add the .depth field to pxafb_mode_info and use it to set pixel data format
as 18(RGB666), 19(RGBT666), 24(RGB888) or 25(RGBT888)

Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-10 13:44:53 +01:00
Stefan Schmidt
00249adc0e [ARM] 5165/1: pxafb: More LCCR3 depth defines
Add missing depth definitions to LCCR3.

Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-10 13:44:53 +01:00
Marek Vašut
b5e4ad57ee [ARM] 5153/1: Add support for PalmTX handheld computer
PalmTX is PXA27x based device with wifi, bluetooth,
touchscreen, sdio slot, irda, keypad, nand flash,
pxa framebuffer, serial and usb gadget interface.

Supported by this patch is pxafb, touchscreen, irda,
keypad and sdio slot.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-10 12:15:31 +01:00
sedji gaouaou
613526677a [ARM] 5130/4: Support for the at91sam9g20
Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.

AT91sam9g20 is an evolution of the at91sam9260 with a faster clock
speed.
We created a new board for this device but based the chip support
directly on 9260 files with little updates.
Here is the chip page on Atmel wabsite:
http://atmel.com/dyn/products/product_card.asp?part_id=4337

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-10 12:13:47 +01:00
Ian Molton
aa9ae8eb1a Fix serial broken-ness on PXA250
PXA255 and 26x are the only PXA CPUs with HWUART. This patch prevents bogus
initialisation on other models.

Signed-off-by: Ian Molton <spyro@f2s.com>
2008-07-10 10:28:36 +01:00
Arnaud Patard
63f385cd1f [ARM] 5160/1: IOP3XX: gpio/gpiolib support
This patch brings support for gpio/gpiolib framework to Intel IOP3xx
platforms.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 23:31:42 +01:00
Eric Miao
5c9f50e90e [ARM] pxa: add simple gpio debug LEDs support for zylonite
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:38:33 +01:00
Eric Miao
a1f7fc48c1 [ARM] pxa: add GPIO expander (PCA9539) support for zylonite
And also reserve 32 IRQs for the two GPIO expanders.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:38:33 +01:00
Eric Miao
9ae819a819 [ARM] pxa: add pxa3xx NAND device and clock sources
A pxa3xx_set_nand_info() is also introduced to set the PXA3xx NAND
driver specific platform_data structure pointer.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:38:32 +01:00
Eric Miao
566b450c33 [ARM] pxa: add pxa2xx_mfp_set_lpm() to facilitate low power state change
Some boards want to change low power state of pins on-the-fly, this
function helps to facilitate that operation instead of switching
back-n-forth between two configurations with pxa2xx_mfp_config().

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:38:32 +01:00
Eric Miao
6d3dfe4a31 [ARM] pxa: allow display of uncompress message through STUART
Some boards use UART other than FFUART for the console, E.g. Marvell
PXA3xx Form Factor Platform (aka Littleton) uses STUART. This patch
modifies the uncompress.h so that display of the uncompress message
is routed to the STUART.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:38:31 +01:00
Russell King
f974a8ec96 Merge branch 'machtypes' into pxa-palm 2008-07-09 21:34:25 +01:00
Mike Rapoport
839257c9a8 [ARM] 5106/1: CM-X270: remove unneeded cm-x270.h
The include/asm-arm/arch-pxa/cm-x270.h is not used anymore. Remove it.

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:33:49 +01:00
Guennadi Liakhovetski
e172274ccc [ARM] 5088/3: pxa2xx: add pxa2xx_set_spi_info to register pxa2xx-spi platform devices
Add a function to dynamically allocate and register pxa2xx-spi platform
devices, to be used by PXA2xx and PXA3xx based systems. Switch pcm027 and
lubbock to use it.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:31:52 +01:00
Mark Brown
9f19d63828 [ARM] 5085/2: PXA: Move AC97 over to the new central device declaration model
As well as moving all the device declarations to a single one in devices.c
this causes all platforms to register the I/O and interrupt resources for
the AC97 controller.

Cc: eric miao <eric.miao@marvell.com>
Cc: Mike Rapoport <mike@compulab.co.il>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Jürgen Schindele <linux@schindele.name>
Cc: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 21:31:51 +01:00
Dmitry Baryshkov
918dbcba4e [ARM] 5145/1: PXA2xx: provide api to control IrDA pins state
Provide a set of functions to control state of pins dedicated to IrDA.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 20:56:28 +01:00
Russell King
66a7f72d98 [ARM] pxa: remove pxa_set_cken()
pxa_set_cken() is now unused, remove it.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-09 20:56:28 +01:00
Russell King
fdc614e873 Merge branches 'pxa-misc', 'pxa-pwm' and 'pxa-multi' into pxa 2008-07-09 20:56:05 +01:00
Saeed Bishara
ff7b04796d dmaengine: DMA engine driver for Marvell XOR engine
The XOR engine found in Marvell's SoCs and system controllers
provides XOR and DMA operation, iSCSI CRC32C calculation, memory
initialization, and memory ECC error cleanup operation support.

This driver implements the DMA engine API and supports the following
capabilities:
- memcpy
- xor
- memset

The XOR engine can be used by DMA engine clients implemented in the
kernel, one of those clients is the RAID module.  In that case, I
observed 20% improvement in the raid5 write throughput, and 40%
decrease in the CPU utilization when doing array construction, those
results obtained on an 5182 running at 500Mhz.

When enabling the NET DMA client, the performance decreased, so
meanwhile it is recommended to keep this client off.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2008-07-08 11:58:36 -07:00
Russell King
66ee156078 Merge branches 'ns9x' and 'machtypes' into devel 2008-07-07 16:26:41 +01:00
Stefan Schmidt
5e329d1c7f [ARM] 5079/1: Warn people when using pxa2xx-gpio.h
Warn people when using pxa2xx-gpio.h as it is only here for backwards
compatibility. The new mfp-pxa2[57]x.h and the relevant API should be used
instead.

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-07 13:23:39 +01:00
Dmitry Baryshkov
16b32fd0a3 [ARM] 5150/1: Tosa: support built-in bluetooth power-up
The driver is pretty much generic and will be later shared with
a few other devices, like hx4700 ipaq.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-07 13:22:10 +01:00
Dmitry Baryshkov
bf0116e54e [ARM] 5097/1: Tosa: support TC6393XB device
Add definitions for Toshiba TC6393XB companion chip and register
the tc6393xb device.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-07 13:22:02 +01:00
Dmitry Baryshkov
b032fccca8 [ARM] 5083/2: Tosa: fix IrDA transciver powerup.
On tosa the tranciver LED isn't powered down if
the GPIO47 (STUART_TX) isn't configured as low-level.
Power it down if IrDA is off to save a bit of power.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-07 13:21:59 +01:00
Dmitry Baryshkov
75f10b465a [ARM] 5047/2: Support resetting by asserting GPIO pin
This adds support for resetting via assertion of GPIO pin.
This e.g. is used on Sharp Zaurus SL-6000.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-07 13:21:52 +01:00
Juergen Beisert
ff6552e4f3 i.MX27 family: Add the Phytec PCM970 evaluation board
The Phytec phyCORE-i.MX27 CPU module is delivered with the PCM970
baseboard by default. This patch adds support for the hardware.

This code is only an empty stub; it is filled up with functionality
in a later patch series.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:03:01 +02:00
Juergen Beisert
7e5e9f5457 i.MX27: Adding PCM038 platform support
This patch adds support for the phyCORE-i.MX27 cpu module (aka pcm038).
It is as generic as possible in order to support any kind of baseboard.

Note: This CPU module implementation can't work without a baseboard
support. Baseboard support can be added by the PCM-970 (included in
this patch stack) or any custom variant.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:03:00 +02:00
Juergen Beisert
80eedae6f0 i.MX27: Add ADS platform support
This patch adds basic support for the Freescale MX27ADS reference board.
Currently only a serial console can be used.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:03:00 +02:00
Juergen Beisert
f31405cc4c i.MX27 CPU: Add basic i.MX27 CPU support
Add basic i.MX27 CPU support

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:59 +02:00
Juergen Beisert
32dc80c9cb i.MX2 family: Add basic mach support (headers)
This patch adds basic mach support for the mx2 processor family, based
on the original freescale code and adapted to mainline kernel coding
style.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:56 +02:00
Juergen Beisert
aa10abd381 i.MX2 family: Add GPIO multiplexing support
This patch adds GPIO multiplexing support for the imx1/mxc2
family of procesors.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:55 +02:00
Juergen Beisert
259bcaae9a MXC arch: Simplify architecture's irq sources
Simplify architecture's irq headers and sources, to share these files
between MXC3 and MXC2.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:54 +02:00
Daniel Mack
9a4cd7a5c8 MX3: Add basic support for LogicPD i.MX31 LiteKit
This patch adds basic support for i.MX31 LiteKit by LogicPD.
With printascii() in kernel/printk.c, it boots right into the
rootfs-panic.

Note: This is a modified version of Daniel's patch to fit into this patch
stack.

> On 09.06.2008, at 17:26, Russell King - ARM Linux wrote:
>
> > I would much prefer it if board specific includes were included by the
> > code which needs them rather than in asm/arch/hardware.h.  With the
> > device model, drivers shouldn't need to include any board specific
> > includes - only the board specific C file should need it.
>
> The new version of this patch (#5102) has been uploaded to the patch
> tracker this morning.

Signed-off-by: Daniel Mack <daniel@caiaq.de>

-- 
 arch/arm/configs/mx31litekit_defconfig    | 1100 ++++++++++++++++++++++++++++++
 arch/arm/mach-mx3/Kconfig                 |    7 
 arch/arm/mach-mx3/Makefile                |    1 
 arch/arm/mach-mx3/mx31lite.c              |   96 ++
 include/asm-arm/arch-mxc/board-mx31lite.h |   38 +
 include/asm-arm/arch-mxc/debug-macro.S    |    3 
 6 files changed, 1245 insertions(+)
2008-07-05 10:02:53 +02:00
Sascha Hauer
ce8ffef0bf MX31: add basic pcm037 board support
This patch adds basic board support for phytecs pmc037 board.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:52 +02:00
Sascha Hauer
4bc256501a MXC: add debug-macro.S for mxc
This patch adds debug-macro.S for arch-mxc

Disadvantage: Due to the board specific UART definition, these macros (and
compile time) will fail for multi board kernels.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:51 +02:00
Juergen Beisert
d0f349fbce i.MXC family: Adding timer support
This patch adds timer support for the i.MX machine family. This code can
be used on the following machs:

 - i.MX1 (tested)
 - i.MX2 (i.MX21 (to be tested), i.MX27 (tested))
 - i.MX3 (i.MX31 (tested))

TODO: It seems impossible to build a kernel for more than one CPU because the
timer do not follow the platform device rules. So it does only work if
timer 1 can be accessed on all CPUs at the same address.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:50 +02:00
Sascha Hauer
90292ea60f MXC: add io multiplexing functions for mx3
This patch adds functions to use the io multiplexer on mx3 platforms.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:50 +02:00
Juergen Beisert
07bd1a6cc7 MXC arch: Add gpio support for the whole platform
This patch bases on the one from Daniel Mack. The most important change to
Daniel's patch is to be more generic. This gpio routine supports at least
the i.MX27 and i.MX31 processors.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Acked-by: Daniel Mack <daniel@caiaq.de>
2008-07-05 10:02:49 +02:00
Sascha Hauer
e3d13ff4b9 mxc: add MX3 support for i.MX internal UART driver
This patch adds MX3 support for the i.MX internal uart driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:48 +02:00
Sascha Hauer
df1bf4bdb2 i.MX3: introduce clock API
This patch introduces the clock API for for arch-mxc

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:48 +02:00
Juergen Beisert
c0db2ea4e3 MXC family: Add clock handling
Internal clock path handling for the mxc CPUs.

Changed against the original Freescale code (and against clocklib for example):
 - clock rate is always calculated whenever one ask for the current rate
   (means struct clk has no more a member called "rate"). So switching the PLL
   base frequency will propagate immediately to all other clocks that are
   depending on this frequency.

Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
2008-07-05 10:02:47 +02:00
Sascha Hauer
38a41fdf94 IMX: introduce clock API
This patch introduces the clock API for i.MX and converts all
in-Kernel drivers to use it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:46 +02:00
Sascha Hauer
2582d8c165 IMX UART: Add board specific init/exit functions
Add platform specific init functions. Also rename the struct
platform_device dev into pdev.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:45 +02:00
Sascha Hauer
63dd10846d MXC: do not include board specific header from architecture include
do not include board-mx31ads.h from hardware.h, instead include it
directly only where needed.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-07-05 10:02:43 +02:00
Ben Dooks
6fc601e37b [ARM] S3C24XX: PWM API support.
Add support for PWM in the S3C24XX series of SoC via the
PWM API.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-07-03 16:51:30 +01:00
Matthieu Castet
d5c52922b6 [ARM] S3C2412: Correct parents for EREFCLK and UREFCLK
For s3c2412, set parent for clk_erefclk and clk_urefclk.
This allow for example to use xtal or extclk for i2s clock.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com>
2008-07-03 16:51:30 +01:00
Ben Dooks
b4b68f8cfa [ARM] S3C24XX: Add PWM timer MUX defines
Add timer defines for the MUX settings for
each of the PWM timers to add to the per-timer
defines already in the file.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-07-03 16:51:23 +01:00
Ben Dooks
f348a2a281 [ARM] S3C24XX: Add gpiolib support
Add support for gpilib on all S3C24XX platforms.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-07-03 16:51:23 +01:00
Paulius Zaleckas
f7def13ed0 [ARM] 5122/1: imx_dma_request_by_prio simpilfication
imx_dma_request_by_prio can return channel number by itself.
No need to supply variable address through parameters.

Also converted all drivers using this function.

Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 16:39:57 +01:00
Catalin Marinas
826cbdaff2 [ARM] 5092/1: Fix the I-cache invalidation on ARMv6 and later CPUs
This patch adds the I-cache invalidation in update_mmu_cache if the
corresponding vma is marked as executable. It also invalidates the
I-cache if a thread migrates to a CPU it never ran on.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 16:39:57 +01:00
Vegard Nossum
3c093f9f18 [ARM] fix header guards
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 16:39:56 +01:00
Russell King
946e2ad040 Merge branch 'fb' into devel
Conflicts:

	arch/arm/Kconfig
2008-07-03 16:13:28 +01:00
Russell King
9ecba1f288 [ARM] rpc: ecard: remove deprecated ecard_address() and relatives
ecard_address() is obsolete, and has been marked deprecated since
at least 2.6.12-rc2.  All in-tree users have been updated to use
the new approach, so it's time to remove this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 14:25:58 +01:00
Russell King
50bbb05d60 [ARM] rpc: deprecate __ioaddr() and __ioaddrc() helpers
Now everything is converted to use MMIO accessors, these helpers
are no longer required.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 14:25:58 +01:00
eric miao
5cca91479b [ARM] pxa: make zylonite use the generic PWM backlight driver
Patch mostly by Eric Miao, minor edits by rmk.

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-03 13:25:02 +01:00
Paul Walmsley
88b8ba9057 ARM: OMAP2: Clock: New OMAP2/3 DPLL rate rounding algorithm
This patch adds a new rate rounding algorithm for DPLL clocks on the
OMAP2/3 architecture.

For a desired DPLL target rate, there may be several
multiplier/divider (M, N) values which will generate a sufficiently
close rate.  Lower N values result in greater power economy.  However,
lower N values can cause the difference between the rounded rate and
the target rate ("rate error") to be larger than it would be with a
higher N.  This can cause downstream devices to run more slowly than
they otherwise would.

This DPLL rate rounding algorithm:

- attempts to find the lowest possible N (DPLL divider) to reach the
  target_rate (since, according to Richard Woodruff <r-woodruff@ti.com>,
  lower N values save more power than higher N values).

- allows developers to set an upper bound on the error between the
  rounded rate and the desired target rate ("rate tolerance"), so an
  appropriate balance between rate fidelity and power savings can be
  set.  This maximum rate error tolerance is set via
  omap2_set_dpll_rate_tolerance().

- never returns a rounded rate higher than the target rate.

The rate rounding algorithm caches the last rounded M, N, and rate
computation to avoid rounding the rate twice for each clk_set_rate()
call.  (This patch does not yet implement set_rate for DPLLs; that
follows in a future patch.)

The algorithm trades execution speed for rate accuracy.  It will find
the (M, N) set that results in the least rate error, within a
specified rate tolerance.  It does this by evaluating each divider
setting - on OMAP3, this involves 128 steps.  Another approach to DPLL
rate rounding would be to bail out as soon as a valid rate is found
within the rate tolerance, which would trade rate accuracy for
execution speed.  Alternate implementations welcome.

This code is not yet used by the OMAP24XX DPLL clock, since it
is currently defined as a composite clock, fusing the DPLL M,N and the
M2 output divider.  This patch also renames the existing OMAP24xx DPLL
programming functions to highlight that they program both the DPLL and
the DPLL's output multiplier.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:46 +03:00
Paul Walmsley
542313cc98 ARM: OMAP2: Clock: Add OMAP3 DPLL autoidle functions
This patch adds support for DPLL autoidle control to the OMAP3 clock
framework.  These functions will be used by the noncore DPLL enable
and disable code - this is because, according to the CDP code, the
DPLL autoidle status must be saved and restored across DPLL
lock/bypass/off transitions.

N.B.: the CORE DPLL (DPLL3) has three autoidle mode options, rather
than just two.  This code currently does not support the third option,
low-power bypass autoidle.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:45 +03:00
Paul Walmsley
097c584cd4 ARM: OMAP: Add OMAP chip type structure; clean up mach-omap2/id.c
Add a new OMAP chip identification interface, omap_chip_id.
omap_chip_id is a structure which contains one bit for each OMAP2/3
CPU type, and on 3430, ES level.  For example, the CHIP_IS_OMAP2420
bit is set in omap_chip at boot on an OMAP2420.  On OMAP3430ES2, both
CHIP_IS_OMAP3430 and CHIP_IS_OMAP3430ES2 bits are set.

omap_chip is set in mach-omap2/id.c by _set_omap_chip(). Other
code should use the omap_chip_is() function to test against omap_chip.

Also, clean up id.c by splitting some code out of
omap_check_revision() into its own function, _set_system_rev(); and
converting some debug printk()s into pr_debug().

Second revision.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:45 +03:00
Tony Lindgren
a58caad113 ARM: OMAP: Introduce omap_globals and prcm access functions for multi-omap
New struct omap_globals contains the omap processor specific
module bases. Use omap_globals to set the various base addresses
to make detecting omap chip type simpler.

Also introduce OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS for future multi-omap
patches.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:44 +03:00
Tony Lindgren
e1f80bfca8 ARM: OMAP: Remove __REG access for multi-omap
This does not play nicely with multi-omap as it cannot be replaced
by a function in io.c for omaps with different IO bases.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:43 +03:00
Tony Lindgren
f35ae63468 ARM: OMAP: USB: Change omap USB code to use omap_read/write instead of __REG
Change omap USB code to use omap_read/write instead of __REG for multi-omap

Cc: David Brownell <david-b@pacbell.net>
Cc: linux-usb@vger.kernel.org
Cc: i2c@lm-sensors.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:43 +03:00
Tony Lindgren
030b15457d ARM: OMAP: Change omap_cf.c and omap_nor.c to use omap_readw/writew instead of __REG
Change omap_cf.c and omap_nor.c to use omap_readw/writew instead of __REG.
This is needed for multi-omap in the future.

Cc: David Brownell <david-b@pacbell.net>
Cc: linux-pcmcia@lists.infradead.org
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Tony Lindren <tony@atomide.com>
2008-07-03 12:24:41 +03:00
Hiroshi DOYU
137b3ee27a ARM: OMAP: CLKFW: Initial debugfs support for omap clock framework
debugfs can provide the infrastructure to trace the dependencies of
clock tree hierarchy quite visibly. This patch enables to keep track
of clock tree hierarchy and expose their attributes under each clock
directry as below:

	omap:~# tree -d -L 2 /debug/clock/omap_32k_fck/
	/debug/clock/omap_32k_fck/
	|-- gpt10_fck
	|-- gpt11_fck
	|-- gpt1_fck
	|-- per_32k_alwon_fck
	|   |-- gpio2_fck
	|   |-- gpio3_fck
	|   |-- gpio4_fck
	|   |-- gpio5_fck
	|   |-- gpio6_fck
	|   `-- wdt3_fck
	|-- ts_fck
	`-- wkup_32k_fck
	    |-- gpio1_fck
	    `-- wdt2_fck

	14 directories
	omap:~# tree  /debug/clock/omap_32k_fck/gpt10_fck/
	/debug/clock/omap_32k_fck/gpt10_fck/
	|-- flags
	|-- rate
	`-- usecount

	0 directories, 3 files

Although, compared with David Brownell's small patch, this may look
bit overkilling, I expect that this debugfs can deal with other PRCM
complexities at the same time. For example, powerdomain dependencies
can be expressed by using symbolic links of these clocks if
powerdomain supports dubgfs as well.

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:41 +03:00
Tony Lindgren
44f78f43b3 ARM: OMAP: Clean up interrupt lines to fix warnings for multi-omap
If boards with different NR_IRQS are compiled together, tons of
compiler warnings are emitted about redefining NR_IRQS.

This patch fixes the problem by adding up NR_IRQS in a common place.

Patch also removes quite a bit of now unnecessary code.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:41 +03:00
Eduardo Valentin
bc5d0c89c8 ARM: OMAP: McBSP: Prepare for splitting into omap1 and omap2 code
This patch transform mcbsp code to use platform data
from arch/arm/plat-omap/devices.c

It also gets ride of ifdefs on mcbsp.c code.
To do it, a platform data structure was defined.

Signed-off-by: Eduardo Valentin <eduardo.valentin@indt.org.br>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:39 +03:00
Tony Lindgren
c2d43e39c7 ARM: OMAP: SRAM: Split sram24xx.S into sram242x.S and sram243x.S
Split sram24xx.S into sram242x.S and sram243x.S

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:38 +03:00
Tony Lindgren
97b7f71558 ARM: OMAP: DMA: Clean-up code
DMA clean-up, mostly checkpatch.pl fixes.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:37 +03:00
Tony Lindgren
0499bdeb1d ARM: OMAP: DMA: Remove __REG access
Remove __REG access in DMA code, use dma_read/write instead:

- dynamically set the omap_dma_base based on the omap type
- omap_read/write becomes dma_read/write
- dma channel registers are read with dma_ch_read/write

Cc: David Brownell <david-b@pacbell.net>
Cc: linux-usb@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:36 +03:00
Tony Lindgren
4d96372e6d ARM: OMAP: DMA: Make channels dynamic for multi-boot
Make DMA channels dynamic for multi-boot

Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:31 +03:00
Paul Walmsley
4a79acdc78 ARM: OMAP: Add OMAP3430 base defines
Add symbolic constants for OMAP3430 base addresses; include that file
in hardware.h.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:31 +03:00
Richard Woodruff
3fddd09e59 ARM: OMAP: DMTimer: Optimize by adding load and start
This patch optimizes the timer load and start sequence.  By combining the
load and start a needless posted wait can be removed from the system timer
execution path.

* Before patch register writes are taking up .078% @ 500MHz during idle.

 Address                 |total  |min  |max      |avr     |count|ratio%
 old\process\default_idle|7.369s |0.0us|999.902ms|14.477ms|509. |62.661%
 ld\Global\cpu_v7_do_idle|4.265s |0.0us|375.786ms|24.374ms|175. |36.270%
                (UNKNOWN)|17.503ms|0.us|531.080us|5.119us|3419. |0.148%
 r\omap_dm_timer_set_load|8.135ms|0.0us|79.887us|15.065us|540.  |0.069% <--
 \vmlinux-old\Global\_end|2.023ms|0.0us|4.000us|0.560us|3613.   |0.017%
 -old\Global\__raw_readsw|1.962ms|0.0us|108.610us|9.167us|214.  |0.016%
 old\smc91x\smc_interrupt|1.353ms|0.0us|10.212us|2.348us|576.   |0.011%
 s/namei\__link_path_walk|1.161ms|0.0us|4.310us|0.762us|  1524. |0.009%
 \omap_dm_timer_write_reg|1.085ms|0.0us|126.150us|2.153us|504.  |0.009% <--

* After patch timer functions do not show up in top listings for long captures.

Signed-off-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-07-03 12:24:30 +03:00
Saeed Bishara
f4db56ffd4 [MTD] orion_nand: add chip_delay parameter
Some SoCs need a different chip_delay value.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Acked-by: Jörn Engel <joern@logfs.org>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-06-30 16:04:45 -04:00
Saeed Bishara
1338760329 [ARM] Kirkwood: support L2 writeback mode
This patch allows booting Kirkwood with the L2 in writeback mode,
by reading the WT override bit from the L2 config register and
passing that into the Feroceon L2 init routine, instead of assuming
that the WT override bit will always be set

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-30 14:25:24 -04:00
Jens Axboe
f6dd9fa5a7 arm: convert to generic helpers for IPI function calls
This converts arm to use the new helpers for smp_call_function() and
friends, and adds support for smp_call_function_single().

Fixups and testing done by Catalin Marinas <catalin.marinas@arm.com>

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2008-06-26 11:22:57 +02:00
Abhishek Sagar
395a59d0f8 ftrace: store mcount address in rec->ip
Record the address of the mcount call-site. Currently all archs except sparc64
record the address of the instruction following the mcount call-site. Some
general cleanups are entailed. Storing mcount addresses in rec->ip enables
looking them up in the kprobe hash table later on to check if they're kprobe'd.

Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Cc: davem@davemloft.net
Cc: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-06-23 22:10:56 +02:00
Stanislav Samsonov
794d15b25d [ARM] add Marvell 78xx0 ARM SoC support
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.

This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.

Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:10 +02:00
Lennert Buytenhek
a9311cfed2 [ARM] Orion: PCIe x4/x1 detection support
The Discovery Duo (MV78xx0) has two x4 PCIe ports which can either
be used in x4 mode or in quad x1 mode.  This patch adds an accessor
function to the generic plat-orion PCIe handling code to detect in
which of the two modes we're running (which is determined by strap
pins and/or configured by the bootloader).

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:09 +02:00
Saeed Bishara
651c74c74b [ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.

This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:06 +02:00
Lennert Buytenhek
99c6dc117d [ARM] Feroceon: L2 cache support
This patch adds support for the unified Feroceon L2 cache controller
as found in e.g. the Marvell Kirkwood and Marvell Discovery Duo
families of ARM SoCs.

Note that:

- Page table walks are outer uncacheable on Kirkwood and Discovery
  Duo, since the ARMv5 spec provides no way to indicate outer
  cacheability of page table walks (specifying it in TTBR[4:3] is
  an ARMv6+ feature).

  This requires adding L2 cache clean instructions to
  proc-feroceon.S (dcache_clean_area(), set_pte()) as well as to
  tlbflush.h ({flush,clean}_pmd_entry()).  The latter case is handled
  by defining a new TLB type (TLB_FEROCEON) which is almost identical
  to the v4wbi one but provides a TLB_L2CLEAN_FR flag.

- The Feroceon L2 cache controller supports L2 range (i.e. 'clean L2
  range by MVA' and 'invalidate L2 range by MVA') operations, and this
  patch uses those range operations for all Linux outer cache
  operations, as they are faster than the regular per-line operations.

  L2 range operations are not interruptible on this hardware, which
  avoids potential livelock issues, but can be bad for interrupt
  latency, so there is a compile-time tunable (MAX_RANGE_SIZE) which
  allows you to select the maximum range size to operate on at once.
  (Valid range is between one cache line and one 4KiB page, and must
  be a multiple of the line size.)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:04 +02:00
Stanislav Samsonov
836a8051d5 [ARM] Feroceon: L1 cache range operation support
This patch adds support for the L1 D cache range operations that
are supported by the Marvell Discovery Duo and Marvell Kirkwood
ARM SoCs.

Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:03 +02:00
Lennert Buytenhek
777f9bebad [ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.

This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
Ke Wei
1219715de7 [ARM] Orion: add a separate BRIDGE_INT_TIMER1_CLR define
Some Feroceon-based SoCs have an MBUS bridge interrupt controller
that requires writing a one instead of a zero to clear edge
interrupt sources such as timer expiry.

This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform
code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or
BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:01 +02:00
Lennert Buytenhek
79e90dd5aa [ARM] Orion: nuke orion5x_{read,write}
Nuke the Orion-specific orion5x_{read,write} wrappers.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:44:57 +02:00
Lennert Buytenhek
0e3bc0503f [ARM] Orion: use linux/serial_reg.h for Orion uncompress.h
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:44:56 +02:00
Lennert Buytenhek
d2b2a6bbc0 [ARM] Orion: add 88F5181L (Orion-VoIP) support
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
2008-06-22 22:44:51 +02:00
Lennert Buytenhek
6eef84a549 [ARM] Orion: delete unused IO_SPACE_REMAP define
This define isn't used anywhere in the kernel tree -- nuke it.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
2008-06-22 22:44:44 +02:00
Nicolas Pitre
2239aff6ab [ARM] cache align destination pointer when copying memory for some processors
The implementation for memory copy functions on ARM had a (disabled)
provision for aligning the source pointer before loading registers with
data.  Turns out that aligning the _destination_ pointer is much more
useful, as the read side is already sufficiently helped with the use of
preload.

So this changes the definition of the CALGN() macro to target the
destination pointer instead, and turns it on for Feroceon processors
where the gain is very noticeable.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:44:38 +02:00
Ingo Molnar
e765ee90da Merge branch 'linus' into tracing/ftrace 2008-06-16 11:15:58 +02:00
Stefan Schmidt
9fc697b0b0 [ARM] 5082/1: pxa: Definition for the third USB port control register UP3OCR
This adds the definition for the third USB port control register UP3OCR. It is
used on the EZX GSM mobile phones.

Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-15 19:54:31 +01:00