Commit graph

1322 commits

Author SHA1 Message Date
Maciej W. Rozycki
36de48de85 [MIPS] DECstation: Optimised early printk()
This is an optimised implementation of early printk() for the DECstation.  
After the recent conversion to a MIPS-specific generic routine using a 
character-by-character output the performance dropped significantly.  
This change reverts to the previous speed -- even at 9600 bps of the 
serial console the difference is visible with a naked eye; I presume for a 
framebuffer it is even worse (it may depend on exactly which one is used 
though).

 Additionally the change includes a fix for a problem that the old 
implementation had -- the format used would not actually limit the length 
of the string output.  This new implementation uses a local buffer to deal 
with it -- even with this additional copying it is much faster than the 
generic function.

 Plus this driver is registered much earlier than the generic one, 
allowing one to see critical messages, such as one about an incorrect CPU 
setting used, that are produced beforehand. :-)

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Maciej W. Rozycki
d388d6853f [MIPS] No I/O ports on the DECstation
There are no I/O ports on the DECstation whatsoever in any configuration 
as neither the CPU nor the peripheral buses used have a concept of such.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Atsushi Nemoto
b63e804459 [MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:59 +01:00
Yoichi Yuasa
c66df567e5 [MIPS] update cobalt_defconfig
Enable Cobalt button support and change ATA driver from BLK_DEV_VIA82CXXX
to PATA_VIA..

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:59 +01:00
Atsushi Nemoto
69ed25b895 [MIPS] Remove unused dump_tlb functions
Remove unused dump_tlb functions and cleanup some includes.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:57 +01:00
Atsushi Nemoto
4becef1d85 [MIPS] Unify dump_tlb
Unify lib-{32,64}/dump_tlb.c into lib/dump_tlb.c and move
lib-32/r3k_dump_tlb.c to lib directory.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ralf Baechle
f6e2373ad6 [MIPS] MIPSsim: Move code away from the other MIPS Inc. BSP code.
It shares no code at all.  While at it also fix up the beginning bitrot.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ralf Baechle
24e9d0b96d [MIPS] Hook for platforms to define cachability of /dev/mem regions
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Robert P. J. Day
b3f6df9f21 [MIPS] Transform old-style macros to newer "__noreturn"
Convert old/obsolete NORET_TYPE and ATTRIB_NORET macros to use the
newer standard of "__noreturn" as defined in compiler-gcc.h.

Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ralf Baechle
8f8771a057 [MIPS] SMTC: Use current_cpu_data instead of cpu_data[smp_processor_id]
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Florian Fainelli
4ead16819b [MIPS] Add generic GPIO to Au1x00
This patch adds support for the generic GPIO API to Au1x00 boards. It requires
the generic GPIO patch for MIPS boards by Yoichi Yuasa. Now there is a MIPS
target using it, can you queue these patchset for 2.6.22 ? Thank you very
much in advance.

Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Yoichi Yuasa
096633358c [MIPS] Add generic GPIO support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Atsushi Nemoto
e48ce6b8df [MIPS] Simplify missing-syscalls for N32 and O32
Use standard missing-syscalls with EXTRA_CFLAGS instead of duplicating
the command.  And move the archprepare rule before the archclean rule.
Suggested by Franck Bui-Huu.  Also add "echo" to show the target ABI.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Yoichi Yuasa
d7eb079fc8 [MIPS] Remove unused config entries
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Ingo Molnar
0437e109e1 sched: zap the migration init / cache-hot balancing code
the SMP load-balancer uses the boot-time migration-cost estimation
code to attempt to improve the quality of balancing. The reason for
this code is that the discrete priority queues do not preserve
the order of scheduling accurately, so the load-balancer skips
tasks that were running on a CPU 'recently'.

this code is fundamental fragile: the boot-time migration cost detector
doesnt really work on systems that had large L3 caches, it caused boot
delays on large systems and the whole cache-hot concept made the
balancing code pretty undeterministic as well.

(and hey, i wrote most of it, so i can say it out loud that it sucks ;-)

under CFS the same purpose of cache affinity can be achieved without
any special cache-hot special-case: tasks are sorted in the 'timeline'
tree and the SMP balancer picks tasks from the left side of the
tree, thus the most cache-cold task is balanced automatically.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2007-07-09 18:51:57 +02:00
Ralf Baechle
4b3e975e4a [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores
The idle loop goes to sleep using the WAIT instruction if !need_resched().
This has is suffering from from a race condition that if if just after
need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
we've just completed the test so go to sleep anyway.  This would be
trivial to fix by just disabling interrupts during that sequence as in:

        local_irq_disable();
        if (!need_resched())
                __asm__("wait");
        local_irq_enable();

but the processor architecture leaves it undefined if a processor calling
WAIT with interrupts disabled will ever restart its pipeline and indeed
some processors have made use of the freedom provided by the architecture
definition.  This has been resolved and the Config7.WII bit indicates that
the use of WAIT is safe on 24K, 24KE and 34K cores.  It also is safe on
74K starting revision 2.1.0 so enable the use of WAIT with interrupts
disabled for 74K based on a c0_prid of at least that.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Ralf Baechle
9349075a15 [MIPS] SMTC: Fix cut'n'paste bug in Kconfig.debug
This effectivly turned the SMTC_IDLE_HOOK_DEBUG debug option into a no-op.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Ralf Baechle
f7c2778151 [MIPS] Change libgcc-style functions from lib-y to obj-y
Reported by Eugene Surovegin <ebs@ebshome.net>.

If only modules were users of these functions they did not get linked into
the kernel proper, so later module loads would fail as well.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Chris Dearman
c3e838a2cb [MIPS] Fix timer/performance interrupt detection
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00
Ralf Baechle
6fb88ce04f [MIPS] AP/SP: Avoid triggering the 34K E125 performance issue
C0_status doesn't need to be initialized at this point anyway; the register
will be initialized later.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:10 +01:00
Ralf Baechle
8c976e3451 [MIPS] VSMP: Fix initialization ordering bug.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-04 15:53:16 +01:00
Alexey Dobriyan
5da44ad504 mips-jazz: correct flags for timer io resource
arch/mips/jazz/setup.c:55:4: error: Initializer entry defined twice

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-28 11:38:19 -07:00
Chris Dearman
8e15a0e35f [MIPS] Count timer interrupts correctly.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:34 +02:00
Ralf Baechle
3207cd5c4b [MIPS] EMMA2RH: Disable GEN_RTC, it can't possibly work.
Neither rtc_mips_get_time nor rtc_mips_set_time are being initialized by
the EMMA2RH setup code, so genrtc at best was a RTC dummy avoiding a few
error messages but not providing actual functionality.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:34 +02:00
Pavel Kiryukhin
a76f3a417a [MIPS] use compat_siginfo in rt_sigframe_n32
Signed-off-by: Pavel Kiryukhin <vksavl@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Ralf Baechle
c8eae71dc8 [MIPS] 20K: Handle WAIT related bugs according to errata information
We used to avoid the WAIT entirely on the 20K but really only need to do
this on early revs of the 20K.  Without this a 20K was a bit of a
power hog.  Well, in the lower power power hog category ;-)

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Ralf Baechle
b0c10b9f4c [MIPS] AP/SP requires shadow registers, auto enable support.
Noticed by Chris Dearman (chris@mips.com).

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Yoichi Yuasa
b3a04a6d07 [MIPS] Fix pb1500 reg B access
au_readl() is correct here.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Yoichi Yuasa
08a4593682 [MIPS] Alchemy: Fix wrong cast
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Yoichi Yuasa
e460b73c87 [MIPS] remove "support for" from system type entry
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Yoichi Yuasa
2ec0e59aff [MIPS] add io_map_base to pci_controller on Cobalt
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:33 +02:00
Ralf Baechle
3ca507920d [MIPS] __ucmpdi2 arguments are unsigned long long.
Reported by Eugene Surovegin <ebs@ebshome.net>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-26 19:57:32 +02:00
Ralf Baechle
3b1d4ed535 [MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict.  So that's the one-liner.
The rest is 10 square kilometers of collateral damage fixup this include
used to paper over.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-20 22:27:10 +01:00
Chris Dearman
7b4f4ec210 [MIPS] Fix builds where MSC01E_xxx is undefined.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14 18:25:15 +01:00
Chris Dearman
ffe9ee4709 [MIPS] Separate performance counter interrupts
Support for performance counter overflow interrupt that is on a separate
interrupt from the timer.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14 18:25:15 +01:00
Chris Dearman
b72c052622 [MIPS] Malta: Fix for SOCitSC based Maltas
And an attempt to tidy up the core/controller differences.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-14 18:25:14 +01:00
Atsushi Nemoto
e10e0cc885 [MIPS] Fix IP27 build
IP27 does no longer have ZONE_DMA.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:55 +01:00
Ralf Baechle
4ebd5233f0 [MIPS] Fix modpost warnings by making start_secondary __cpuinit
WARNING: arch/mips/kernel/built-in.o(.text+0x9a58): Section mismatch: reference to .init.text:cpu_report (between 'start_secondary' and 'smp_prepare_boot_cpu')
WARNING: arch/mips/kernel/built-in.o(.text+0x9a60): Section mismatch: reference to .init.text:per_cpu_trap_init (between 'start_secondary' and 'smp_prepare_boot_cpu')
WARNING: arch/mips/kernel/built-in.o(.text+0x9adc): Section mismatch: reference to .init.text:cpu_probe (between 'start_secondary' and 'smp_prepare_boot_cpu')
mipsel-linux-objcopy -S -O srec --remove-section=.reginfo --remove-section=.mdebug --remove-section=.comment --remove-section=.note --remove-section=.pdr --remove-section=.options --remove-section=.MIPS.options vmlinux arch/mips/boot/vmlinux.srec

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:54 +01:00
Chris Dearman
cf75789953 [MIPS] SMTC: Fix build error caused by nonsense code.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:54 +01:00
Ralf Baechle
6a05888d71 [MIPS] SMTC: The MT ASE requires to initialize c0_pagemask and c0_wired.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:54 +01:00
Ralf Baechle
8e8a52ed87 [MIPS] SMTC: Don't continue in set_vi_srs_handler on detected bad arguments.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:54 +01:00
Ralf Baechle
ef36fc3c5b [MIPS] SMTC: Fix warning.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Atsushi Nemoto
7a6d4f3874 [MIPS] Wire up utimensat, signalfd, timerfd, eventfd
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Ralf Baechle
d3a509118a [MIPS] Atlas: Fix build.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Chris Dearman
acaec427bc [MIPS] Always install the DSP exception handler.
Some non-DSP enabled cores 24K / 34K can generate a DSP exception where they
are actually expected to produce a reserved instruction exception.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Ralf Baechle
da9bc7263d [MIPS] SMTC: Don't set and restore irqregs ptr from self_ipi.
This did corrupt register s0 which the caller of self_ipi expects to
be unchanged.  This is a kernel bug which will only be triggered with
the compilers which compile __smtc_ipi_replay to use s0 across the
invocation of self_ipi. Gcc 4.1.2 does this, for example.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-11 18:20:53 +01:00
Atsushi Nemoto
6ba07e590d [MIPS] Fix warning by moving do_default_vi into CONFIG_CPU_MIPSR2_SRS
This fixes the warning:

arch/mips/kernel/traps.c:931: warning: 'do_default_vi' defined but not used

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:33 +01:00
Robert P. J. Day
490dcc4d30 [MIPS] Fix some minor typoes in arch/mips/Kconfig.
Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:33 +01:00
Ralf Baechle
cc8f0b827f [MIPS] Remove prototype for deleted function qemu_handle_int
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:33 +01:00
Atsushi Nemoto
8676d2e024 [MIPS] Fix some system calls with long long arguments
* O32 fadvise64() pass long long arguments by register pairs.  Add
  sys32 version for 64 bit kernel.
* N32 readahead() can pass a long long argument by one register.  No
  need to use sys32_readahead.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-06-06 19:34:32 +01:00