This implements a simple show_code() that is in turn plugged in to
show_regs() to provide minimal code dumping at the end of the trace.
Built on top of a simple instruction disassembler derived from the
binutils opcode table.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for unaligned loads on SH-4A, using the SH-4A's
neutered movua.l instruction. As movua.l is r0-inspired, stores are
still handled through the packed struct.
Based on asm-generic/unaligned.h by Harvey Harrison.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds a pass-through case when ioremapping P4 addresses.
Addresses passed to ioremap() should be physical addresses, so the
best option is usually to convert the virtual address to a physical
address before calling ioremap. This will give you a virtual address
in P2 which matches the physical address and this works well for
most internal hardware blocks on the SuperH architecture.
However, some hardware blocks must be accessed through P4. Converting
the P4 address to a physical and then back to a P2 does not work. One
example of this is the sh7722 TMU block, it must be accessed through P4.
Without this patch P4 addresses will be mapped using PTEs which
requires the page allocator to be up and running.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add fast mutex path implementation for the SH4A architecture
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
I'm using these constants in support of an in-house development board,
and thought they may be useful to other users of SH7709.
Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
With the PMB enabled, only P1SEG and up are covered by the PMB mappings,
meaning that situations where out-of-bounds physical addresses are read
from will lead to TLB reset after the PMB miss, allowing for use cases
like dd if=/dev/mem to reset the TLB.
Fix this up to make sure the reference is between __MEMORY_START (phys)
and __pa(high_memory). This is coherent across all variants of sh/sh64
with and without MMU, though the PMB bug itself is only applicable to
SH-4A parts.
Reported-by: Hideo Saito <saito@densan.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There was a race in the kmap_coherent() implementation. While we
guarded against preemption, there was nothing preventing eviction of
the pre-faulted fixmap entry from the UTLB. Under certain workloads
this would result in the fixmap entries used for cache colouring being
evicted from the UTLB in the midst of a copy_page().
In addition to pre-faulting, we also make sure to preserve the PTEs
in the kernel page table and introduce a cached PTE for kmap_coherent()
usage. This follows a similar change on MIPS ("[MIPS] Fix aliasing bug
in copy_to_user_page / copy_from_user_page").
Reported-by: Hideo Saito <saito@densan.co.jp>
Reported-by: CHIKAMA Masaki <masaki.chikama@gmail.com>
Tested-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This code has been dead for many years. The last update it received
was in 2003 in order to update it for the driver model changes, though
it had already been in disarray and unused before that point. The only
boards that ever used this chip have not had users in many years either,
so it is finally safe to just kill it off and move on with life.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch implements pinmux tables for the sh7785 processor.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch improves the support for gpio pins that are hard wired
to either input or output and lack control register association.
A special force enum id is used to allow use without control
register but still mark the gpio pin as input or output.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Commit 3f5a54e371 ("ftrace: dump out ftrace
buffers to console on panic") added an ftrace buffer dumper that hooks
in to the die notifier chain and dumps out data in the oops path.
Unfortunately SH supported ftrace but didn't support DIE_OOPS, so add
that in and get it building again.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Improve Migo-R ethernet performance by reducing smc91x overruns.
This is done by enabling SMC91X_NOWAIT and optimizing CS4 setup.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds pinmux and gpio support for the sh7720 processor.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds pinmux and gpio support for the sh7203 processor.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds pinmux and gpio support for the sh7723 processor.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds pinmux and gpio support for the sh7722 processor.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds gpio code together with the pinmux table parser.
In the future we should optimize this and switch back to gpiolib.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The SET_PERSONALITY macro is always called with a second argument of 0.
Remove the ibcs argument and the various tests to set the PER_SVR4
personality.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This tidies up a lot of the PIO/MMIO split. No in-tree platforms were
making use of the MMIO overloading through the machvec (nor have any of
them been in some time), so we just kill all of that off. The ISA I/O
routine wrapping remains unaffected, which remains the only special
casing outside of the iomap API that boards need to think about.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This provides a workaround for users of sh_mobile_lcdcfb that don't
define HAVE_CLK and have otherwise sane clock initialization.
At the same time, move the sh_mobile_lcdc.h header to include/video/.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The INTC code will be re-used across different architectures, so move
this out to drivers/sh/ and include/linux/sh_intc.h respectively.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
These were doing largely bogus things and using the wrong typing for
the address. Bring these in line with the ARM definitions.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There are other places where we want to have access to the trap/exception
number, so move out the lookup_exception_vector() helper. While we're at
it, refactor it slightly to return the vector instead.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the powerpc commit f6a616800e
'[POWERPC] Fix kernel stack allocation alignment'.
SH has traditionally forced the thread order to be relative to the page
size, so there were never any situations where the same bug was
triggered by slub. Regardless, the usage of > 8kB stacks for the larger
page sizes is overkill, so we switch to using slab allocations there,
as per the powerpc change.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
linux/mmzone.h isn't exported, kill it off from asm/setup.h and simply
deal with it in the places that have a dependency instead.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
These have been using overrides for ELF_CORE_COPY_TASK_REGS and
ELF_CORE_COPY_FPREGS while the generic versions can be used instead.
Presently the pt_regs are also duplicated across elf_core_copy_regs()
and elf_core_copy_task_regs(), this switches to simply copying out
through elf_core_copy_regs() instead.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
