sh: Provide optimized unaligned loads on SH-4A.
This adds support for unaligned loads on SH-4A, using the SH-4A's neutered movua.l instruction. As movua.l is r0-inspired, stores are still handled through the packed struct. Based on asm-generic/unaligned.h by Harvey Harrison. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt
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716777db72
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2 changed files with 264 additions and 1 deletions
258
arch/sh/include/asm/unaligned-sh4a.h
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258
arch/sh/include/asm/unaligned-sh4a.h
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#ifndef __ASM_SH_UNALIGNED_SH4A_H
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#define __ASM_SH_UNALIGNED_SH4A_H
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/*
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* SH-4A has support for unaligned 32-bit loads, and 32-bit loads only.
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* Support for 16 and 64-bit accesses are done through shifting and
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* masking relative to the endianness. Unaligned stores are not supported
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* by the instruction encoding, so these continue to use the packed
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* struct.
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*
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* The same note as with the movli.l/movco.l pair applies here, as long
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* as the load is gauranteed to be inlined, nothing else will hook in to
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* r0 and we get the return value for free.
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*
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* NOTE: Due to the fact we require r0 encoding, care should be taken to
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* avoid mixing these heavily with other r0 consumers, such as the atomic
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* ops. Failure to adhere to this can result in the compiler running out
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* of spill registers and blowing up when building at low optimization
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* levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777.
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*/
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#include <linux/types.h>
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#include <asm/byteorder.h>
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static __always_inline u32 __get_unaligned_cpu32(const u8 *p)
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{
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unsigned long unaligned;
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__asm__ __volatile__ (
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"movua.l @%1, %0\n\t"
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: "=z" (unaligned)
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: "r" (p)
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);
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return unaligned;
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}
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struct __una_u16 { u16 x __attribute__((packed)); };
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struct __una_u32 { u32 x __attribute__((packed)); };
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struct __una_u64 { u64 x __attribute__((packed)); };
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static inline u16 __get_unaligned_cpu16(const u8 *p)
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{
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#ifdef __LITTLE_ENDIAN
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return __get_unaligned_cpu32(p) & 0xffff;
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#else
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return __get_unaligned_cpu32(p) >> 16;
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#endif
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}
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/*
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* Even though movua.l supports auto-increment on the read side, it can
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* only store to r0 due to instruction encoding constraints, so just let
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* the compiler sort it out on its own.
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*/
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static inline u64 __get_unaligned_cpu64(const u8 *p)
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{
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#ifdef __LITTLE_ENDIAN
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return (u64)__get_unaligned_cpu32(p + 4) << 32 |
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__get_unaligned_cpu32(p);
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#else
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return (u64)__get_unaligned_cpu32(p) << 32 |
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__get_unaligned_cpu32(p + 4);
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#endif
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}
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static inline u16 get_unaligned_le16(const void *p)
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{
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return le16_to_cpu(__get_unaligned_cpu16(p));
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}
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static inline u32 get_unaligned_le32(const void *p)
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{
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return le32_to_cpu(__get_unaligned_cpu32(p));
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}
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static inline u64 get_unaligned_le64(const void *p)
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{
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return le64_to_cpu(__get_unaligned_cpu64(p));
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}
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static inline u16 get_unaligned_be16(const void *p)
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{
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return be16_to_cpu(__get_unaligned_cpu16(p));
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}
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static inline u32 get_unaligned_be32(const void *p)
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{
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return be32_to_cpu(__get_unaligned_cpu32(p));
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}
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static inline u64 get_unaligned_be64(const void *p)
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{
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return be64_to_cpu(__get_unaligned_cpu64(p));
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}
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static inline void __put_le16_noalign(u8 *p, u16 val)
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{
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*p++ = val;
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*p++ = val >> 8;
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}
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static inline void __put_le32_noalign(u8 *p, u32 val)
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{
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__put_le16_noalign(p, val);
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__put_le16_noalign(p + 2, val >> 16);
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}
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static inline void __put_le64_noalign(u8 *p, u64 val)
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{
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__put_le32_noalign(p, val);
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__put_le32_noalign(p + 4, val >> 32);
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}
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static inline void __put_be16_noalign(u8 *p, u16 val)
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{
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*p++ = val >> 8;
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*p++ = val;
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}
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static inline void __put_be32_noalign(u8 *p, u32 val)
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{
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__put_be16_noalign(p, val >> 16);
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__put_be16_noalign(p + 2, val);
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}
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static inline void __put_be64_noalign(u8 *p, u64 val)
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{
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__put_be32_noalign(p, val >> 32);
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__put_be32_noalign(p + 4, val);
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}
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static inline void put_unaligned_le16(u16 val, void *p)
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{
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#ifdef __LITTLE_ENDIAN
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((struct __una_u16 *)p)->x = val;
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#else
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__put_le16_noalign(p, val);
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#endif
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}
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static inline void put_unaligned_le32(u32 val, void *p)
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{
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#ifdef __LITTLE_ENDIAN
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((struct __una_u32 *)p)->x = val;
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#else
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__put_le32_noalign(p, val);
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#endif
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}
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static inline void put_unaligned_le64(u64 val, void *p)
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{
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#ifdef __LITTLE_ENDIAN
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((struct __una_u64 *)p)->x = val;
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#else
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__put_le64_noalign(p, val);
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#endif
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}
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static inline void put_unaligned_be16(u16 val, void *p)
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{
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#ifdef __BIG_ENDIAN
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((struct __una_u16 *)p)->x = val;
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#else
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__put_be16_noalign(p, val);
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#endif
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}
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static inline void put_unaligned_be32(u32 val, void *p)
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{
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#ifdef __BIG_ENDIAN
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((struct __una_u32 *)p)->x = val;
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#else
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__put_be32_noalign(p, val);
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#endif
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}
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static inline void put_unaligned_be64(u64 val, void *p)
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{
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#ifdef __BIG_ENDIAN
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((struct __una_u64 *)p)->x = val;
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#else
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__put_be64_noalign(p, val);
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#endif
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}
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/*
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* Cause a link-time error if we try an unaligned access other than
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* 1,2,4 or 8 bytes long
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*/
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extern void __bad_unaligned_access_size(void);
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#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \
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__builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
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__builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \
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__builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \
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__builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \
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__bad_unaligned_access_size())))); \
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}))
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#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \
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__builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
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__builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \
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__builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \
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__builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \
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__bad_unaligned_access_size())))); \
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}))
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#define __put_unaligned_le(val, ptr) ({ \
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void *__gu_p = (ptr); \
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switch (sizeof(*(ptr))) { \
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case 1: \
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*(u8 *)__gu_p = (__force u8)(val); \
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break; \
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case 2: \
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put_unaligned_le16((__force u16)(val), __gu_p); \
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break; \
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case 4: \
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put_unaligned_le32((__force u32)(val), __gu_p); \
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break; \
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case 8: \
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put_unaligned_le64((__force u64)(val), __gu_p); \
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break; \
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default: \
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__bad_unaligned_access_size(); \
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break; \
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} \
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(void)0; })
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#define __put_unaligned_be(val, ptr) ({ \
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void *__gu_p = (ptr); \
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switch (sizeof(*(ptr))) { \
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case 1: \
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*(u8 *)__gu_p = (__force u8)(val); \
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break; \
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case 2: \
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put_unaligned_be16((__force u16)(val), __gu_p); \
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break; \
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case 4: \
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put_unaligned_be32((__force u32)(val), __gu_p); \
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break; \
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case 8: \
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put_unaligned_be64((__force u64)(val), __gu_p); \
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break; \
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default: \
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__bad_unaligned_access_size(); \
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break; \
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} \
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(void)0; })
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#ifdef __LITTLE_ENDIAN
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# define get_unaligned __get_unaligned_le
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# define put_unaligned __put_unaligned_le
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#else
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# define get_unaligned __get_unaligned_be
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# define put_unaligned __put_unaligned_be
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#endif
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#endif /* __ASM_SH_UNALIGNED_SH4A_H */
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@ -1,7 +1,11 @@
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#ifndef _ASM_SH_UNALIGNED_H
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#define _ASM_SH_UNALIGNED_H
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/* SH can't handle unaligned accesses. */
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#ifdef CONFIG_CPU_SH4A
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/* SH-4A can handle unaligned loads in a relatively neutered fashion. */
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#include <asm/unaligned-sh4a.h>
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#else
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/* Otherwise, SH can't handle unaligned accesses. */
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#ifdef __LITTLE_ENDIAN__
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# include <linux/unaligned/le_struct.h>
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# include <linux/unaligned/be_byteshift.h>
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@ -15,5 +19,6 @@
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# define get_unaligned __get_unaligned_be
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# define put_unaligned __put_unaligned_be
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#endif
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#endif
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#endif /* _ASM_SH_UNALIGNED_H */
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