mmc: host: Make UHS timing values fully unique
Both of MMC_TIMING_LEGACY and MMC_TIMING_UHS_SDR12 are defined to 0. And ios->timing is set to MMC_TIMING_LEGACY during power up. But set_ios can't distinguish these two timing if host support spec 3.0. Just adjust timing values to be different can resolve this issue without any other impact. Reviewed-by: Girish K S <girish.shivananjappa@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Kevin Liu <kliu5@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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1 changed files with 6 additions and 6 deletions
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@ -53,12 +53,12 @@ struct mmc_ios {
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#define MMC_TIMING_LEGACY 0
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#define MMC_TIMING_LEGACY 0
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#define MMC_TIMING_MMC_HS 1
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#define MMC_TIMING_MMC_HS 1
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#define MMC_TIMING_SD_HS 2
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#define MMC_TIMING_SD_HS 2
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#define MMC_TIMING_UHS_SDR12 MMC_TIMING_LEGACY
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#define MMC_TIMING_UHS_SDR12 3
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#define MMC_TIMING_UHS_SDR25 MMC_TIMING_SD_HS
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#define MMC_TIMING_UHS_SDR25 4
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#define MMC_TIMING_UHS_SDR50 3
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#define MMC_TIMING_UHS_SDR50 5
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#define MMC_TIMING_UHS_SDR104 4
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#define MMC_TIMING_UHS_SDR104 6
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#define MMC_TIMING_UHS_DDR50 5
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#define MMC_TIMING_UHS_DDR50 7
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#define MMC_TIMING_MMC_HS200 6
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#define MMC_TIMING_MMC_HS200 8
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#define MMC_SDR_MODE 0
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#define MMC_SDR_MODE 0
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#define MMC_1_2V_DDR_MODE 1
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#define MMC_1_2V_DDR_MODE 1
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