powerpc/mpic: Remove MPIC_BROKEN_FRR_NIRQS and duplicate irq_count
The mpic->irq_count variable is only used as a software error-checking limit to determine whether or not an IRQ number is valid. In board code which does not manually specify an IRQ count to mpic_alloc(), i.e. 0, it is automatically detected from the number of ISUs and the ISU size. In practice, all hardware ends up with irq_count == num_sources, so all of the runtime checks on mpic->irq_count should just check the value of mpic->num_sources instead. When platform hardware does not correctly report the number of IRQs, which only happens on the MPC85xx/MPC86xx, the MPIC_BROKEN_FRR_NIRQS flag is used to override the detected value of num_sources with the manual irq_count parameter. Since there's no need to manually specify the number of IRQs except in this case, the extra flag can be eliminated and the test changed to "irq_count != 0". Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
parent
9ca163c860
commit
5019609fce
18 changed files with 25 additions and 38 deletions
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@ -273,7 +273,6 @@ struct mpic
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unsigned int isu_size;
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unsigned int isu_size;
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unsigned int isu_shift;
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unsigned int isu_shift;
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unsigned int isu_mask;
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unsigned int isu_mask;
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unsigned int irq_count;
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/* Number of sources */
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/* Number of sources */
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unsigned int num_sources;
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unsigned int num_sources;
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/* default senses array */
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/* default senses array */
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@ -363,8 +362,6 @@ struct mpic
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#define MPIC_ENABLE_MCK 0x00000200
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#define MPIC_ENABLE_MCK 0x00000200
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/* Disable bias among target selection, spread interrupts evenly */
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/* Disable bias among target selection, spread interrupts evenly */
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#define MPIC_NO_BIAS 0x00000400
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#define MPIC_NO_BIAS 0x00000400
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/* Ignore NIRQS as reported by FRR */
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#define MPIC_BROKEN_FRR_NIRQS 0x00000800
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/* Destination only supports a single CPU at a time */
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/* Destination only supports a single CPU at a time */
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#define MPIC_SINGLE_DEST_CPU 0x00001000
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#define MPIC_SINGLE_DEST_CPU 0x00001000
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/* Enable CoreInt delivery of interrupts */
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/* Enable CoreInt delivery of interrupts */
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@ -36,8 +36,7 @@
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void __init corenet_ds_pic_init(void)
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void __init corenet_ds_pic_init(void)
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{
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{
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struct mpic *mpic;
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struct mpic *mpic;
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unsigned int flags = MPIC_BIG_ENDIAN |
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unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU;
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MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
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if (ppc_md.get_irq == mpic_get_coreint_irq)
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if (ppc_md.get_irq == mpic_get_coreint_irq)
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flags |= MPIC_ENABLE_COREINT;
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flags |= MPIC_ENABLE_COREINT;
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@ -38,7 +38,7 @@ void __init mpc8536_ds_pic_init(void)
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{
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{
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struct mpic *mpic = mpic_alloc(NULL, 0,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET |
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MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
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MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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mpic_init(mpic);
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@ -72,13 +72,13 @@ void __init mpc85xx_ds_pic_init(void)
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if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
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if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
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mpic = mpic_alloc(NULL, 0,
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mpic = mpic_alloc(NULL, 0,
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
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MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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} else {
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} else {
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mpic = mpic_alloc(NULL, 0,
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mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET |
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MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
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MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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}
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}
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@ -436,7 +436,7 @@ static void __init mpc85xx_mds_pic_init(void)
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{
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{
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struct mpic *mpic = mpic_alloc(NULL, 0,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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@ -49,13 +49,13 @@ void __init mpc85xx_rdb_pic_init(void)
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if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
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if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
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mpic = mpic_alloc(NULL, 0,
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mpic = mpic_alloc(NULL, 0,
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
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MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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} else {
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} else {
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mpic = mpic_alloc(NULL, 0,
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mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET |
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MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
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MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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}
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}
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@ -34,7 +34,7 @@ void __init p1010_rdb_pic_init(void)
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{
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{
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struct mpic *mpic = mpic_alloc(NULL, 0,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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@ -244,7 +244,7 @@ void __init p1022_ds_pic_init(void)
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{
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{
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struct mpic *mpic = mpic_alloc(NULL, 0,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET |
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MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
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MPIC_BIG_ENDIAN |
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MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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@ -95,7 +95,7 @@ static void __init mpc85xx_rds_pic_init(void)
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{
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{
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struct mpic *mpic = mpic_alloc(NULL, 0,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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@ -45,7 +45,7 @@ void __init xes_mpc85xx_pic_init(void)
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{
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{
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struct mpic *mpic = mpic_alloc(NULL, 0,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET |
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MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
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MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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mpic_init(mpic);
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@ -39,7 +39,7 @@ void __init mpc86xx_init_irq(void)
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struct mpic *mpic = mpic_alloc(NULL, 0,
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
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MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
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MPIC_SINGLE_DEST_CPU,
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0, 256, " MPIC ");
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0, 256, " MPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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@ -157,8 +157,7 @@ static void __init holly_init_IRQ(void)
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mpic = mpic_alloc(NULL, 0,
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mpic = mpic_alloc(NULL, 0,
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MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
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MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
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MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
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24,
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24, 0,
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NR_IRQS-4, /* num_sources used */
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"Tsi108_PIC");
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"Tsi108_PIC");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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@ -83,7 +83,7 @@ static void __init linkstation_init_IRQ(void)
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struct mpic *mpic;
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struct mpic *mpic;
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mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
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mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
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4, 32, " EPIC ");
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4, 0, " EPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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/* PCI IRQs */
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/* PCI IRQs */
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@ -111,8 +111,7 @@ static void __init mpc7448_hpc2_init_IRQ(void)
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mpic = mpic_alloc(NULL, 0,
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mpic = mpic_alloc(NULL, 0,
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MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
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MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
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MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
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24,
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24, 0,
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NR_IRQS-4, /* num_sources used */
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"Tsi108_PIC");
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"Tsi108_PIC");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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@ -85,7 +85,7 @@ static void __init storcenter_init_IRQ(void)
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struct mpic *mpic;
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struct mpic *mpic;
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mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
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mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
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16, 32, " OpenPIC ");
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16, 0, " OpenPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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/*
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/*
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@ -190,9 +190,7 @@ static void __init pseries_mpic_init_IRQ(void)
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BUG_ON(openpic_addr == 0);
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BUG_ON(openpic_addr == 0);
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/* Setup the openpic driver */
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/* Setup the openpic driver */
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mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, 0,
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mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, 0, 16, 0, " MPIC ");
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16, 250, /* isu size, irq count */
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" MPIC ");
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BUG_ON(mpic == NULL);
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BUG_ON(mpic == NULL);
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/* Add ISUs */
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/* Add ISUs */
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@ -873,7 +873,7 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
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DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
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DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
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mpic, d->irq, src, flow_type);
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mpic, d->irq, src, flow_type);
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if (src >= mpic->irq_count)
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if (src >= mpic->num_sources)
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return -EINVAL;
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return -EINVAL;
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if (flow_type == IRQ_TYPE_NONE)
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if (flow_type == IRQ_TYPE_NONE)
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@ -909,7 +909,7 @@ void mpic_set_vector(unsigned int virq, unsigned int vector)
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DBG("mpic: set_vector(mpic:@%p,virq:%d,src:%d,vector:0x%x)\n",
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DBG("mpic: set_vector(mpic:@%p,virq:%d,src:%d,vector:0x%x)\n",
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mpic, virq, src, vector);
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mpic, virq, src, vector);
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if (src >= mpic->irq_count)
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if (src >= mpic->num_sources)
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return;
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return;
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vecpri = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI));
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vecpri = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI));
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@ -926,7 +926,7 @@ void mpic_set_destination(unsigned int virq, unsigned int cpuid)
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DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n",
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DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n",
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mpic, virq, src, cpuid);
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mpic, virq, src, cpuid);
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if (src >= mpic->irq_count)
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if (src >= mpic->num_sources)
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return;
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return;
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mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid);
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mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid);
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@ -1006,7 +1006,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
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return 0;
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return 0;
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}
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}
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if (hw >= mpic->irq_count)
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if (hw >= mpic->num_sources)
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return -EINVAL;
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return -EINVAL;
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mpic_msi_reserve_hwirq(mpic, hw);
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mpic_msi_reserve_hwirq(mpic, hw);
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@ -1221,7 +1221,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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mpic->hc_tm.name = name;
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mpic->hc_tm.name = name;
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mpic->isu_size = isu_size;
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mpic->isu_size = isu_size;
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mpic->irq_count = irq_count;
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mpic->num_sources = 0; /* so far */
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mpic->num_sources = 0; /* so far */
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if (mpic->flags & MPIC_LARGE_VECTORS)
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if (mpic->flags & MPIC_LARGE_VECTORS)
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@ -1314,8 +1313,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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*/
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*/
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greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0));
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greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0));
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if (isu_size == 0) {
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if (isu_size == 0) {
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if (mpic->flags & MPIC_BROKEN_FRR_NIRQS)
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if (irq_count)
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mpic->num_sources = mpic->irq_count;
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mpic->num_sources = irq_count;
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else
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else
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mpic->num_sources =
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mpic->num_sources =
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((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
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((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
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@ -1450,10 +1449,6 @@ void __init mpic_init(struct mpic *mpic)
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(mpic->ipi_vecs[0] + i));
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(mpic->ipi_vecs[0] + i));
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}
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}
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/* Initialize interrupt sources */
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if (mpic->irq_count == 0)
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mpic->irq_count = mpic->num_sources;
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/* Do the HT PIC fixups on U3 broken mpic */
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/* Do the HT PIC fixups on U3 broken mpic */
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DBG("MPIC flags: %x\n", mpic->flags);
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DBG("MPIC flags: %x\n", mpic->flags);
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if ((mpic->flags & MPIC_U3_HT_IRQS) && !(mpic->flags & MPIC_SECONDARY)) {
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if ((mpic->flags & MPIC_U3_HT_IRQS) && !(mpic->flags & MPIC_SECONDARY)) {
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@ -54,7 +54,7 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
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for (i = 100; i < 105; i++)
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for (i = 100; i < 105; i++)
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
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for (i = 124; i < mpic->irq_count; i++)
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for (i = 124; i < mpic->num_sources; i++)
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
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@ -83,7 +83,7 @@ int mpic_msi_init_allocator(struct mpic *mpic)
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{
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{
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int rc;
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int rc;
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||||||
rc = msi_bitmap_alloc(&mpic->msi_bitmap, mpic->irq_count,
|
rc = msi_bitmap_alloc(&mpic->msi_bitmap, mpic->num_sources,
|
||||||
mpic->irqhost->of_node);
|
mpic->irqhost->of_node);
|
||||||
if (rc)
|
if (rc)
|
||||||
return rc;
|
return rc;
|
||||||
|
|
Loading…
Reference in a new issue