fsl/mpic: Create and document the "single-cpu-affinity" device-tree flag
The Freescale MPIC (and perhaps others in the future) is incapable of routing non-IPI interrupts to more than once CPU at a time. Currently all of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to mpic_alloc(), but that information should really be present in the device-tree. Older board code can't rely on the device-tree having the property set, but newer platforms won't need it manually specified in the code. [BenH: Remove unrelated changes, folded in a different patch] Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -64,6 +64,12 @@ PROPERTIES
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device-trees omit this property on MPIC nodes even when the MPIC is
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in fact big-endian, so certain boards override this property.
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- single-cpu-affinity
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Usage: optional
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Value type: <empty>
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If present the MPIC will be assumed to only be able to route
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non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).
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INTERRUPT SPECIFIER DEFINITION
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Interrupt specifiers consists of 4 cells encoded as
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@ -40,6 +40,7 @@ mpic: pic@40000 {
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compatible = "fsl,mpic";
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device_type = "open-pic";
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big-endian;
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single-cpu-affinity;
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};
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timer@41100 {
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@ -1187,6 +1187,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
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flags |= MPIC_BIG_ENDIAN;
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if (of_get_property(node, "pic-no-reset", NULL))
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flags |= MPIC_NO_RESET;
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if (of_get_property(node, "single-cpu-affinity", NULL))
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flags |= MPIC_SINGLE_DEST_CPU;
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if (of_device_is_compatible(node, "fsl,mpic"))
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flags |= MPIC_FSL;
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