2012-01-26 03:59:20 -07:00
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/*
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* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
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* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
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* AT91SAM9X25, AT91SAM9X35 SoC
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9x5 family SoC";
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compatible = "atmel,at91sam9x5";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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2012-09-12 00:42:16 -06:00
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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2012-01-26 03:59:20 -07:00
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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2012-04-02 12:44:20 -06:00
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memory {
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2012-01-26 03:59:20 -07:00
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reg = <0x20000000 0x10000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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2012-06-20 08:13:30 -06:00
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#interrupt-cells = <3>;
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2012-01-26 03:59:20 -07:00
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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2012-04-09 05:36:36 -06:00
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atmel,external-irqs = <31>;
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2012-01-26 03:59:20 -07:00
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};
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2012-03-02 05:54:37 -07:00
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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2012-03-02 05:44:23 -07:00
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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2012-03-02 12:16:27 -07:00
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rstc@fffffe00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffe00 0x10>;
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};
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2012-03-02 06:01:00 -07:00
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shdwc@fffffe10 {
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compatible = "atmel,at91sam9x5-shdwc";
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reg = <0xfffffe10 0x10>;
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};
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2012-01-26 03:59:20 -07:00
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pit: timer@fffffe30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffe30 0xf>;
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2012-06-20 08:13:30 -06:00
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interrupts = <1 4 7>;
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2012-01-26 03:59:20 -07:00
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};
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tcb0: timer@f8008000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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2012-06-20 08:13:30 -06:00
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interrupts = <17 4 0>;
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2012-01-26 03:59:20 -07:00
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};
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tcb1: timer@f800c000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf800c000 0x100>;
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2012-06-20 08:13:30 -06:00
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interrupts = <17 4 0>;
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2012-01-26 03:59:20 -07:00
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};
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dma0: dma-controller@ffffec00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffec00 0x200>;
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2012-06-20 08:13:30 -06:00
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interrupts = <20 4 0>;
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2012-01-26 03:59:20 -07:00
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};
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dma1: dma-controller@ffffee00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffee00 0x200>;
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2012-06-20 08:13:30 -06:00
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interrupts = <21 4 0>;
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2012-01-26 03:59:20 -07:00
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};
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2012-07-04 03:20:46 -06:00
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pinctrl@fffff200 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x800>;
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pioA: gpio@fffff400 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioB: gpio@fffff600 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioC: gpio@fffff800 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioD: gpio@fffffa00 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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2012-01-26 03:59:20 -07:00
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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2012-06-20 08:13:30 -06:00
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interrupts = <1 4 7>;
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2012-01-26 03:59:20 -07:00
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status = "disabled";
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};
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usart0: serial@f801c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf801c000 0x200>;
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2012-06-20 08:13:30 -06:00
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interrupts = <5 4 5>;
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2012-01-26 03:59:20 -07:00
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart1: serial@f8020000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8020000 0x200>;
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2012-06-20 08:13:30 -06:00
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interrupts = <6 4 5>;
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2012-01-26 03:59:20 -07:00
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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usart2: serial@f8024000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8024000 0x200>;
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2012-06-20 08:13:30 -06:00
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interrupts = <7 4 5>;
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2012-01-26 03:59:20 -07:00
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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macb0: ethernet@f802c000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xf802c000 0x100>;
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2012-06-20 08:13:30 -06:00
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interrupts = <24 4 3>;
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2012-01-26 03:59:20 -07:00
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status = "disabled";
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};
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macb1: ethernet@f8030000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xf8030000 0x100>;
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2012-06-20 08:13:30 -06:00
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interrupts = <27 4 3>;
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2012-01-26 03:59:20 -07:00
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status = "disabled";
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};
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2012-05-11 07:35:39 -06:00
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2012-09-12 00:42:16 -06:00
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i2c0: i2c@f8010000 {
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8010000 0x100>;
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interrupts = <9 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@f8014000 {
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8014000 0x100>;
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interrupts = <10 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@f8018000 {
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8018000 0x100>;
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interrupts = <11 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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2012-05-11 07:35:39 -06:00
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adc0: adc@f804c000 {
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compatible = "atmel,at91sam9260-adc";
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reg = <0xf804c000 0x100>;
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2012-06-20 08:13:30 -06:00
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interrupts = <19 4 0>;
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2012-05-11 07:35:39 -06:00
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atmel,adc-use-external;
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atmel,adc-channels-used = <0xffff>;
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atmel,adc-vref = <3300>;
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atmel,adc-num-channels = <12>;
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atmel,adc-startup-time = <40>;
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atmel,adc-channel-base = <0x50>;
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atmel,adc-drdy-mask = <0x1000000>;
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atmel,adc-status-register = <0x30>;
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atmel,adc-trigger-register = <0xc0>;
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trigger@0 {
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trigger-name = "external-rising";
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trigger-value = <0x1>;
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trigger-external;
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};
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trigger@1 {
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trigger-name = "external-falling";
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trigger-value = <0x2>;
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trigger-external;
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};
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trigger@2 {
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trigger-name = "external-any";
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trigger-value = <0x3>;
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trigger-external;
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};
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trigger@3 {
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trigger-name = "continuous";
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trigger-value = <0x6>;
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};
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};
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2012-01-26 03:59:20 -07:00
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};
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2012-02-21 06:38:18 -07:00
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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2012-03-22 07:47:40 -06:00
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gpios = <&pioD 5 0
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&pioD 4 0
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2012-02-21 06:38:18 -07:00
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0
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>;
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status = "disabled";
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};
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2011-11-20 15:55:18 -07:00
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usb0: ohci@00600000 {
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00600000 0x100000>;
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2012-06-20 08:13:30 -06:00
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interrupts = <22 4 2>;
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2011-11-20 15:55:18 -07:00
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status = "disabled";
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};
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2011-11-21 21:11:13 -07:00
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usb1: ehci@00700000 {
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compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
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reg = <0x00700000 0x100000>;
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2012-06-20 08:13:30 -06:00
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interrupts = <22 4 2>;
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2011-11-21 21:11:13 -07:00
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status = "disabled";
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};
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2012-01-26 03:59:20 -07:00
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};
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2012-02-23 07:50:32 -07:00
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i2c@0 {
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compatible = "i2c-gpio";
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gpios = <&pioA 30 0 /* sda */
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&pioA 31 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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i2c-gpio,delay-us = <2>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c@1 {
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compatible = "i2c-gpio";
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gpios = <&pioC 0 0 /* sda */
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&pioC 1 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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i2c-gpio,delay-us = <2>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c@2 {
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compatible = "i2c-gpio";
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gpios = <&pioB 4 0 /* sda */
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&pioB 5 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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i2c-gpio,delay-us = <2>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
|
2012-01-26 03:59:20 -07:00
|
|
|
};
|