2005-04-16 16:20:36 -06:00
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#ifndef __ASM_CPU_SH3_DAC_H
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#define __ASM_CPU_SH3_DAC_H
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/*
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* Copyright (C) 2003 Andriy Skulysh
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*/
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#define DADR0 0xa40000a0
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#define DADR1 0xa40000a2
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#define DACR 0xa40000a4
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#define DACR_DAOE1 0x80
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#define DACR_DAOE0 0x40
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#define DACR_DAE 0x20
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static __inline__ void sh_dac_enable(int channel)
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{
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unsigned char v;
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2010-01-25 20:58:40 -07:00
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v = __raw_readb(DACR);
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2005-04-16 16:20:36 -06:00
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if(channel) v |= DACR_DAOE1;
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else v |= DACR_DAOE0;
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2010-01-25 20:58:40 -07:00
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__raw_writeb(v,DACR);
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2005-04-16 16:20:36 -06:00
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}
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static __inline__ void sh_dac_disable(int channel)
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{
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unsigned char v;
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2010-01-25 20:58:40 -07:00
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v = __raw_readb(DACR);
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2005-04-16 16:20:36 -06:00
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if(channel) v &= ~DACR_DAOE1;
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else v &= ~DACR_DAOE0;
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2010-01-25 20:58:40 -07:00
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__raw_writeb(v,DACR);
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2005-04-16 16:20:36 -06:00
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}
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static __inline__ void sh_dac_output(u8 value, int channel)
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{
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2010-01-25 20:58:40 -07:00
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if(channel) __raw_writeb(value,DADR1);
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else __raw_writeb(value,DADR0);
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2005-04-16 16:20:36 -06:00
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}
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#endif /* __ASM_CPU_SH3_DAC_H */
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