8bf0261770
The Langwell chip is the IO hub for Intel Moorestown platform which has a 64-pin gpio block device inside. It is exposed as a dedicated PCI device. We use it to control outside peripheral as well as to do IRQ demuxing. The gpio block uses MSI to send level type interrupt to IOAPIC. Signed-off-by: Alek Du <alek.du@intel.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
20 lines
708 B
Makefile
20 lines
708 B
Makefile
# gpio support: dedicated expander chips, etc
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ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
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obj-$(CONFIG_GPIOLIB) += gpiolib.o
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obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o
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obj-$(CONFIG_GPIO_MAX7301) += max7301.o
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obj-$(CONFIG_GPIO_MAX732X) += max732x.o
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obj-$(CONFIG_GPIO_MC33880) += mc33880.o
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obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
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obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
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obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
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obj-$(CONFIG_GPIO_PL061) += pl061.o
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obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o
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obj-$(CONFIG_GPIO_UCB1400) += ucb1400_gpio.o
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obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o
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obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
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obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
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obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o
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