43 lines
1 KiB
C
43 lines
1 KiB
C
/*
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* arch/arm/mach-clps7500/include/mach/memory.h
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*
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* Copyright (c) 1996,1997,1998 Russell King.
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*
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* Changelog:
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* 20-Oct-1996 RMK Created
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* 31-Dec-1997 RMK Fixed definitions to reduce warnings
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* 11-Jan-1998 RMK Uninlined to reduce hits on cache
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* 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
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* 21-Mar-1999 RMK Renamed to memory.h
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* RMK Added TASK_SIZE and PAGE_OFFSET
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*/
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#ifndef __ASM_ARCH_MEMORY_H
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#define __ASM_ARCH_MEMORY_H
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/*
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* Physical DRAM offset.
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*/
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#define PHYS_OFFSET UL(0x10000000)
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/*
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* These are exactly the same on the RiscPC as the
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* physical memory view.
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*/
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#define __virt_to_bus(x) __virt_to_phys(x)
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#define __bus_to_virt(x) __phys_to_virt(x)
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/*
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* Cache flushing area - ROM
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*/
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#define FLUSH_BASE_PHYS 0x00000000
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#define FLUSH_BASE 0xdf000000
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/*
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* Sparsemem support. Each section is a maximum of 64MB. The sections
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* are offset by 128MB and can cover 128MB, so that gives us a maximum
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* of 29 physmem bits.
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*/
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#define MAX_PHYSMEM_BITS 29
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#define SECTION_SIZE_BITS 26
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#endif
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