e79c1ba84c
This adds SSB functionality to register a fallback SPROM image from the architecture setup code. Weird architectures exist that have half-assed SSB devices without SPROM attached to their PCI busses. The architecture can register a fallback SPROM image that is used if no SPROM is found on the SSB device. Signed-off-by: Michael Buesch <mb@bu3sch.de> Cc: Florian Fainelli <florian@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
628 lines
18 KiB
C
628 lines
18 KiB
C
#ifndef LINUX_SSB_H_
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#define LINUX_SSB_H_
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#include <linux/device.h>
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#include <linux/list.h>
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include <linux/pci.h>
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#include <linux/mod_devicetable.h>
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#include <linux/dma-mapping.h>
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#include <linux/ssb/ssb_regs.h>
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struct pcmcia_device;
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struct ssb_bus;
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struct ssb_driver;
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struct ssb_sprom {
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u8 revision;
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u8 il0mac[6]; /* MAC address for 802.11b/g */
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u8 et0mac[6]; /* MAC address for Ethernet */
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u8 et1mac[6]; /* MAC address for 802.11a */
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u8 et0phyaddr; /* MII address for enet0 */
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u8 et1phyaddr; /* MII address for enet1 */
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u8 et0mdcport; /* MDIO for enet0 */
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u8 et1mdcport; /* MDIO for enet1 */
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u8 board_rev; /* Board revision number from SPROM. */
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u8 country_code; /* Country Code */
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u8 ant_available_a; /* A-PHY antenna available bits (up to 4) */
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u8 ant_available_bg; /* B/G-PHY antenna available bits (up to 4) */
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u16 pa0b0;
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u16 pa0b1;
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u16 pa0b2;
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u16 pa1b0;
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u16 pa1b1;
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u16 pa1b2;
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u8 gpio0; /* GPIO pin 0 */
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u8 gpio1; /* GPIO pin 1 */
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u8 gpio2; /* GPIO pin 2 */
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u8 gpio3; /* GPIO pin 3 */
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u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */
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u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */
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u8 itssi_a; /* Idle TSSI Target for A-PHY */
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u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
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u16 boardflags_lo; /* Boardflags (low 16 bits) */
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u16 boardflags_hi; /* Boardflags (high 16 bits) */
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/* Antenna gain values for up to 4 antennas
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* on each band. Values in dBm/4 (Q5.2). Negative gain means the
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* loss in the connectors is bigger than the gain. */
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struct {
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struct {
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s8 a0, a1, a2, a3;
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} ghz24; /* 2.4GHz band */
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struct {
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s8 a0, a1, a2, a3;
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} ghz5; /* 5GHz band */
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} antenna_gain;
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/* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
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};
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/* Information about the PCB the circuitry is soldered on. */
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struct ssb_boardinfo {
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u16 vendor;
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u16 type;
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u16 rev;
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};
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struct ssb_device;
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/* Lowlevel read/write operations on the device MMIO.
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* Internal, don't use that outside of ssb. */
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struct ssb_bus_ops {
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u8 (*read8)(struct ssb_device *dev, u16 offset);
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u16 (*read16)(struct ssb_device *dev, u16 offset);
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u32 (*read32)(struct ssb_device *dev, u16 offset);
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void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
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void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
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void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
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#ifdef CONFIG_SSB_BLOCKIO
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void (*block_read)(struct ssb_device *dev, void *buffer,
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size_t count, u16 offset, u8 reg_width);
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void (*block_write)(struct ssb_device *dev, const void *buffer,
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size_t count, u16 offset, u8 reg_width);
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#endif
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};
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/* Core-ID values. */
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#define SSB_DEV_CHIPCOMMON 0x800
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#define SSB_DEV_ILINE20 0x801
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#define SSB_DEV_SDRAM 0x803
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#define SSB_DEV_PCI 0x804
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#define SSB_DEV_MIPS 0x805
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#define SSB_DEV_ETHERNET 0x806
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#define SSB_DEV_V90 0x807
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#define SSB_DEV_USB11_HOSTDEV 0x808
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#define SSB_DEV_ADSL 0x809
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#define SSB_DEV_ILINE100 0x80A
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#define SSB_DEV_IPSEC 0x80B
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#define SSB_DEV_PCMCIA 0x80D
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#define SSB_DEV_INTERNAL_MEM 0x80E
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#define SSB_DEV_MEMC_SDRAM 0x80F
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#define SSB_DEV_EXTIF 0x811
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#define SSB_DEV_80211 0x812
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#define SSB_DEV_MIPS_3302 0x816
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#define SSB_DEV_USB11_HOST 0x817
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#define SSB_DEV_USB11_DEV 0x818
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#define SSB_DEV_USB20_HOST 0x819
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#define SSB_DEV_USB20_DEV 0x81A
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#define SSB_DEV_SDIO_HOST 0x81B
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#define SSB_DEV_ROBOSWITCH 0x81C
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#define SSB_DEV_PARA_ATA 0x81D
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#define SSB_DEV_SATA_XORDMA 0x81E
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#define SSB_DEV_ETHERNET_GBIT 0x81F
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#define SSB_DEV_PCIE 0x820
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#define SSB_DEV_MIMO_PHY 0x821
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#define SSB_DEV_SRAM_CTRLR 0x822
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#define SSB_DEV_MINI_MACPHY 0x823
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#define SSB_DEV_ARM_1176 0x824
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#define SSB_DEV_ARM_7TDMI 0x825
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/* Vendor-ID values */
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#define SSB_VENDOR_BROADCOM 0x4243
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/* Some kernel subsystems poke with dev->drvdata, so we must use the
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* following ugly workaround to get from struct device to struct ssb_device */
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struct __ssb_dev_wrapper {
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struct device dev;
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struct ssb_device *sdev;
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};
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struct ssb_device {
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/* Having a copy of the ops pointer in each dev struct
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* is an optimization. */
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const struct ssb_bus_ops *ops;
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struct device *dev;
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struct ssb_bus *bus;
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struct ssb_device_id id;
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u8 core_index;
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unsigned int irq;
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/* Internal-only stuff follows. */
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void *drvdata; /* Per-device data */
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void *devtypedata; /* Per-devicetype (eg 802.11) data */
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};
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/* Go from struct device to struct ssb_device. */
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static inline
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struct ssb_device * dev_to_ssb_dev(struct device *dev)
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{
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struct __ssb_dev_wrapper *wrap;
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wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
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return wrap->sdev;
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}
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/* Device specific user data */
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static inline
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void ssb_set_drvdata(struct ssb_device *dev, void *data)
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{
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dev->drvdata = data;
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}
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static inline
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void * ssb_get_drvdata(struct ssb_device *dev)
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{
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return dev->drvdata;
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}
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/* Devicetype specific user data. This is per device-type (not per device) */
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void ssb_set_devtypedata(struct ssb_device *dev, void *data);
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static inline
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void * ssb_get_devtypedata(struct ssb_device *dev)
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{
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return dev->devtypedata;
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}
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struct ssb_driver {
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const char *name;
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const struct ssb_device_id *id_table;
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int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
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void (*remove)(struct ssb_device *dev);
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int (*suspend)(struct ssb_device *dev, pm_message_t state);
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int (*resume)(struct ssb_device *dev);
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void (*shutdown)(struct ssb_device *dev);
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struct device_driver drv;
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};
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#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
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extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
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static inline int ssb_driver_register(struct ssb_driver *drv)
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{
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return __ssb_driver_register(drv, THIS_MODULE);
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}
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extern void ssb_driver_unregister(struct ssb_driver *drv);
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enum ssb_bustype {
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SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
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SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
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SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
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};
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/* board_vendor */
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#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
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#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
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#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
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/* board_type */
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#define SSB_BOARD_BCM94306MP 0x0418
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#define SSB_BOARD_BCM4309G 0x0421
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#define SSB_BOARD_BCM4306CB 0x0417
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#define SSB_BOARD_BCM4309MP 0x040C
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#define SSB_BOARD_MP4318 0x044A
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#define SSB_BOARD_BU4306 0x0416
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#define SSB_BOARD_BU4309 0x040A
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/* chip_package */
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#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
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#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
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#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
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#include <linux/ssb/ssb_driver_chipcommon.h>
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#include <linux/ssb/ssb_driver_mips.h>
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#include <linux/ssb/ssb_driver_extif.h>
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#include <linux/ssb/ssb_driver_pci.h>
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struct ssb_bus {
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/* The MMIO area. */
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void __iomem *mmio;
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const struct ssb_bus_ops *ops;
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/* The core in the basic address register window. (PCI bus only) */
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struct ssb_device *mapped_device;
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/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
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u8 mapped_pcmcia_seg;
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/* Lock for core and segment switching.
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* On PCMCIA-host busses this is used to protect the whole MMIO access. */
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spinlock_t bar_lock;
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/* The bus this backplane is running on. */
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enum ssb_bustype bustype;
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/* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
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struct pci_dev *host_pci;
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/* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
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struct pcmcia_device *host_pcmcia;
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#ifdef CONFIG_SSB_SPROM
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/* Mutex to protect the SPROM writing. */
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struct mutex sprom_mutex;
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#endif
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/* ID information about the Chip. */
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u16 chip_id;
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u16 chip_rev;
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u16 sprom_size; /* number of words in sprom */
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u8 chip_package;
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/* List of devices (cores) on the backplane. */
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struct ssb_device devices[SSB_MAX_NR_CORES];
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u8 nr_devices;
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/* Software ID number for this bus. */
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unsigned int busnumber;
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/* The ChipCommon device (if available). */
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struct ssb_chipcommon chipco;
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/* The PCI-core device (if available). */
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struct ssb_pcicore pcicore;
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/* The MIPS-core device (if available). */
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struct ssb_mipscore mipscore;
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/* The EXTif-core device (if available). */
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struct ssb_extif extif;
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/* The following structure elements are not available in early
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* SSB initialization. Though, they are available for regular
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* registered drivers at any stage. So be careful when
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* using them in the ssb core code. */
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/* ID information about the PCB. */
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struct ssb_boardinfo boardinfo;
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/* Contents of the SPROM. */
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struct ssb_sprom sprom;
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/* If the board has a cardbus slot, this is set to true. */
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bool has_cardbus_slot;
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#ifdef CONFIG_SSB_EMBEDDED
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/* Lock for GPIO register access. */
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spinlock_t gpio_lock;
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#endif /* EMBEDDED */
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/* Internal-only stuff follows. Do not touch. */
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struct list_head list;
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#ifdef CONFIG_SSB_DEBUG
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/* Is the bus already powered up? */
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bool powered_up;
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int power_warn_count;
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#endif /* DEBUG */
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};
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/* The initialization-invariants. */
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struct ssb_init_invariants {
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/* Versioning information about the PCB. */
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struct ssb_boardinfo boardinfo;
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/* The SPROM information. That's either stored in an
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* EEPROM or NVRAM on the board. */
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struct ssb_sprom sprom;
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/* If the board has a cardbus slot, this is set to true. */
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bool has_cardbus_slot;
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};
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/* Type of function to fetch the invariants. */
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typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
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struct ssb_init_invariants *iv);
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/* Register a SSB system bus. get_invariants() is called after the
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* basic system devices are initialized.
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* The invariants are usually fetched from some NVRAM.
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* Put the invariants into the struct pointed to by iv. */
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extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
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unsigned long baseaddr,
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ssb_invariants_func_t get_invariants);
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#ifdef CONFIG_SSB_PCIHOST
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extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
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struct pci_dev *host_pci);
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#endif /* CONFIG_SSB_PCIHOST */
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#ifdef CONFIG_SSB_PCMCIAHOST
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extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
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struct pcmcia_device *pcmcia_dev,
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unsigned long baseaddr);
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#endif /* CONFIG_SSB_PCMCIAHOST */
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extern void ssb_bus_unregister(struct ssb_bus *bus);
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/* Set a fallback SPROM.
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* See kdoc at the function definition for complete documentation. */
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extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
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/* Suspend a SSB bus.
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* Call this from the parent bus suspend routine. */
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extern int ssb_bus_suspend(struct ssb_bus *bus);
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/* Resume a SSB bus.
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* Call this from the parent bus resume routine. */
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extern int ssb_bus_resume(struct ssb_bus *bus);
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extern u32 ssb_clockspeed(struct ssb_bus *bus);
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/* Is the device enabled in hardware? */
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int ssb_device_is_enabled(struct ssb_device *dev);
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/* Enable a device and pass device-specific SSB_TMSLOW flags.
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* If no device-specific flags are available, use 0. */
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void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
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/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
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void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
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/* Device MMIO register read/write functions. */
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static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
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{
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return dev->ops->read8(dev, offset);
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}
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static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
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{
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return dev->ops->read16(dev, offset);
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}
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static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
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{
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return dev->ops->read32(dev, offset);
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}
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static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
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{
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dev->ops->write8(dev, offset, value);
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}
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static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
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{
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dev->ops->write16(dev, offset, value);
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}
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static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
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{
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dev->ops->write32(dev, offset, value);
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}
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#ifdef CONFIG_SSB_BLOCKIO
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static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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dev->ops->block_read(dev, buffer, count, offset, reg_width);
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}
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static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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dev->ops->block_write(dev, buffer, count, offset, reg_width);
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}
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#endif /* CONFIG_SSB_BLOCKIO */
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/* The SSB DMA API. Use this API for any DMA operation on the device.
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* This API basically is a wrapper that calls the correct DMA API for
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* the host device type the SSB device is attached to. */
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/* Translation (routing) bits that need to be ORed to DMA
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* addresses before they are given to a device. */
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extern u32 ssb_dma_translation(struct ssb_device *dev);
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#define SSB_DMA_TRANSLATION_MASK 0xC0000000
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#define SSB_DMA_TRANSLATION_SHIFT 30
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extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
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extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp_flags);
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extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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gfp_t gfp_flags);
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static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
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{
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#ifdef CONFIG_SSB_DEBUG
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printk(KERN_ERR "SSB: BUG! Calling DMA API for "
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"unsupported bustype %d\n", dev->bus->bustype);
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#endif /* DEBUG */
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}
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static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
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{
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switch (dev->bus->bustype) {
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case SSB_BUSTYPE_PCI:
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#ifdef CONFIG_SSB_PCIHOST
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return pci_dma_mapping_error(dev->bus->host_pci, addr);
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#endif
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break;
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case SSB_BUSTYPE_SSB:
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return dma_mapping_error(dev->dev, addr);
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default:
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break;
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}
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__ssb_dma_not_implemented(dev);
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return -ENOSYS;
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}
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static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
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size_t size, enum dma_data_direction dir)
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{
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switch (dev->bus->bustype) {
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case SSB_BUSTYPE_PCI:
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|
#ifdef CONFIG_SSB_PCIHOST
|
|
return pci_map_single(dev->bus->host_pci, p, size, dir);
|
|
#endif
|
|
break;
|
|
case SSB_BUSTYPE_SSB:
|
|
return dma_map_single(dev->dev, p, size, dir);
|
|
default:
|
|
break;
|
|
}
|
|
__ssb_dma_not_implemented(dev);
|
|
return 0;
|
|
}
|
|
|
|
static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
switch (dev->bus->bustype) {
|
|
case SSB_BUSTYPE_PCI:
|
|
#ifdef CONFIG_SSB_PCIHOST
|
|
pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
|
|
return;
|
|
#endif
|
|
break;
|
|
case SSB_BUSTYPE_SSB:
|
|
dma_unmap_single(dev->dev, dma_addr, size, dir);
|
|
return;
|
|
default:
|
|
break;
|
|
}
|
|
__ssb_dma_not_implemented(dev);
|
|
}
|
|
|
|
static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
|
|
dma_addr_t dma_addr,
|
|
size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
switch (dev->bus->bustype) {
|
|
case SSB_BUSTYPE_PCI:
|
|
#ifdef CONFIG_SSB_PCIHOST
|
|
pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
|
|
size, dir);
|
|
return;
|
|
#endif
|
|
break;
|
|
case SSB_BUSTYPE_SSB:
|
|
dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
|
|
return;
|
|
default:
|
|
break;
|
|
}
|
|
__ssb_dma_not_implemented(dev);
|
|
}
|
|
|
|
static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
|
|
dma_addr_t dma_addr,
|
|
size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
switch (dev->bus->bustype) {
|
|
case SSB_BUSTYPE_PCI:
|
|
#ifdef CONFIG_SSB_PCIHOST
|
|
pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
|
|
size, dir);
|
|
return;
|
|
#endif
|
|
break;
|
|
case SSB_BUSTYPE_SSB:
|
|
dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
|
|
return;
|
|
default:
|
|
break;
|
|
}
|
|
__ssb_dma_not_implemented(dev);
|
|
}
|
|
|
|
static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
|
|
dma_addr_t dma_addr,
|
|
unsigned long offset,
|
|
size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
switch (dev->bus->bustype) {
|
|
case SSB_BUSTYPE_PCI:
|
|
#ifdef CONFIG_SSB_PCIHOST
|
|
/* Just sync everything. That's all the PCI API can do. */
|
|
pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
|
|
offset + size, dir);
|
|
return;
|
|
#endif
|
|
break;
|
|
case SSB_BUSTYPE_SSB:
|
|
dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
|
|
size, dir);
|
|
return;
|
|
default:
|
|
break;
|
|
}
|
|
__ssb_dma_not_implemented(dev);
|
|
}
|
|
|
|
static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
|
|
dma_addr_t dma_addr,
|
|
unsigned long offset,
|
|
size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
switch (dev->bus->bustype) {
|
|
case SSB_BUSTYPE_PCI:
|
|
#ifdef CONFIG_SSB_PCIHOST
|
|
/* Just sync everything. That's all the PCI API can do. */
|
|
pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
|
|
offset + size, dir);
|
|
return;
|
|
#endif
|
|
break;
|
|
case SSB_BUSTYPE_SSB:
|
|
dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
|
|
size, dir);
|
|
return;
|
|
default:
|
|
break;
|
|
}
|
|
__ssb_dma_not_implemented(dev);
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_SSB_PCIHOST
|
|
/* PCI-host wrapper driver */
|
|
extern int ssb_pcihost_register(struct pci_driver *driver);
|
|
static inline void ssb_pcihost_unregister(struct pci_driver *driver)
|
|
{
|
|
pci_unregister_driver(driver);
|
|
}
|
|
|
|
static inline
|
|
void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
|
|
{
|
|
if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
|
|
pci_set_power_state(sdev->bus->host_pci, state);
|
|
}
|
|
#else
|
|
static inline void ssb_pcihost_unregister(struct pci_driver *driver)
|
|
{
|
|
}
|
|
|
|
static inline
|
|
void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
|
|
{
|
|
}
|
|
#endif /* CONFIG_SSB_PCIHOST */
|
|
|
|
|
|
/* If a driver is shutdown or suspended, call this to signal
|
|
* that the bus may be completely powered down. SSB will decide,
|
|
* if it's really time to power down the bus, based on if there
|
|
* are other devices that want to run. */
|
|
extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
|
|
/* Before initializing and enabling a device, call this to power-up the bus.
|
|
* If you want to allow use of dynamic-power-control, pass the flag.
|
|
* Otherwise static always-on powercontrol will be used. */
|
|
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
|
|
|
|
|
|
/* Various helper functions */
|
|
extern u32 ssb_admatch_base(u32 adm);
|
|
extern u32 ssb_admatch_size(u32 adm);
|
|
|
|
/* PCI device mapping and fixup routines.
|
|
* Called from the architecture pcibios init code.
|
|
* These are only available on SSB_EMBEDDED configurations. */
|
|
#ifdef CONFIG_SSB_EMBEDDED
|
|
int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
|
|
int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
|
|
#endif /* CONFIG_SSB_EMBEDDED */
|
|
|
|
#endif /* LINUX_SSB_H_ */
|