9652e8bd16
This patch adds a generic target for SPEAr600 board that can be configured via the device-tree. Currently the following devices are supported via the devicetree: - VIC interrupts - PL011 UART - PL061 GPIO - Synopsys DW I2C - Synopsys DW ethernet Other peripheral devices (e.g. SMI flash, FSMC NAND flash etc) will follow in later patches. Only the spear600-evb is currently supported. Other SPEAr600 based boards will follow later. Since the current mainline SPEAr600 code only supports the SPEAr600 evaluation board, with nearly zero peripheral devices (only UART and GPIO), it makes sense to switch over to DT based configuration completely now. So this patch also removes all non-DT stuff, mainly platform device data. The files spear600.c and spear600_evb.c are removed completely. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
174 lines
3.8 KiB
Text
174 lines
3.8 KiB
Text
/*
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* Copyright 2012 Stefan Roese <sr@denx.de>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "st,spear600";
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0x40000000>;
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};
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ahb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0xd0000000 0xd0000000 0x30000000>;
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vic0: interrupt-controller@f1100000 {
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compatible = "arm,pl190-vic";
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interrupt-controller;
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reg = <0xf1100000 0x1000>;
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#interrupt-cells = <1>;
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};
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vic1: interrupt-controller@f1000000 {
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compatible = "arm,pl190-vic";
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interrupt-controller;
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reg = <0xf1000000 0x1000>;
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#interrupt-cells = <1>;
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};
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gmac: ethernet@e0800000 {
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compatible = "st,spear600-gmac";
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reg = <0xe0800000 0x8000>;
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interrupt-parent = <&vic1>;
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interrupts = <24 23>;
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interrupt-names = "macirq", "eth_wake_irq";
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status = "disabled";
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};
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fsmc: flash@d1800000 {
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compatible = "st,spear600-fsmc-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xd1800000 0x1000 /* FSMC Register */
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0xd2000000 0x4000>; /* NAND Base */
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reg-names = "fsmc_regs", "nand_data";
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st,ale-off = <0x20000>;
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st,cle-off = <0x10000>;
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status = "disabled";
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};
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smi: flash@fc000000 {
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compatible = "st,spear600-smi";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xfc000000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <12>;
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status = "disabled";
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};
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ehci@e1800000 {
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compatible = "st,spear600-ehci", "usb-ehci";
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reg = <0xe1800000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <27>;
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status = "disabled";
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};
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ehci@e2000000 {
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compatible = "st,spear600-ehci", "usb-ehci";
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reg = <0xe2000000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <29>;
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status = "disabled";
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};
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ohci@e1900000 {
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compatible = "st,spear600-ohci", "usb-ohci";
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reg = <0xe1900000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <26>;
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status = "disabled";
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};
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ohci@e2100000 {
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compatible = "st,spear600-ohci", "usb-ohci";
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reg = <0xe2100000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <28>;
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status = "disabled";
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};
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apb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0xd0000000 0xd0000000 0x30000000>;
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serial@d0000000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xd0000000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <24>;
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status = "disabled";
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};
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serial@d0080000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xd0080000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <25>;
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status = "disabled";
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};
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/* local/cpu GPIO */
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gpio0: gpio@f0100000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xf0100000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <18>;
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};
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/* basic GPIO */
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gpio1: gpio@fc980000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfc980000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <19>;
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};
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/* appl GPIO */
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gpio2: gpio@d8100000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xd8100000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <4>;
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};
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i2c@d0200000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0xd0200000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <28>;
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status = "disabled";
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};
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};
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};
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};
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