8b283c0254
Exynos has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the fact that the PMU block is actually the first interrupt controller in the chain for RTC, kernels with this patch applied wont have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs may not even boot. Also, I strongly suspect that there is more than two wake-up interrupts on these platforms, but I leave it to the maintainers to fix their mess. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088693-15724-2-git-send-email-marc.zyngier@arm.com [ jac: squash in maz's fixup from https://lkml.kernel.org/r/5506989D.9050703@arm.com ] Signed-off-by: Jason Cooper <jason@lakedaemon.net>
281 lines
6.7 KiB
C
281 lines
6.7 KiB
C
/*
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* SAMSUNG EXYNOS Flattened Device Tree enabled machine
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*
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* Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/serial_s3c.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/irqchip.h>
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#include <asm/cacheflush.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/memory.h>
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#include <mach/map.h>
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#include "common.h"
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#include "mfc.h"
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#include "regs-pmu.h"
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void __iomem *pmu_base_addr;
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static struct map_desc exynos4_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SROMC,
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.pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_CMU,
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.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
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.length = SZ_128K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_COREPERI_BASE,
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.pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
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.length = SZ_8K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_DMC0,
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.pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_DMC1,
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.pfn = __phys_to_pfn(EXYNOS4_PA_DMC1),
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.length = SZ_64K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos5_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SROMC,
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.pfn = __phys_to_pfn(EXYNOS5_PA_SROMC),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_CMU,
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.pfn = __phys_to_pfn(EXYNOS5_PA_CMU),
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.length = 144 * SZ_1K,
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.type = MT_DEVICE,
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},
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};
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static struct platform_device exynos_cpuidle = {
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.name = "exynos_cpuidle",
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#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
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.dev.platform_data = exynos_enter_aftr,
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#endif
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.id = -1,
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};
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void __iomem *sysram_base_addr;
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void __iomem *sysram_ns_base_addr;
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void __init exynos_sysram_init(void)
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{
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struct device_node *node;
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for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
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if (!of_device_is_available(node))
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continue;
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sysram_base_addr = of_iomap(node, 0);
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break;
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}
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for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
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if (!of_device_is_available(node))
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continue;
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sysram_ns_base_addr = of_iomap(node, 0);
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break;
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}
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}
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static void __init exynos_init_late(void)
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{
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if (of_machine_is_compatible("samsung,exynos5440"))
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/* to be supported later */
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return;
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exynos_pm_init();
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}
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static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
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int depth, void *data)
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{
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struct map_desc iodesc;
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const __be32 *reg;
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int len;
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if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
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!of_flat_dt_is_compatible(node, "samsung,exynos5440-clock"))
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return 0;
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reg = of_get_flat_dt_prop(node, "reg", &len);
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if (reg == NULL || len != (sizeof(unsigned long) * 2))
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return 0;
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iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
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iodesc.length = be32_to_cpu(reg[1]) - 1;
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iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
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iodesc.type = MT_DEVICE;
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iotable_init(&iodesc, 1);
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return 1;
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}
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/*
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* exynos_map_io
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*
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* register the standard cpu IO areas
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*/
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static void __init exynos_map_io(void)
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{
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if (soc_is_exynos4())
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iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
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if (soc_is_exynos5())
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iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
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}
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static void __init exynos_init_io(void)
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{
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debug_ll_io_init();
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of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
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/* detect cpu id and rev. */
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s5p_init_cpu(S5P_VA_CHIPID);
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exynos_map_io();
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}
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/*
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* Apparently, these SoCs are not able to wake-up from suspend using
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* the PMU. Too bad. Should they suddenly become capable of such a
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* feat, the matches below should be moved to suspend.c.
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*/
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static const struct of_device_id exynos_dt_pmu_match[] = {
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{ .compatible = "samsung,exynos5260-pmu" },
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{ .compatible = "samsung,exynos5410-pmu" },
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{ /*sentinel*/ },
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};
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static void exynos_map_pmu(void)
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{
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struct device_node *np;
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np = of_find_matching_node(NULL, exynos_dt_pmu_match);
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if (np)
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pmu_base_addr = of_iomap(np, 0);
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}
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static void __init exynos_init_irq(void)
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{
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irqchip_init();
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/*
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* Since platsmp.c needs pmu base address by the time
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* DT is not unflatten so we can't use DT APIs before
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* init_irq
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*/
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exynos_map_pmu();
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}
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static void __init exynos_dt_machine_init(void)
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{
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/*
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* This is called from smp_prepare_cpus if we've built for SMP, but
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* we still need to set it up for PM and firmware ops if not.
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*/
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if (!IS_ENABLED(CONFIG_SMP))
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exynos_sysram_init();
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#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
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if (of_machine_is_compatible("samsung,exynos4210"))
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exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
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#endif
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if (of_machine_is_compatible("samsung,exynos4210") ||
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of_machine_is_compatible("samsung,exynos4212") ||
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(of_machine_is_compatible("samsung,exynos4412") &&
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of_machine_is_compatible("samsung,trats2")) ||
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of_machine_is_compatible("samsung,exynos5250"))
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platform_device_register(&exynos_cpuidle);
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platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static char const *const exynos_dt_compat[] __initconst = {
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"samsung,exynos3",
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"samsung,exynos3250",
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"samsung,exynos4",
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"samsung,exynos4210",
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"samsung,exynos4212",
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"samsung,exynos4412",
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"samsung,exynos4415",
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"samsung,exynos5",
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"samsung,exynos5250",
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"samsung,exynos5260",
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"samsung,exynos5420",
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"samsung,exynos5440",
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NULL
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};
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static void __init exynos_reserve(void)
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{
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#ifdef CONFIG_S5P_DEV_MFC
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int i;
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char *mfc_mem[] = {
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"samsung,mfc-v5",
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"samsung,mfc-v6",
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"samsung,mfc-v7",
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"samsung,mfc-v8",
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};
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for (i = 0; i < ARRAY_SIZE(mfc_mem); i++)
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if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i]))
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break;
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#endif
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}
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static void __init exynos_dt_fixup(void)
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{
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/*
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* Some versions of uboot pass garbage entries in the memory node,
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* use the old CONFIG_ARM_NR_BANKS
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*/
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of_fdt_limit_memory(8);
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}
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DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
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/* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
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/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
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.l2c_aux_val = 0x3c400001,
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.l2c_aux_mask = 0xc20fffff,
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.smp = smp_ops(exynos_smp_ops),
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.map_io = exynos_init_io,
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.init_early = exynos_firmware_init,
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.init_irq = exynos_init_irq,
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.init_machine = exynos_dt_machine_init,
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.init_late = exynos_init_late,
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.dt_compat = exynos_dt_compat,
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.reserve = exynos_reserve,
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.dt_fixup = exynos_dt_fixup,
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MACHINE_END
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