3042102a28
- core header files for arch-msm - Kconfig and Makefiles to enable ARCH_MSM7X00A builds - MSM7X00A specific arch_idle - peripheral iomap and irq number definitions Signed-off-by: Brian Swetland <swetland@google.com>
36 lines
1.3 KiB
ArmAsm
36 lines
1.3 KiB
ArmAsm
/* linux/include/asm-arm/arch-msm/idle.S
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*
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* Idle processing for MSM7K - work around bugs with SWFI.
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*
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* Copyright (c) 2007 QUALCOMM Incorporated.
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* Copyright (C) 2007 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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ENTRY(arch_idle)
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#ifdef CONFIG_MSM7X00A_IDLE
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mrc p15, 0, r1, c1, c0, 0 /* read current CR */
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bic r0, r1, #(1 << 2) /* clear dcache bit */
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bic r0, r0, #(1 << 12) /* clear icache bit */
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mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */
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mov r0, #0 /* prepare wfi value */
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mcr p15, 0, r0, c7, c10, 0 /* flush the cache */
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mcr p15, 0, r0, c7, c10, 4 /* memory barrier */
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mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
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mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */
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#endif
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mov pc, lr
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