kernel-fxtec-pro1x/include/soc/tegra
Aapo Vienamo a124e7f2fe soc/tegra: pmc: Fix pad voltage configuration for Tegra186
[ Upstream commit 13136a47a061c01c91df78b37f7708dd5ce7035f ]

Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-11-20 18:45:24 +01:00
..
ahb.h
bpmp-abi.h
bpmp.h
common.h
cpuidle.h
emc.h
flowctrl.h
fuse.h
ivc.h
mc.h
pm.h
pmc.h