c471307437
Patch from Lennert Buytenhek This patch adds support for the Intel ixp23xx series of CPUs. The ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit MACs, two 10/100 MACs, expansion bus, four microengines, a Media and Switch Fabric unit almost identical to the one on the ixp2400, two xscale (8250ish) UARTs and a bunch of other stuff. This patch adds the core ixp23xx support code, and support for the ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double Espresso platforms. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
31 lines
694 B
ArmAsm
31 lines
694 B
ArmAsm
/*
|
|
* include/asm-arm/arch-ixp23xx/entry-macro.S
|
|
*/
|
|
|
|
.macro disable_fiq
|
|
.endm
|
|
|
|
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
|
|
ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
|
|
ldr \irqnr, [\irqnr] @ get interrupt number
|
|
cmp \irqnr, #0x0 @ suprious interrupt ?
|
|
movne \irqnr, \irqnr, lsr #2 @ skip unwanted low order bits
|
|
subne \irqnr, \irqnr, #1 @ convert to 0 based
|
|
|
|
#if 0
|
|
cmp \irqnr, #IRQ_IXP23XX_PCI_INT_RPH
|
|
bne 1001f
|
|
mov \irqnr, #IRQ_IXP23XX_INTA
|
|
|
|
ldr \irqnr, =0xf5000030
|
|
|
|
mov \tmp, #(1<<26)
|
|
tst \irqnr, \tmp
|
|
movne \irqnr, #IRQ_IXP23XX_INTB
|
|
|
|
mov \tmp, #(1<<27)
|
|
tst \irqnr, \tmp
|
|
movne \irqnr, #IRQ_IXP23XX_INTA
|
|
1001:
|
|
#endif
|
|
.endm
|