753bd6ddf4
As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and dw-mshc-ddr-timing properties are having only two cells, these properties are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This patch corrects above timing propreties for above platfroms Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Doug Anderson <dianders@chromium.org> Acked-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
184 lines
3.4 KiB
Text
184 lines
3.4 KiB
Text
/*
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* Common device tree include for all Exynos 5250 boards based off of Daisy.
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*
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* Copyright (c) 2012 Google, Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/ {
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aliases {
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};
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memory {
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reg = <0x40000000 0x80000000>;
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};
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chosen {
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};
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i2c@12C60000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <378000>;
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gpios = <&gpb3 0 2 3 0>,
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<&gpb3 1 2 3 0>;
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};
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i2c@12C70000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <378000>;
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gpios = <&gpb3 2 2 3 0>,
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<&gpb3 3 2 3 0>;
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};
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i2c@12C80000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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/*
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* Disabled pullups since external part has its own pullups and
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* double-pulling gets us out of spec in some cases.
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*/
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gpios = <&gpa0 6 3 0 0>,
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<&gpa0 7 3 0 0>;
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hdmiddc@50 {
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compatible = "samsung,exynos5-hdmiddc";
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reg = <0x50>;
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};
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};
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i2c@12C90000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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gpios = <&gpa1 2 3 3 0>,
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<&gpa1 3 3 3 0>;
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};
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i2c@12CA0000 {
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status = "disabled";
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};
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i2c@12CB0000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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gpios = <&gpa2 2 3 3 0>,
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<&gpa2 3 3 3 0>;
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};
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i2c@12CC0000 {
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status = "disabled";
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};
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i2c@12CD0000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <66000>;
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gpios = <&gpb2 2 3 3 0>,
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<&gpb2 3 3 3 0>;
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};
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i2c@12CE0000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-max-bus-freq = <378000>;
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hdmiphy@38 {
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compatible = "samsung,exynos5-hdmiphy";
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reg = <0x38>;
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};
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};
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dwmmc0@12200000 {
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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slot@0 {
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reg = <0>;
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bus-width = <8>;
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gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
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<&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
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<&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
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<&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
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<&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
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};
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};
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dwmmc1@12210000 {
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status = "disabled";
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};
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dwmmc2@12220000 {
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num-slots = <1>;
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supports-highspeed;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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slot@0 {
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reg = <0>;
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bus-width = <4>;
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samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
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wp-gpios = <&gpc2 1 0 0 3>;
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gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
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<&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
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<&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>;
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};
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};
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dwmmc3@12230000 {
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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slot@0 {
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reg = <0>;
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bus-width = <4>;
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/* See board-specific dts files for GPIOs */
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};
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};
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spi_0: spi@12d20000 {
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status = "disabled";
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};
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spi_1: spi@12d30000 {
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gpios = <&gpa2 4 2 3 0>,
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<&gpa2 6 2 3 0>,
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<&gpa2 7 2 3 0>;
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samsung,spi-src-clk = <0>;
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num-cs = <1>;
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};
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spi_2: spi@12d40000 {
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status = "disabled";
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};
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hdmi {
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hpd-gpio = <&gpx3 7 0xf 1 3>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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power {
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label = "Power";
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gpios = <&gpx1 3 0 0x10000 0>;
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linux,code = <116>; /* KEY_POWER */
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gpio-key,wakeup;
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};
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};
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};
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