f5deb79679
Impact: reduce kernel BSS size by 7 pages, improve code readability Two page tables are used in current x86_64 kexec implementation. One is used to jump from kernel virtual address to identity map address, the other is used to map all physical memory. In fact, on x86_64, there is no conflict between kernel virtual address space and physical memory space, so just one page table is sufficient. The page table pages used to map control page are dynamically allocated to save memory if kexec image is not loaded. ASM code used to map control page is replaced by C code too. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
147 lines
3.1 KiB
ArmAsm
147 lines
3.1 KiB
ArmAsm
/*
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* relocate_kernel.S - put the kernel image in place to boot
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* Copyright (C) 2002-2005 Eric Biederman <ebiederm@xmission.com>
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*
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* This source code is licensed under the GNU General Public License,
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* Version 2. See the file COPYING for more details.
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*/
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#include <linux/linkage.h>
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#include <asm/page.h>
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#include <asm/kexec.h>
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#include <asm/processor-flags.h>
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#include <asm/pgtable.h>
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/*
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* Must be relocatable PIC code callable as a C function
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*/
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#define PTR(x) (x << 3)
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#define PAGE_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
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.text
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.align PAGE_SIZE
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.code64
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.globl relocate_kernel
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relocate_kernel:
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/* %rdi indirection_page
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* %rsi page_list
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* %rdx start address
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*/
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/* zero out flags, and disable interrupts */
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pushq $0
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popfq
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/* get physical address of control page now */
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/* this is impossible after page table switch */
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movq PTR(PA_CONTROL_PAGE)(%rsi), %r8
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/* get physical address of page table now too */
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movq PTR(PA_TABLE_PAGE)(%rsi), %rcx
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/* Switch to the identity mapped page tables */
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movq %rcx, %cr3
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/* setup a new stack at the end of the physical control page */
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lea PAGE_SIZE(%r8), %rsp
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/* jump to identity mapped page */
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addq $(identity_mapped - relocate_kernel), %r8
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pushq %r8
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ret
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identity_mapped:
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/* store the start address on the stack */
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pushq %rdx
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/* Set cr0 to a known state:
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* - Paging enabled
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* - Alignment check disabled
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* - Write protect disabled
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* - No task switch
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* - Don't do FP software emulation.
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* - Proctected mode enabled
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*/
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movq %cr0, %rax
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andq $~(X86_CR0_AM | X86_CR0_WP | X86_CR0_TS | X86_CR0_EM), %rax
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orl $(X86_CR0_PG | X86_CR0_PE), %eax
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movq %rax, %cr0
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/* Set cr4 to a known state:
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* - physical address extension enabled
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*/
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movq $X86_CR4_PAE, %rax
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movq %rax, %cr4
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jmp 1f
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1:
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/* Flush the TLB (needed?) */
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movq %rcx, %cr3
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/* Do the copies */
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movq %rdi, %rcx /* Put the page_list in %rcx */
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xorq %rdi, %rdi
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xorq %rsi, %rsi
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jmp 1f
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0: /* top, read another word for the indirection page */
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movq (%rbx), %rcx
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addq $8, %rbx
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1:
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testq $0x1, %rcx /* is it a destination page? */
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jz 2f
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movq %rcx, %rdi
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andq $0xfffffffffffff000, %rdi
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jmp 0b
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2:
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testq $0x2, %rcx /* is it an indirection page? */
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jz 2f
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movq %rcx, %rbx
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andq $0xfffffffffffff000, %rbx
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jmp 0b
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2:
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testq $0x4, %rcx /* is it the done indicator? */
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jz 2f
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jmp 3f
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2:
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testq $0x8, %rcx /* is it the source indicator? */
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jz 0b /* Ignore it otherwise */
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movq %rcx, %rsi /* For ever source page do a copy */
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andq $0xfffffffffffff000, %rsi
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movq $512, %rcx
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rep ; movsq
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jmp 0b
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3:
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/* To be certain of avoiding problems with self-modifying code
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* I need to execute a serializing instruction here.
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* So I flush the TLB by reloading %cr3 here, it's handy,
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* and not processor dependent.
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*/
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movq %cr3, %rax
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movq %rax, %cr3
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/* set all of the registers to known values */
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/* leave %rsp alone */
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xorq %rax, %rax
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xorq %rbx, %rbx
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xorq %rcx, %rcx
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xorq %rdx, %rdx
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xorq %rsi, %rsi
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xorq %rdi, %rdi
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xorq %rbp, %rbp
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xorq %r8, %r8
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xorq %r9, %r9
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xorq %r10, %r9
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xorq %r11, %r11
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xorq %r12, %r12
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xorq %r13, %r13
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xorq %r14, %r14
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xorq %r15, %r15
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ret
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