dc40127ca5
There were a few issues with the HCALL_STATS code: - PURR cpu feature checks were backwards - We iterated one entry off the end of the hcall_stats array - Remove dead update_hcall_stats() function prototype I noticed one thing while debugging, and that is we call H_ENTER (to set up the MMU hashtable in early init) before we have done the cpu fixups. This means we will execute the PURR SPR reads even on a CPU that isnt capable of it. I wonder if we can move the CPU feature fixups earlier. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
165 lines
3.6 KiB
ArmAsm
165 lines
3.6 KiB
ArmAsm
/*
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* This file contains the generic code to perform a call to the
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* pSeries LPAR hypervisor.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/hvcall.h>
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#include <asm/processor.h>
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#define STK_PARM(i) (48 + ((i)-3)*8)
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#ifdef CONFIG_HCALL_STATS
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/*
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* precall must preserve all registers. use unused STK_PARM()
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* areas to save snapshots and opcode.
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*/
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#define HCALL_INST_PRECALL \
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std r3,STK_PARM(r3)(r1); /* save opcode */ \
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mftb r0; /* get timebase and */ \
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std r0,STK_PARM(r5)(r1); /* save for later */ \
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BEGIN_FTR_SECTION; \
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mfspr r0,SPRN_PURR; /* get PURR and */ \
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std r0,STK_PARM(r6)(r1); /* save for later */ \
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END_FTR_SECTION_IFSET(CPU_FTR_PURR);
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/*
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* postcall is performed immediately before function return which
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* allows liberal use of volatile registers.
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*/
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#define HCALL_INST_POSTCALL \
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ld r4,STK_PARM(r3)(r1); /* validate opcode */ \
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cmpldi cr7,r4,MAX_HCALL_OPCODE; \
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bgt- cr7,1f; \
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\
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/* get time and PURR snapshots after hcall */ \
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mftb r7; /* timebase after */ \
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BEGIN_FTR_SECTION; \
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mfspr r8,SPRN_PURR; /* PURR after */ \
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ld r6,STK_PARM(r6)(r1); /* PURR before */ \
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subf r6,r6,r8; /* delta */ \
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END_FTR_SECTION_IFSET(CPU_FTR_PURR); \
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ld r5,STK_PARM(r5)(r1); /* timebase before */ \
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subf r5,r5,r7; /* time delta */ \
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\
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/* calculate address of stat structure r4 = opcode */ \
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srdi r4,r4,2; /* index into array */ \
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mulli r4,r4,HCALL_STAT_SIZE; \
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LOAD_REG_ADDR(r7, per_cpu__hcall_stats); \
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add r4,r4,r7; \
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ld r7,PACA_DATA_OFFSET(r13); /* per cpu offset */ \
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add r4,r4,r7; \
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\
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/* update stats */ \
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ld r7,HCALL_STAT_CALLS(r4); /* count */ \
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addi r7,r7,1; \
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std r7,HCALL_STAT_CALLS(r4); \
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ld r7,HCALL_STAT_TB(r4); /* timebase */ \
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add r7,r7,r5; \
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std r7,HCALL_STAT_TB(r4); \
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BEGIN_FTR_SECTION; \
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ld r7,HCALL_STAT_PURR(r4); /* PURR */ \
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add r7,r7,r6; \
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std r7,HCALL_STAT_PURR(r4); \
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END_FTR_SECTION_IFSET(CPU_FTR_PURR); \
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1:
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#else
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#define HCALL_INST_PRECALL
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#define HCALL_INST_POSTCALL
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#endif
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.text
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_GLOBAL(plpar_hcall_norets)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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_GLOBAL(plpar_hcall)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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std r4,STK_PARM(r4)(r1) /* Save ret buffer */
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mr r4,r5
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mr r5,r6
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mr r6,r7
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mr r7,r8
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mr r8,r9
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mr r9,r10
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HVSC /* invoke the hypervisor */
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ld r12,STK_PARM(r4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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std r7, 24(r12)
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HCALL_INST_POSTCALL
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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_GLOBAL(plpar_hcall9)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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std r4,STK_PARM(r4)(r1) /* Save ret buffer */
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mr r4,r5
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mr r5,r6
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mr r6,r7
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mr r7,r8
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mr r8,r9
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mr r9,r10
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ld r10,STK_PARM(r11)(r1) /* put arg7 in R10 */
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ld r11,STK_PARM(r12)(r1) /* put arg8 in R11 */
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ld r12,STK_PARM(r13)(r1) /* put arg9 in R12 */
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HVSC /* invoke the hypervisor */
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mr r0,r12
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ld r12,STK_PARM(r4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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std r7, 24(r12)
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std r8, 32(r12)
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std r9, 40(r12)
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std r10,48(r12)
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std r11,56(r12)
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std r0, 64(r12)
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HCALL_INST_POSTCALL
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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