fa766c9be5
It uses STAPL files and programs Altera FPGA through JTAG. Interface to JTAG must be provided from main device module, for example through cx23885 GPIO. Signed-off-by: Igor M. Liplianin <liplianin@netup.ru> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com> |
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| .. | ||
| altera-comp.c | ||
| altera-exprt.h | ||
| altera-jtag.c | ||
| altera-jtag.h | ||
| altera-lpt.c | ||
| altera.c | ||
| Kconfig | ||
| Makefile | ||