95dac04f88
A recently added feature to the firmware enables the driver to retrieve firmware logs via the host bus (SDIO or SPI). There are two modes of operation: 1. On-demand: The FW collects its log in an internal ring buffer. This buffer can later be read, for example, upon recovery. 2. Continuous: The FW pushes the FW logs as special packets in the RX path. Reading the internal ring buffer does not involve the FW. Thus, as long as the HW is not in ELP, it should be possible to read the logs, even if the FW crashes. A sysfs binary file named "fwlog" was added to support this feature, letting a monitor process read the FW messages. The log is transferred from the FW only when available, so the reading process might block. Signed-off-by: Ido Yariv <ido@wizery.com> Signed-off-by: Luciano Coelho <coelho@ti.com>
273 lines
7.5 KiB
C
273 lines
7.5 KiB
C
/*
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* This file is part of wl1271
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*
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* Copyright (C) 2009 Nokia Corporation
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*
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* Contact: Luciano Coelho <luciano.coelho@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/gfp.h>
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#include <linux/sched.h>
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#include "wl12xx.h"
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#include "acx.h"
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#include "reg.h"
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#include "rx.h"
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#include "io.h"
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static u8 wl1271_rx_get_mem_block(struct wl1271_fw_common_status *status,
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u32 drv_rx_counter)
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{
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return le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
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RX_MEM_BLOCK_MASK;
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}
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static u32 wl1271_rx_get_buf_size(struct wl1271_fw_common_status *status,
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u32 drv_rx_counter)
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{
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return (le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
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RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
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}
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static void wl1271_rx_status(struct wl1271 *wl,
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struct wl1271_rx_descriptor *desc,
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struct ieee80211_rx_status *status,
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u8 beacon)
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{
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memset(status, 0, sizeof(struct ieee80211_rx_status));
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if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
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status->band = IEEE80211_BAND_2GHZ;
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else
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status->band = IEEE80211_BAND_5GHZ;
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status->rate_idx = wl1271_rate_to_idx(desc->rate, status->band);
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#ifdef CONFIG_WL12XX_HT
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/* 11n support */
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if (desc->rate <= CONF_HW_RXTX_RATE_MCS0)
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status->flag |= RX_FLAG_HT;
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#endif
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status->signal = desc->rssi;
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/*
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* FIXME: In wl1251, the SNR should be divided by two. In wl1271 we
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* need to divide by two for now, but TI has been discussing about
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* changing it. This needs to be rechecked.
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*/
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wl->noise = desc->rssi - (desc->snr >> 1);
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status->freq = ieee80211_channel_to_frequency(desc->channel,
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status->band);
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if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
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u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK;
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status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED |
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RX_FLAG_DECRYPTED;
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if (unlikely(desc_err_code == WL1271_RX_DESC_MIC_FAIL)) {
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status->flag |= RX_FLAG_MMIC_ERROR;
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wl1271_warning("Michael MIC error");
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}
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}
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}
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static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length)
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{
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struct wl1271_rx_descriptor *desc;
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struct sk_buff *skb;
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struct ieee80211_hdr *hdr;
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u8 *buf;
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u8 beacon = 0;
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u8 is_data = 0;
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/*
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* In PLT mode we seem to get frames and mac80211 warns about them,
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* workaround this by not retrieving them at all.
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*/
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if (unlikely(wl->state == WL1271_STATE_PLT))
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return -EINVAL;
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/* the data read starts with the descriptor */
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desc = (struct wl1271_rx_descriptor *) data;
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if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) {
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size_t len = length - sizeof(*desc);
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wl12xx_copy_fwlog(wl, data + sizeof(*desc), len);
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wake_up_interruptible(&wl->fwlog_waitq);
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return 0;
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}
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switch (desc->status & WL1271_RX_DESC_STATUS_MASK) {
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/* discard corrupted packets */
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case WL1271_RX_DESC_DRIVER_RX_Q_FAIL:
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case WL1271_RX_DESC_DECRYPT_FAIL:
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wl1271_warning("corrupted packet in RX with status: 0x%x",
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desc->status & WL1271_RX_DESC_STATUS_MASK);
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return -EINVAL;
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case WL1271_RX_DESC_SUCCESS:
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case WL1271_RX_DESC_MIC_FAIL:
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break;
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default:
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wl1271_error("invalid RX descriptor status: 0x%x",
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desc->status & WL1271_RX_DESC_STATUS_MASK);
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return -EINVAL;
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}
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skb = __dev_alloc_skb(length, GFP_KERNEL);
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if (!skb) {
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wl1271_error("Couldn't allocate RX frame");
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return -ENOMEM;
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}
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buf = skb_put(skb, length);
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memcpy(buf, data, length);
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/* now we pull the descriptor out of the buffer */
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skb_pull(skb, sizeof(*desc));
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hdr = (struct ieee80211_hdr *)skb->data;
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if (ieee80211_is_beacon(hdr->frame_control))
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beacon = 1;
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if (ieee80211_is_data_present(hdr->frame_control))
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is_data = 1;
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wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
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wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s", skb,
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skb->len - desc->pad_len,
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beacon ? "beacon" : "");
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skb_trim(skb, skb->len - desc->pad_len);
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skb_queue_tail(&wl->deferred_rx_queue, skb);
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queue_work(wl->freezable_wq, &wl->netstack_work);
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return is_data;
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}
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void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_common_status *status)
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{
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struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map;
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u32 buf_size;
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u32 fw_rx_counter = status->fw_rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
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u32 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
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u32 rx_counter;
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u32 mem_block;
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u32 pkt_length;
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u32 pkt_offset;
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bool is_ap = (wl->bss_type == BSS_TYPE_AP_BSS);
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bool had_data = false;
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while (drv_rx_counter != fw_rx_counter) {
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buf_size = 0;
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rx_counter = drv_rx_counter;
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while (rx_counter != fw_rx_counter) {
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pkt_length = wl1271_rx_get_buf_size(status, rx_counter);
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if (buf_size + pkt_length > WL1271_AGGR_BUFFER_SIZE)
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break;
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buf_size += pkt_length;
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rx_counter++;
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rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
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}
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if (buf_size == 0) {
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wl1271_warning("received empty data");
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break;
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}
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if (wl->chip.id != CHIP_ID_1283_PG20) {
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/*
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* Choose the block we want to read
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* For aggregated packets, only the first memory block
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* should be retrieved. The FW takes care of the rest.
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*/
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mem_block = wl1271_rx_get_mem_block(status,
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drv_rx_counter);
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wl->rx_mem_pool_addr.addr = (mem_block << 8) +
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le32_to_cpu(wl_mem_map->packet_memory_pool_start);
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wl->rx_mem_pool_addr.addr_extra =
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wl->rx_mem_pool_addr.addr + 4;
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wl1271_write(wl, WL1271_SLV_REG_DATA,
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&wl->rx_mem_pool_addr,
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sizeof(wl->rx_mem_pool_addr), false);
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}
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/* Read all available packets at once */
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wl1271_read(wl, WL1271_SLV_MEM_DATA, wl->aggr_buf,
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buf_size, true);
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/* Split data into separate packets */
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pkt_offset = 0;
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while (pkt_offset < buf_size) {
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pkt_length = wl1271_rx_get_buf_size(status,
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drv_rx_counter);
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/*
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* the handle data call can only fail in memory-outage
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* conditions, in that case the received frame will just
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* be dropped.
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*/
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if (wl1271_rx_handle_data(wl,
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wl->aggr_buf + pkt_offset,
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pkt_length) == 1)
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had_data = true;
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wl->rx_counter++;
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drv_rx_counter++;
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drv_rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
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pkt_offset += pkt_length;
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}
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}
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/*
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* Write the driver's packet counter to the FW. This is only required
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* for older hardware revisions
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*/
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if (wl->quirks & WL12XX_QUIRK_END_OF_TRANSACTION)
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wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);
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if (!is_ap && wl->conf.rx_streaming.interval && had_data &&
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(wl->conf.rx_streaming.always ||
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test_bit(WL1271_FLAG_SOFT_GEMINI, &wl->flags))) {
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u32 timeout = wl->conf.rx_streaming.duration;
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/* restart rx streaming */
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if (!test_bit(WL1271_FLAG_RX_STREAMING_STARTED, &wl->flags))
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ieee80211_queue_work(wl->hw,
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&wl->rx_streaming_enable_work);
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mod_timer(&wl->rx_streaming_timer,
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jiffies + msecs_to_jiffies(timeout));
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}
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}
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void wl1271_set_default_filters(struct wl1271 *wl)
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{
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if (wl->bss_type == BSS_TYPE_AP_BSS) {
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wl->rx_config = WL1271_DEFAULT_AP_RX_CONFIG;
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wl->rx_filter = WL1271_DEFAULT_AP_RX_FILTER;
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} else {
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wl->rx_config = WL1271_DEFAULT_STA_RX_CONFIG;
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wl->rx_filter = WL1271_DEFAULT_STA_RX_FILTER;
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}
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}
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