10c03f6968
Add the glue for ARM11 SMP oprofile support, which also supports the performance monitor in the coherency unit. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
61 lines
1.5 KiB
C
61 lines
1.5 KiB
C
/**
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* @file op_model_mpcore.c
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* MPCORE Event Monitor Driver
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* @remark Copyright 2004 ARM SMP Development Team
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* @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
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* @remark Copyright 2000-2004 MontaVista Software Inc
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* @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
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* @remark Copyright 2004 Intel Corporation
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* @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
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* @remark Copyright 2004 Oprofile Authors
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*
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* @remark Read the file COPYING
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*
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* @author Zwane Mwaikambo
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*/
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#ifndef OP_MODEL_MPCORE_H
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#define OP_MODEL_MPCORE_H
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struct eventmonitor {
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unsigned long PMCR;
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unsigned char MCEB[8];
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unsigned long MC[8];
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};
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/*
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* List of userspace counter numbers: note that the structure is important.
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* The code relies on CPUn's counters being CPU0's counters + 3n
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* and on CPU0's counters starting at 0
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*/
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#define COUNTER_CPU0_PMN0 0
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#define COUNTER_CPU0_PMN1 1
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#define COUNTER_CPU0_CCNT 2
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#define COUNTER_CPU1_PMN0 3
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#define COUNTER_CPU1_PMN1 4
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#define COUNTER_CPU1_CCNT 5
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#define COUNTER_CPU2_PMN0 6
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#define COUNTER_CPU2_PMN1 7
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#define COUNTER_CPU2_CCNT 8
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#define COUNTER_CPU3_PMN0 9
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#define COUNTER_CPU3_PMN1 10
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#define COUNTER_CPU3_CCNT 11
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#define COUNTER_SCU_MN0 12
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#define COUNTER_SCU_MN1 13
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#define COUNTER_SCU_MN2 14
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#define COUNTER_SCU_MN3 15
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#define COUNTER_SCU_MN4 16
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#define COUNTER_SCU_MN5 17
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#define COUNTER_SCU_MN6 18
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#define COUNTER_SCU_MN7 19
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#define NUM_SCU_COUNTERS 8
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#define SCU_COUNTER(number) ((number) + COUNTER_SCU_MN0)
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#define MPCORE_NUM_COUNTERS SCU_COUNTER(NUM_SCU_COUNTERS)
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#endif
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