6cf6dfefe1
MSM8X60 has different IO mappings than previous MSMs. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
61 lines
1.9 KiB
C
61 lines
1.9 KiB
C
/*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
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* Author: Brian Swetland <swetland@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* The MSM peripherals are spread all over across 768MB of physical
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* space, which makes just having a simple IO_ADDRESS macro to slide
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* them into the right virtual location rough. Instead, we will
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* provide a master phys->virt mapping for peripherals here.
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*
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*/
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#ifndef __ASM_ARCH_MSM_IOMAP_8X60_H
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#define __ASM_ARCH_MSM_IOMAP_8X60_H
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/* Physical base address and size of peripherals.
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* Ordered by the virtual base addresses they will be mapped at.
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*
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* MSM_VIC_BASE must be an value that can be loaded via a "mov"
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* instruction, otherwise entry-macro.S will not compile.
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*
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* If you add or remove entries here, you'll want to edit the
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* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
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* changes.
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*
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*/
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#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)
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#define MSM_QGIC_DIST_PHYS 0x02080000
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#define MSM_QGIC_DIST_SIZE SZ_4K
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#define MSM_QGIC_CPU_BASE IOMEM(0xF0001000)
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#define MSM_QGIC_CPU_PHYS 0x02081000
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#define MSM_QGIC_CPU_SIZE SZ_4K
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#define MSM_ACC_BASE IOMEM(0xF0002000)
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#define MSM_ACC_PHYS 0x02001000
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#define MSM_ACC_SIZE SZ_4K
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#define MSM_GCC_BASE IOMEM(0xF0003000)
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#define MSM_GCC_PHYS 0x02082000
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#define MSM_GCC_SIZE SZ_4K
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#define MSM_TLMM_BASE IOMEM(0xF0004000)
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#define MSM_TLMM_PHYS 0x00800000
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#define MSM_TLMM_SIZE SZ_16K
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#define MSM_SHARED_RAM_BASE IOMEM(0xF0100000)
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#define MSM_SHARED_RAM_SIZE SZ_1M
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#endif
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