ec43b08b57
Register a GPIO driver to access the GPIOs provided by the chip. The GPIOs of the SoC should always start at 0 and the other GPIOs could start at a random position. There is just one SoC in a system and when they start at 0 the number is predictable. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: http://patchwork.linux-mips.org/patch/4591 Acked-by: Florian Fainelli <florian@openwrt.org>
24 lines
776 B
Makefile
24 lines
776 B
Makefile
# core
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ssb-y += main.o scan.o
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ssb-$(CONFIG_SSB_EMBEDDED) += embedded.o
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ssb-$(CONFIG_SSB_SPROM) += sprom.o
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# host support
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ssb-$(CONFIG_SSB_PCIHOST) += pci.o pcihost_wrapper.o
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ssb-$(CONFIG_SSB_PCMCIAHOST) += pcmcia.o
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ssb-$(CONFIG_SSB_SDIOHOST) += sdio.o
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# built-in drivers
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ssb-y += driver_chipcommon.o
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ssb-y += driver_chipcommon_pmu.o
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ssb-$(CONFIG_SSB_DRIVER_MIPS) += driver_mipscore.o
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ssb-$(CONFIG_SSB_DRIVER_EXTIF) += driver_extif.o
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ssb-$(CONFIG_SSB_DRIVER_PCICORE) += driver_pcicore.o
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ssb-$(CONFIG_SSB_DRIVER_GIGE) += driver_gige.o
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ssb-$(CONFIG_SSB_DRIVER_GPIO) += driver_gpio.o
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# b43 pci-ssb-bridge driver
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# Not strictly a part of SSB, but kept here for convenience
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ssb-$(CONFIG_SSB_B43_PCI_BRIDGE) += b43_pci_bridge.o
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obj-$(CONFIG_SSB) += ssb.o
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