ebe35aff88
Currently, orion5x uses a hardcoded timer tick rate of 166 MHz, but the actual timer tick rate varies between different members of the SoC family (and can vary based on strap pin settings). This patch prepares for runtime determination of the timer tick rate. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
134 lines
3.1 KiB
C
134 lines
3.1 KiB
C
/*
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* QNAP TS-x09 Boards common functions
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*
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* Maintainers: Lennert Buytenhek <buytenh@marvell.com>
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* Byron Bradley <byron.bbradley@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/timex.h>
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#include <linux/serial_reg.h>
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#include "tsx09-common.h"
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#include "common.h"
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/*****************************************************************************
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* QNAP TS-x09 specific power off method via UART1-attached PIC
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****************************************************************************/
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#define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2))
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void qnap_tsx09_power_off(void)
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{
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/* 19200 baud divisor */
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const unsigned divisor = ((orion5x_tclk + (8 * 19200)) / (16 * 19200));
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pr_info("%s: triggering power-off...\n", __func__);
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/* hijack uart1 and reset into sane state (19200,8n1) */
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writel(0x83, UART1_REG(LCR));
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writel(divisor & 0xff, UART1_REG(DLL));
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writel((divisor >> 8) & 0xff, UART1_REG(DLM));
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writel(0x03, UART1_REG(LCR));
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writel(0x00, UART1_REG(IER));
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writel(0x00, UART1_REG(FCR));
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writel(0x00, UART1_REG(MCR));
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/* send the power-off command 'A' to PIC */
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writel('A', UART1_REG(TX));
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}
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/*****************************************************************************
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* Ethernet
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****************************************************************************/
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struct mv643xx_eth_platform_data qnap_tsx09_eth_data = {
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.phy_addr = 8,
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};
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static int __init qnap_tsx09_parse_hex_nibble(char n)
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{
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if (n >= '0' && n <= '9')
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return n - '0';
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if (n >= 'A' && n <= 'F')
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return n - 'A' + 10;
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if (n >= 'a' && n <= 'f')
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return n - 'a' + 10;
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return -1;
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}
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static int __init qnap_tsx09_parse_hex_byte(const char *b)
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{
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int hi;
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int lo;
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hi = qnap_tsx09_parse_hex_nibble(b[0]);
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lo = qnap_tsx09_parse_hex_nibble(b[1]);
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if (hi < 0 || lo < 0)
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return -1;
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return (hi << 4) | lo;
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}
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static int __init qnap_tsx09_check_mac_addr(const char *addr_str)
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{
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u_int8_t addr[6];
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int i;
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for (i = 0; i < 6; i++) {
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int byte;
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/*
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* Enforce "xx:xx:xx:xx:xx:xx\n" format.
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*/
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if (addr_str[(i * 3) + 2] != ((i < 5) ? ':' : '\n'))
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return -1;
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byte = qnap_tsx09_parse_hex_byte(addr_str + (i * 3));
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if (byte < 0)
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return -1;
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addr[i] = byte;
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}
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printk(KERN_INFO "tsx09: found ethernet mac address ");
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for (i = 0; i < 6; i++)
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printk("%.2x%s", addr[i], (i < 5) ? ":" : ".\n");
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memcpy(qnap_tsx09_eth_data.mac_addr, addr, 6);
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return 0;
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}
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/*
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* The 'NAS Config' flash partition has an ext2 filesystem which
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* contains a file that has the ethernet MAC address in plain text
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* (format "xx:xx:xx:xx:xx:xx\n").
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*/
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void __init qnap_tsx09_find_mac_addr(u32 mem_base, u32 size)
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{
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unsigned long addr;
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for (addr = mem_base; addr < (mem_base + size); addr += 1024) {
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char *nor_page;
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int ret = 0;
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nor_page = ioremap(addr, 1024);
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if (nor_page != NULL) {
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ret = qnap_tsx09_check_mac_addr(nor_page);
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iounmap(nor_page);
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}
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if (ret == 0)
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break;
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}
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}
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