30b3a23c25
As Adam Baker reported the DMA address for the descriptor base was incorrectly initialized in the PCI drivers. Instead of the DMA base for the descriptor, the DMA base for the data was passed resulting in a broken TX/RX state for PCI drivers. Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
164 lines
4.4 KiB
C
164 lines
4.4 KiB
C
/*
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Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
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<http://rt2x00.serialmonkey.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the
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Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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Module: rt2x00pci
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Abstract: Data structures for the rt2x00pci module.
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*/
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#ifndef RT2X00PCI_H
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#define RT2X00PCI_H
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#include <linux/io.h>
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/*
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* This variable should be used with the
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* pci_driver structure initialization.
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*/
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#define PCI_DEVICE_DATA(__ops) .driver_data = (kernel_ulong_t)(__ops)
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/*
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* Register defines.
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* Some registers require multiple attempts before success,
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* in those cases REGISTER_BUSY_COUNT attempts should be
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* taken with a REGISTER_BUSY_DELAY interval.
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*/
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#define REGISTER_BUSY_COUNT 5
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#define REGISTER_BUSY_DELAY 100
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/*
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* Descriptor availability flags.
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* All PCI device descriptors have these 2 flags
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* with the exact same definition.
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* By storing them here we can use them inside rt2x00pci
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* for some simple entry availability checking.
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*/
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#define TXD_ENTRY_OWNER_NIC FIELD32(0x00000001)
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#define TXD_ENTRY_VALID FIELD32(0x00000002)
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#define RXD_ENTRY_OWNER_NIC FIELD32(0x00000001)
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/*
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* Register access.
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*/
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static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
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const unsigned long offset,
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u32 *value)
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{
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*value = readl(rt2x00dev->csr.base + offset);
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}
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static inline void
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rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
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const unsigned long offset,
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void *value, const u16 length)
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{
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memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
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}
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static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
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const unsigned long offset,
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u32 value)
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{
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writel(value, rt2x00dev->csr.base + offset);
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}
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static inline void
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rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
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const unsigned long offset,
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void *value, const u16 length)
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{
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memcpy_toio(rt2x00dev->csr.base + offset, value, length);
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}
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/*
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* TX data handlers.
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*/
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int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
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struct data_queue *queue, struct sk_buff *skb,
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struct ieee80211_tx_control *control);
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/**
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* struct queue_entry_priv_pci_rx: Per RX entry PCI specific information
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*
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* @desc: Pointer to device descriptor.
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* @data: Pointer to device's entry memory.
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* @dma: DMA pointer to &data.
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*/
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struct queue_entry_priv_pci_rx {
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__le32 *desc;
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dma_addr_t desc_dma;
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void *data;
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dma_addr_t data_dma;
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};
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/**
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* struct queue_entry_priv_pci_tx: Per TX entry PCI specific information
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*
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* @desc: Pointer to device descriptor
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* @data: Pointer to device's entry memory.
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* @dma: DMA pointer to &data.
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* @control: mac80211 control structure used to transmit data.
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*/
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struct queue_entry_priv_pci_tx {
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__le32 *desc;
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dma_addr_t desc_dma;
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void *data;
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dma_addr_t data_dma;
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struct ieee80211_tx_control control;
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};
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/**
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* rt2x00pci_rxdone - Handle RX done events
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* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
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*/
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void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev);
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/**
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* rt2x00pci_txdone - Handle TX done events
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* @rt2x00dev: Device pointer, see &struct rt2x00_dev.
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* @entry: Entry which has completed the transmission of a frame.
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* @desc: TX done descriptor
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*/
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void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry,
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struct txdone_entry_desc *desc);
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/*
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* Device initialization handlers.
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*/
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int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev);
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void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev);
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/*
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* PCI driver handlers.
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*/
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int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id);
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void rt2x00pci_remove(struct pci_dev *pci_dev);
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#ifdef CONFIG_PM
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int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state);
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int rt2x00pci_resume(struct pci_dev *pci_dev);
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#else
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#define rt2x00pci_suspend NULL
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#define rt2x00pci_resume NULL
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#endif /* CONFIG_PM */
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#endif /* RT2X00PCI_H */
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