e9a05bb4d3
Modify spdx tag for all CAF authored files for Kona. Change-Id: I9308c7189412b1e428a7f67ded0dc076b0e38254 Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
152 lines
3.8 KiB
C
152 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2014-2015, 2017-2018, The Linux Foundation. All rights reserved.
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*/
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#ifndef __ESOC_MDM_H__
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#define __ESOC_MDM_H__
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/jiffies.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_gpio.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include "esoc.h"
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#define MDM_PBLRDY_CNT 20
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#define INVALID_GPIO (-1)
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#define MDM_GPIO(mdm, i) (mdm->gpios[i])
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#define MDM9x55_LABEL "MDM9x55"
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#define MDM9x55_PCIE "PCIe"
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#define SDX50M_LABEL "SDX50M"
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#define SDX50M_PCIE "PCIe"
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#define SDX55M_LABEL "SDX55M"
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#define SDX55M_PCIE "PCIe"
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#define MDM2AP_STATUS_TIMEOUT_MS 120000L
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#define MDM_MODEM_TIMEOUT 3000
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#define DEF_RAMDUMP_TIMEOUT 120000
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#define DEF_RAMDUMP_DELAY 2000
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#define DEF_SHUTDOWN_TIMEOUT 10000
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#define DEF_MDM9X55_RESET_TIME 203
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#define RD_BUF_SIZE 100
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#define SFR_MAX_RETRIES 10
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#define SFR_RETRY_INTERVAL 1000
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#define MDM_DBG_OFFSET 0x934
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#define MDM_DBG_MODE 0x53444247
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#define MDM_CTI_NAME "coresight-cti-rpm-cpu0"
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#define MDM_CTI_TRIG 0
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#define MDM_CTI_CH 0
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enum mdm_gpio {
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AP2MDM_WAKEUP = 0,
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AP2MDM_STATUS,
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AP2MDM_SOFT_RESET,
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AP2MDM_VDD_MIN,
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AP2MDM_CHNLRDY,
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AP2MDM_ERRFATAL,
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AP2MDM_VDDMIN,
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AP2MDM_PMIC_PWR_EN,
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MDM2AP_WAKEUP,
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MDM2AP_ERRFATAL,
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MDM2AP_PBLRDY,
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MDM2AP_STATUS,
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MDM2AP_VDDMIN,
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MDM_LINK_DETECT,
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NUM_GPIOS,
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};
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struct mdm_pon_ops;
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struct mdm_ctrl {
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unsigned int gpios[NUM_GPIOS];
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spinlock_t status_lock;
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struct workqueue_struct *mdm_queue;
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struct delayed_work mdm2ap_status_check_work;
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struct work_struct mdm_status_work;
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struct work_struct restart_reason_work;
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struct completion debug_done;
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struct device *dev;
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struct pinctrl *pinctrl;
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struct pinctrl_state *gpio_state_booting;
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struct pinctrl_state *gpio_state_running;
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struct pinctrl_state *gpio_state_active;
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struct pinctrl_state *gpio_state_suspend;
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int mdm2ap_status_valid_old_config;
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int soft_reset_inverted;
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int errfatal_irq;
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int status_irq;
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int pblrdy_irq;
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int debug;
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int init;
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bool debug_fail;
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unsigned int dump_timeout_ms;
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unsigned int ramdump_delay_ms;
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unsigned int shutdown_timeout_ms;
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unsigned int reset_time_ms;
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struct esoc_clink *esoc;
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bool get_restart_reason;
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unsigned long irq_mask;
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bool ready;
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bool dual_interface;
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u32 status;
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void __iomem *dbg_addr;
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bool dbg_mode;
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struct coresight_cti *cti;
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int trig_cnt;
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const struct mdm_pon_ops *pon_ops;
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bool skip_restart_for_mdm_crash;
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};
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struct mdm_pon_ops {
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int (*pon)(struct mdm_ctrl *mdm);
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int (*soft_reset)(struct mdm_ctrl *mdm, bool atomic);
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int (*poff_force)(struct mdm_ctrl *mdm);
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int (*poff_cleanup)(struct mdm_ctrl *mdm);
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void (*cold_reset)(struct mdm_ctrl *mdm);
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int (*dt_init)(struct mdm_ctrl *mdm);
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int (*setup)(struct mdm_ctrl *mdm);
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};
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struct mdm_ops {
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struct esoc_clink_ops *clink_ops;
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struct mdm_pon_ops *pon_ops;
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int (*config_hw)(struct mdm_ctrl *mdm, const struct mdm_ops *ops,
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struct platform_device *pdev);
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};
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void mdm_disable_irqs(struct mdm_ctrl *mdm);
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void mdm_wait_for_status_low(struct mdm_ctrl *mdm, bool atomic);
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static inline int mdm_toggle_soft_reset(struct mdm_ctrl *mdm, bool atomic)
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{
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return mdm->pon_ops->soft_reset(mdm, atomic);
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}
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static inline int mdm_do_first_power_on(struct mdm_ctrl *mdm)
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{
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return mdm->pon_ops->pon(mdm);
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}
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static inline int mdm_power_down(struct mdm_ctrl *mdm)
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{
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return mdm->pon_ops->poff_force(mdm);
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}
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static inline void mdm_cold_reset(struct mdm_ctrl *mdm)
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{
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mdm->pon_ops->cold_reset(mdm);
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}
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static inline int mdm_pon_dt_init(struct mdm_ctrl *mdm)
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{
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return mdm->pon_ops->dt_init(mdm);
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}
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static inline int mdm_pon_setup(struct mdm_ctrl *mdm)
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{
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return mdm->pon_ops->setup(mdm);
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}
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extern struct mdm_pon_ops mdm9x55_pon_ops;
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extern struct mdm_pon_ops sdx50m_pon_ops;
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extern struct mdm_pon_ops sdx55m_pon_ops;
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#endif
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