e7d326ac43
This patch moves rate helpers to iwlcore. Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
1015 lines
37 KiB
C
1015 lines
37 KiB
C
/******************************************************************************
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* James P. Ketrenos <ipw2100-admin@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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* BSD LICENSE
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*
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* Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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/*
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* Please use this file (iwl-4965-hw.h) only for hardware-related definitions.
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* Use iwl-commands.h for uCode API definitions.
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* Use iwl-dev.h for driver implementation definitions.
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*/
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#ifndef __iwl_4965_hw_h__
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#define __iwl_4965_hw_h__
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#include "iwl-fh.h"
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/* EERPROM */
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#define IWL4965_EEPROM_IMG_SIZE 1024
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/*
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* uCode queue management definitions ...
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* Queue #4 is the command queue for 3945 and 4965; map it to Tx FIFO chnl 4.
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* The first queue used for block-ack aggregation is #7 (4965 only).
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* All block-ack aggregation queues should map to Tx DMA/FIFO channel 7.
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*/
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#define IWL_CMD_QUEUE_NUM 4
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#define IWL_CMD_FIFO_NUM 4
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#define IWL49_FIRST_AMPDU_QUEUE 7
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/* Tx rates */
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#define IWL_CCK_RATES 4
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#define IWL_OFDM_RATES 8
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#define IWL_HT_RATES 16
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#define IWL_MAX_RATES (IWL_CCK_RATES+IWL_OFDM_RATES+IWL_HT_RATES)
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/* Time constants */
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#define SHORT_SLOT_TIME 9
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#define LONG_SLOT_TIME 20
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/* RSSI to dBm */
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#define IWL_RSSI_OFFSET 44
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#include "iwl-commands.h"
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/* PCI registers */
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#define PCI_LINK_CTRL 0x0F0 /* 1 byte */
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#define PCI_POWER_SOURCE 0x0C8
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#define PCI_REG_WUM8 0x0E8
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/* PCI register values */
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#define PCI_LINK_VAL_L0S_EN 0x01
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#define PCI_LINK_VAL_L1_EN 0x02
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#define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT (0x80000000)
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#define TFD_QUEUE_SIZE_MAX (256)
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#define IWL_NUM_SCAN_RATES (2)
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#define IWL_DEFAULT_TX_RETRY 15
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#define RX_QUEUE_SIZE 256
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#define RX_QUEUE_MASK 255
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#define RX_QUEUE_SIZE_LOG 8
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#define TFD_TX_CMD_SLOTS 256
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#define TFD_CMD_SLOTS 32
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/*
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* RX related structures and functions
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*/
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#define RX_FREE_BUFFERS 64
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#define RX_LOW_WATERMARK 8
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/* Size of one Rx buffer in host DRAM */
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#define IWL_RX_BUF_SIZE_4K (4 * 1024)
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#define IWL_RX_BUF_SIZE_8K (8 * 1024)
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/* Sizes and addresses for instruction and data memory (SRAM) in
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* 4965's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
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#define RTC_INST_LOWER_BOUND (0x000000)
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#define IWL49_RTC_INST_UPPER_BOUND (0x018000)
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#define RTC_DATA_LOWER_BOUND (0x800000)
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#define IWL49_RTC_DATA_UPPER_BOUND (0x80A000)
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#define IWL49_RTC_INST_SIZE (IWL49_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
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#define IWL49_RTC_DATA_SIZE (IWL49_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
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#define IWL_MAX_INST_SIZE IWL49_RTC_INST_SIZE
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#define IWL_MAX_DATA_SIZE IWL49_RTC_DATA_SIZE
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/* Size of uCode instruction memory in bootstrap state machine */
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#define IWL_MAX_BSM_SIZE BSM_SRAM_SIZE
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static inline int iwl4965_hw_valid_rtc_data_addr(u32 addr)
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{
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return (addr >= RTC_DATA_LOWER_BOUND) &&
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(addr < IWL49_RTC_DATA_UPPER_BOUND);
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}
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/********************* START TEMPERATURE *************************************/
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/**
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* 4965 temperature calculation.
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*
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* The driver must calculate the device temperature before calculating
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* a txpower setting (amplifier gain is temperature dependent). The
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* calculation uses 4 measurements, 3 of which (R1, R2, R3) are calibration
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* values used for the life of the driver, and one of which (R4) is the
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* real-time temperature indicator.
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*
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* uCode provides all 4 values to the driver via the "initialize alive"
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* notification (see struct iwl4965_init_alive_resp). After the runtime uCode
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* image loads, uCode updates the R4 value via statistics notifications
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* (see STATISTICS_NOTIFICATION), which occur after each received beacon
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* when associated, or can be requested via REPLY_STATISTICS_CMD.
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*
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* NOTE: uCode provides the R4 value as a 23-bit signed value. Driver
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* must sign-extend to 32 bits before applying formula below.
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*
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* Formula:
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*
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* degrees Kelvin = ((97 * 259 * (R4 - R2) / (R3 - R1)) / 100) + 8
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*
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* NOTE: The basic formula is 259 * (R4-R2) / (R3-R1). The 97/100 is
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* an additional correction, which should be centered around 0 degrees
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* Celsius (273 degrees Kelvin). The 8 (3 percent of 273) compensates for
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* centering the 97/100 correction around 0 degrees K.
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*
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* Add 273 to Kelvin value to find degrees Celsius, for comparing current
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* temperature with factory-measured temperatures when calculating txpower
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* settings.
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*/
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#define TEMPERATURE_CALIB_KELVIN_OFFSET 8
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#define TEMPERATURE_CALIB_A_VAL 259
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/* Limit range of calculated temperature to be between these Kelvin values */
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#define IWL_TX_POWER_TEMPERATURE_MIN (263)
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#define IWL_TX_POWER_TEMPERATURE_MAX (410)
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#define IWL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(t) \
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(((t) < IWL_TX_POWER_TEMPERATURE_MIN) || \
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((t) > IWL_TX_POWER_TEMPERATURE_MAX))
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/********************* END TEMPERATURE ***************************************/
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/********************* START TXPOWER *****************************************/
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/**
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* 4965 txpower calculations rely on information from three sources:
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*
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* 1) EEPROM
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* 2) "initialize" alive notification
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* 3) statistics notifications
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*
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* EEPROM data consists of:
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*
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* 1) Regulatory information (max txpower and channel usage flags) is provided
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* separately for each channel that can possibly supported by 4965.
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* 40 MHz wide (.11n fat) channels are listed separately from 20 MHz
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* (legacy) channels.
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*
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* See struct iwl4965_eeprom_channel for format, and struct iwl4965_eeprom
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* for locations in EEPROM.
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*
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* 2) Factory txpower calibration information is provided separately for
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* sub-bands of contiguous channels. 2.4GHz has just one sub-band,
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* but 5 GHz has several sub-bands.
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*
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* In addition, per-band (2.4 and 5 Ghz) saturation txpowers are provided.
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*
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* See struct iwl4965_eeprom_calib_info (and the tree of structures
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* contained within it) for format, and struct iwl4965_eeprom for
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* locations in EEPROM.
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*
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* "Initialization alive" notification (see struct iwl4965_init_alive_resp)
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* consists of:
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*
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* 1) Temperature calculation parameters.
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*
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* 2) Power supply voltage measurement.
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*
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* 3) Tx gain compensation to balance 2 transmitters for MIMO use.
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*
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* Statistics notifications deliver:
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*
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* 1) Current values for temperature param R4.
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*/
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/**
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* To calculate a txpower setting for a given desired target txpower, channel,
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* modulation bit rate, and transmitter chain (4965 has 2 transmitters to
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* support MIMO and transmit diversity), driver must do the following:
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*
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* 1) Compare desired txpower vs. (EEPROM) regulatory limit for this channel.
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* Do not exceed regulatory limit; reduce target txpower if necessary.
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*
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* If setting up txpowers for MIMO rates (rate indexes 8-15, 24-31),
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* 2 transmitters will be used simultaneously; driver must reduce the
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* regulatory limit by 3 dB (half-power) for each transmitter, so the
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* combined total output of the 2 transmitters is within regulatory limits.
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*
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*
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* 2) Compare target txpower vs. (EEPROM) saturation txpower *reduced by
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* backoff for this bit rate*. Do not exceed (saturation - backoff[rate]);
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* reduce target txpower if necessary.
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*
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* Backoff values below are in 1/2 dB units (equivalent to steps in
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* txpower gain tables):
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*
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* OFDM 6 - 36 MBit: 10 steps (5 dB)
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* OFDM 48 MBit: 15 steps (7.5 dB)
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* OFDM 54 MBit: 17 steps (8.5 dB)
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* OFDM 60 MBit: 20 steps (10 dB)
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* CCK all rates: 10 steps (5 dB)
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*
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* Backoff values apply to saturation txpower on a per-transmitter basis;
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* when using MIMO (2 transmitters), each transmitter uses the same
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* saturation level provided in EEPROM, and the same backoff values;
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* no reduction (such as with regulatory txpower limits) is required.
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*
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* Saturation and Backoff values apply equally to 20 Mhz (legacy) channel
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* widths and 40 Mhz (.11n fat) channel widths; there is no separate
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* factory measurement for fat channels.
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*
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* The result of this step is the final target txpower. The rest of
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* the steps figure out the proper settings for the device to achieve
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* that target txpower.
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*
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*
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* 3) Determine (EEPROM) calibration subband for the target channel, by
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* comparing against first and last channels in each subband
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* (see struct iwl4965_eeprom_calib_subband_info).
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*
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*
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* 4) Linearly interpolate (EEPROM) factory calibration measurement sets,
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* referencing the 2 factory-measured (sample) channels within the subband.
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*
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* Interpolation is based on difference between target channel's frequency
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* and the sample channels' frequencies. Since channel numbers are based
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* on frequency (5 MHz between each channel number), this is equivalent
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* to interpolating based on channel number differences.
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*
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* Note that the sample channels may or may not be the channels at the
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* edges of the subband. The target channel may be "outside" of the
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* span of the sampled channels.
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*
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* Driver may choose the pair (for 2 Tx chains) of measurements (see
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* struct iwl4965_eeprom_calib_ch_info) for which the actual measured
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* txpower comes closest to the desired txpower. Usually, though,
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* the middle set of measurements is closest to the regulatory limits,
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* and is therefore a good choice for all txpower calculations (this
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* assumes that high accuracy is needed for maximizing legal txpower,
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* while lower txpower configurations do not need as much accuracy).
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*
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* Driver should interpolate both members of the chosen measurement pair,
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* i.e. for both Tx chains (radio transmitters), unless the driver knows
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* that only one of the chains will be used (e.g. only one tx antenna
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* connected, but this should be unusual). The rate scaling algorithm
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* switches antennas to find best performance, so both Tx chains will
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* be used (although only one at a time) even for non-MIMO transmissions.
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*
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* Driver should interpolate factory values for temperature, gain table
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* index, and actual power. The power amplifier detector values are
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* not used by the driver.
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*
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* Sanity check: If the target channel happens to be one of the sample
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* channels, the results should agree with the sample channel's
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* measurements!
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*
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*
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* 5) Find difference between desired txpower and (interpolated)
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* factory-measured txpower. Using (interpolated) factory gain table index
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* (shown elsewhere) as a starting point, adjust this index lower to
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* increase txpower, or higher to decrease txpower, until the target
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* txpower is reached. Each step in the gain table is 1/2 dB.
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*
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* For example, if factory measured txpower is 16 dBm, and target txpower
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* is 13 dBm, add 6 steps to the factory gain index to reduce txpower
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* by 3 dB.
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*
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*
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* 6) Find difference between current device temperature and (interpolated)
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* factory-measured temperature for sub-band. Factory values are in
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* degrees Celsius. To calculate current temperature, see comments for
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* "4965 temperature calculation".
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*
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* If current temperature is higher than factory temperature, driver must
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* increase gain (lower gain table index), and vice versa.
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*
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* Temperature affects gain differently for different channels:
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*
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* 2.4 GHz all channels: 3.5 degrees per half-dB step
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* 5 GHz channels 34-43: 4.5 degrees per half-dB step
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* 5 GHz channels >= 44: 4.0 degrees per half-dB step
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*
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* NOTE: Temperature can increase rapidly when transmitting, especially
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* with heavy traffic at high txpowers. Driver should update
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* temperature calculations often under these conditions to
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* maintain strong txpower in the face of rising temperature.
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*
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*
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* 7) Find difference between current power supply voltage indicator
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* (from "initialize alive") and factory-measured power supply voltage
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* indicator (EEPROM).
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*
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* If the current voltage is higher (indicator is lower) than factory
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* voltage, gain should be reduced (gain table index increased) by:
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*
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* (eeprom - current) / 7
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*
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* If the current voltage is lower (indicator is higher) than factory
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* voltage, gain should be increased (gain table index decreased) by:
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*
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* 2 * (current - eeprom) / 7
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*
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* If number of index steps in either direction turns out to be > 2,
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* something is wrong ... just use 0.
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*
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* NOTE: Voltage compensation is independent of band/channel.
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*
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* NOTE: "Initialize" uCode measures current voltage, which is assumed
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* to be constant after this initial measurement. Voltage
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* compensation for txpower (number of steps in gain table)
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* may be calculated once and used until the next uCode bootload.
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*
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*
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* 8) If setting up txpowers for MIMO rates (rate indexes 8-15, 24-31),
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* adjust txpower for each transmitter chain, so txpower is balanced
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* between the two chains. There are 5 pairs of tx_atten[group][chain]
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* values in "initialize alive", one pair for each of 5 channel ranges:
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*
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* Group 0: 5 GHz channel 34-43
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* Group 1: 5 GHz channel 44-70
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* Group 2: 5 GHz channel 71-124
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* Group 3: 5 GHz channel 125-200
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* Group 4: 2.4 GHz all channels
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*
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* Add the tx_atten[group][chain] value to the index for the target chain.
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* The values are signed, but are in pairs of 0 and a non-negative number,
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* so as to reduce gain (if necessary) of the "hotter" channel. This
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* avoids any need to double-check for regulatory compliance after
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* this step.
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*
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*
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* 9) If setting up for a CCK rate, lower the gain by adding a CCK compensation
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* value to the index:
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*
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* Hardware rev B: 9 steps (4.5 dB)
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* Hardware rev C: 5 steps (2.5 dB)
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*
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* Hardware rev for 4965 can be determined by reading CSR_HW_REV_WA_REG,
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* bits [3:2], 1 = B, 2 = C.
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*
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* NOTE: This compensation is in addition to any saturation backoff that
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* might have been applied in an earlier step.
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*
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*
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* 10) Select the gain table, based on band (2.4 vs 5 GHz).
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*
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* Limit the adjusted index to stay within the table!
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*
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*
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* 11) Read gain table entries for DSP and radio gain, place into appropriate
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* location(s) in command (struct iwl4965_txpowertable_cmd).
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*/
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/* Limit range of txpower output target to be between these values */
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#define IWL_TX_POWER_TARGET_POWER_MIN (0) /* 0 dBm = 1 milliwatt */
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#define IWL_TX_POWER_TARGET_POWER_MAX (16) /* 16 dBm */
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/**
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* When MIMO is used (2 transmitters operating simultaneously), driver should
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* limit each transmitter to deliver a max of 3 dB below the regulatory limit
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* for the device. That is, use half power for each transmitter, so total
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* txpower is within regulatory limits.
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*
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* The value "6" represents number of steps in gain table to reduce power 3 dB.
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* Each step is 1/2 dB.
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*/
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#define IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION (6)
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/**
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* CCK gain compensation.
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*
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* When calculating txpowers for CCK, after making sure that the target power
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* is within regulatory and saturation limits, driver must additionally
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* back off gain by adding these values to the gain table index.
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*
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* Hardware rev for 4965 can be determined by reading CSR_HW_REV_WA_REG,
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* bits [3:2], 1 = B, 2 = C.
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*/
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#define IWL_TX_POWER_CCK_COMPENSATION_B_STEP (9)
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#define IWL_TX_POWER_CCK_COMPENSATION_C_STEP (5)
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/*
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* 4965 power supply voltage compensation for txpower
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*/
|
|
#define TX_POWER_IWL_VOLTAGE_CODES_PER_03V (7)
|
|
|
|
/**
|
|
* Gain tables.
|
|
*
|
|
* The following tables contain pair of values for setting txpower, i.e.
|
|
* gain settings for the output of the device's digital signal processor (DSP),
|
|
* and for the analog gain structure of the transmitter.
|
|
*
|
|
* Each entry in the gain tables represents a step of 1/2 dB. Note that these
|
|
* are *relative* steps, not indications of absolute output power. Output
|
|
* power varies with temperature, voltage, and channel frequency, and also
|
|
* requires consideration of average power (to satisfy regulatory constraints),
|
|
* and peak power (to avoid distortion of the output signal).
|
|
*
|
|
* Each entry contains two values:
|
|
* 1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained
|
|
* linear value that multiplies the output of the digital signal processor,
|
|
* before being sent to the analog radio.
|
|
* 2) Radio gain. This sets the analog gain of the radio Tx path.
|
|
* It is a coarser setting, and behaves in a logarithmic (dB) fashion.
|
|
*
|
|
* EEPROM contains factory calibration data for txpower. This maps actual
|
|
* measured txpower levels to gain settings in the "well known" tables
|
|
* below ("well-known" means here that both factory calibration *and* the
|
|
* driver work with the same table).
|
|
*
|
|
* There are separate tables for 2.4 GHz and 5 GHz bands. The 5 GHz table
|
|
* has an extension (into negative indexes), in case the driver needs to
|
|
* boost power setting for high device temperatures (higher than would be
|
|
* present during factory calibration). A 5 Ghz EEPROM index of "40"
|
|
* corresponds to the 49th entry in the table used by the driver.
|
|
*/
|
|
#define MIN_TX_GAIN_INDEX (0) /* highest gain, lowest idx, 2.4 */
|
|
#define MIN_TX_GAIN_INDEX_52GHZ_EXT (-9) /* highest gain, lowest idx, 5 */
|
|
|
|
/**
|
|
* 2.4 GHz gain table
|
|
*
|
|
* Index Dsp gain Radio gain
|
|
* 0 110 0x3f (highest gain)
|
|
* 1 104 0x3f
|
|
* 2 98 0x3f
|
|
* 3 110 0x3e
|
|
* 4 104 0x3e
|
|
* 5 98 0x3e
|
|
* 6 110 0x3d
|
|
* 7 104 0x3d
|
|
* 8 98 0x3d
|
|
* 9 110 0x3c
|
|
* 10 104 0x3c
|
|
* 11 98 0x3c
|
|
* 12 110 0x3b
|
|
* 13 104 0x3b
|
|
* 14 98 0x3b
|
|
* 15 110 0x3a
|
|
* 16 104 0x3a
|
|
* 17 98 0x3a
|
|
* 18 110 0x39
|
|
* 19 104 0x39
|
|
* 20 98 0x39
|
|
* 21 110 0x38
|
|
* 22 104 0x38
|
|
* 23 98 0x38
|
|
* 24 110 0x37
|
|
* 25 104 0x37
|
|
* 26 98 0x37
|
|
* 27 110 0x36
|
|
* 28 104 0x36
|
|
* 29 98 0x36
|
|
* 30 110 0x35
|
|
* 31 104 0x35
|
|
* 32 98 0x35
|
|
* 33 110 0x34
|
|
* 34 104 0x34
|
|
* 35 98 0x34
|
|
* 36 110 0x33
|
|
* 37 104 0x33
|
|
* 38 98 0x33
|
|
* 39 110 0x32
|
|
* 40 104 0x32
|
|
* 41 98 0x32
|
|
* 42 110 0x31
|
|
* 43 104 0x31
|
|
* 44 98 0x31
|
|
* 45 110 0x30
|
|
* 46 104 0x30
|
|
* 47 98 0x30
|
|
* 48 110 0x6
|
|
* 49 104 0x6
|
|
* 50 98 0x6
|
|
* 51 110 0x5
|
|
* 52 104 0x5
|
|
* 53 98 0x5
|
|
* 54 110 0x4
|
|
* 55 104 0x4
|
|
* 56 98 0x4
|
|
* 57 110 0x3
|
|
* 58 104 0x3
|
|
* 59 98 0x3
|
|
* 60 110 0x2
|
|
* 61 104 0x2
|
|
* 62 98 0x2
|
|
* 63 110 0x1
|
|
* 64 104 0x1
|
|
* 65 98 0x1
|
|
* 66 110 0x0
|
|
* 67 104 0x0
|
|
* 68 98 0x0
|
|
* 69 97 0
|
|
* 70 96 0
|
|
* 71 95 0
|
|
* 72 94 0
|
|
* 73 93 0
|
|
* 74 92 0
|
|
* 75 91 0
|
|
* 76 90 0
|
|
* 77 89 0
|
|
* 78 88 0
|
|
* 79 87 0
|
|
* 80 86 0
|
|
* 81 85 0
|
|
* 82 84 0
|
|
* 83 83 0
|
|
* 84 82 0
|
|
* 85 81 0
|
|
* 86 80 0
|
|
* 87 79 0
|
|
* 88 78 0
|
|
* 89 77 0
|
|
* 90 76 0
|
|
* 91 75 0
|
|
* 92 74 0
|
|
* 93 73 0
|
|
* 94 72 0
|
|
* 95 71 0
|
|
* 96 70 0
|
|
* 97 69 0
|
|
* 98 68 0
|
|
*/
|
|
|
|
/**
|
|
* 5 GHz gain table
|
|
*
|
|
* Index Dsp gain Radio gain
|
|
* -9 123 0x3F (highest gain)
|
|
* -8 117 0x3F
|
|
* -7 110 0x3F
|
|
* -6 104 0x3F
|
|
* -5 98 0x3F
|
|
* -4 110 0x3E
|
|
* -3 104 0x3E
|
|
* -2 98 0x3E
|
|
* -1 110 0x3D
|
|
* 0 104 0x3D
|
|
* 1 98 0x3D
|
|
* 2 110 0x3C
|
|
* 3 104 0x3C
|
|
* 4 98 0x3C
|
|
* 5 110 0x3B
|
|
* 6 104 0x3B
|
|
* 7 98 0x3B
|
|
* 8 110 0x3A
|
|
* 9 104 0x3A
|
|
* 10 98 0x3A
|
|
* 11 110 0x39
|
|
* 12 104 0x39
|
|
* 13 98 0x39
|
|
* 14 110 0x38
|
|
* 15 104 0x38
|
|
* 16 98 0x38
|
|
* 17 110 0x37
|
|
* 18 104 0x37
|
|
* 19 98 0x37
|
|
* 20 110 0x36
|
|
* 21 104 0x36
|
|
* 22 98 0x36
|
|
* 23 110 0x35
|
|
* 24 104 0x35
|
|
* 25 98 0x35
|
|
* 26 110 0x34
|
|
* 27 104 0x34
|
|
* 28 98 0x34
|
|
* 29 110 0x33
|
|
* 30 104 0x33
|
|
* 31 98 0x33
|
|
* 32 110 0x32
|
|
* 33 104 0x32
|
|
* 34 98 0x32
|
|
* 35 110 0x31
|
|
* 36 104 0x31
|
|
* 37 98 0x31
|
|
* 38 110 0x30
|
|
* 39 104 0x30
|
|
* 40 98 0x30
|
|
* 41 110 0x25
|
|
* 42 104 0x25
|
|
* 43 98 0x25
|
|
* 44 110 0x24
|
|
* 45 104 0x24
|
|
* 46 98 0x24
|
|
* 47 110 0x23
|
|
* 48 104 0x23
|
|
* 49 98 0x23
|
|
* 50 110 0x22
|
|
* 51 104 0x18
|
|
* 52 98 0x18
|
|
* 53 110 0x17
|
|
* 54 104 0x17
|
|
* 55 98 0x17
|
|
* 56 110 0x16
|
|
* 57 104 0x16
|
|
* 58 98 0x16
|
|
* 59 110 0x15
|
|
* 60 104 0x15
|
|
* 61 98 0x15
|
|
* 62 110 0x14
|
|
* 63 104 0x14
|
|
* 64 98 0x14
|
|
* 65 110 0x13
|
|
* 66 104 0x13
|
|
* 67 98 0x13
|
|
* 68 110 0x12
|
|
* 69 104 0x08
|
|
* 70 98 0x08
|
|
* 71 110 0x07
|
|
* 72 104 0x07
|
|
* 73 98 0x07
|
|
* 74 110 0x06
|
|
* 75 104 0x06
|
|
* 76 98 0x06
|
|
* 77 110 0x05
|
|
* 78 104 0x05
|
|
* 79 98 0x05
|
|
* 80 110 0x04
|
|
* 81 104 0x04
|
|
* 82 98 0x04
|
|
* 83 110 0x03
|
|
* 84 104 0x03
|
|
* 85 98 0x03
|
|
* 86 110 0x02
|
|
* 87 104 0x02
|
|
* 88 98 0x02
|
|
* 89 110 0x01
|
|
* 90 104 0x01
|
|
* 91 98 0x01
|
|
* 92 110 0x00
|
|
* 93 104 0x00
|
|
* 94 98 0x00
|
|
* 95 93 0x00
|
|
* 96 88 0x00
|
|
* 97 83 0x00
|
|
* 98 78 0x00
|
|
*/
|
|
|
|
|
|
/**
|
|
* Sanity checks and default values for EEPROM regulatory levels.
|
|
* If EEPROM values fall outside MIN/MAX range, use default values.
|
|
*
|
|
* Regulatory limits refer to the maximum average txpower allowed by
|
|
* regulatory agencies in the geographies in which the device is meant
|
|
* to be operated. These limits are SKU-specific (i.e. geography-specific),
|
|
* and channel-specific; each channel has an individual regulatory limit
|
|
* listed in the EEPROM.
|
|
*
|
|
* Units are in half-dBm (i.e. "34" means 17 dBm).
|
|
*/
|
|
#define IWL_TX_POWER_DEFAULT_REGULATORY_24 (34)
|
|
#define IWL_TX_POWER_DEFAULT_REGULATORY_52 (34)
|
|
#define IWL_TX_POWER_REGULATORY_MIN (0)
|
|
#define IWL_TX_POWER_REGULATORY_MAX (34)
|
|
|
|
/**
|
|
* Sanity checks and default values for EEPROM saturation levels.
|
|
* If EEPROM values fall outside MIN/MAX range, use default values.
|
|
*
|
|
* Saturation is the highest level that the output power amplifier can produce
|
|
* without significant clipping distortion. This is a "peak" power level.
|
|
* Different types of modulation (i.e. various "rates", and OFDM vs. CCK)
|
|
* require differing amounts of backoff, relative to their average power output,
|
|
* in order to avoid clipping distortion.
|
|
*
|
|
* Driver must make sure that it is violating neither the saturation limit,
|
|
* nor the regulatory limit, when calculating Tx power settings for various
|
|
* rates.
|
|
*
|
|
* Units are in half-dBm (i.e. "38" means 19 dBm).
|
|
*/
|
|
#define IWL_TX_POWER_DEFAULT_SATURATION_24 (38)
|
|
#define IWL_TX_POWER_DEFAULT_SATURATION_52 (38)
|
|
#define IWL_TX_POWER_SATURATION_MIN (20)
|
|
#define IWL_TX_POWER_SATURATION_MAX (50)
|
|
|
|
/**
|
|
* Channel groups used for Tx Attenuation calibration (MIMO tx channel balance)
|
|
* and thermal Txpower calibration.
|
|
*
|
|
* When calculating txpower, driver must compensate for current device
|
|
* temperature; higher temperature requires higher gain. Driver must calculate
|
|
* current temperature (see "4965 temperature calculation"), then compare vs.
|
|
* factory calibration temperature in EEPROM; if current temperature is higher
|
|
* than factory temperature, driver must *increase* gain by proportions shown
|
|
* in table below. If current temperature is lower than factory, driver must
|
|
* *decrease* gain.
|
|
*
|
|
* Different frequency ranges require different compensation, as shown below.
|
|
*/
|
|
/* Group 0, 5.2 GHz ch 34-43: 4.5 degrees per 1/2 dB. */
|
|
#define CALIB_IWL_TX_ATTEN_GR1_FCH 34
|
|
#define CALIB_IWL_TX_ATTEN_GR1_LCH 43
|
|
|
|
/* Group 1, 5.3 GHz ch 44-70: 4.0 degrees per 1/2 dB. */
|
|
#define CALIB_IWL_TX_ATTEN_GR2_FCH 44
|
|
#define CALIB_IWL_TX_ATTEN_GR2_LCH 70
|
|
|
|
/* Group 2, 5.5 GHz ch 71-124: 4.0 degrees per 1/2 dB. */
|
|
#define CALIB_IWL_TX_ATTEN_GR3_FCH 71
|
|
#define CALIB_IWL_TX_ATTEN_GR3_LCH 124
|
|
|
|
/* Group 3, 5.7 GHz ch 125-200: 4.0 degrees per 1/2 dB. */
|
|
#define CALIB_IWL_TX_ATTEN_GR4_FCH 125
|
|
#define CALIB_IWL_TX_ATTEN_GR4_LCH 200
|
|
|
|
/* Group 4, 2.4 GHz all channels: 3.5 degrees per 1/2 dB. */
|
|
#define CALIB_IWL_TX_ATTEN_GR5_FCH 1
|
|
#define CALIB_IWL_TX_ATTEN_GR5_LCH 20
|
|
|
|
enum {
|
|
CALIB_CH_GROUP_1 = 0,
|
|
CALIB_CH_GROUP_2 = 1,
|
|
CALIB_CH_GROUP_3 = 2,
|
|
CALIB_CH_GROUP_4 = 3,
|
|
CALIB_CH_GROUP_5 = 4,
|
|
CALIB_CH_GROUP_MAX
|
|
};
|
|
|
|
/********************* END TXPOWER *****************************************/
|
|
|
|
|
|
/**
|
|
* Tx/Rx Queues
|
|
*
|
|
* Most communication between driver and 4965 is via queues of data buffers.
|
|
* For example, all commands that the driver issues to device's embedded
|
|
* controller (uCode) are via the command queue (one of the Tx queues). All
|
|
* uCode command responses/replies/notifications, including Rx frames, are
|
|
* conveyed from uCode to driver via the Rx queue.
|
|
*
|
|
* Most support for these queues, including handshake support, resides in
|
|
* structures in host DRAM, shared between the driver and the device. When
|
|
* allocating this memory, the driver must make sure that data written by
|
|
* the host CPU updates DRAM immediately (and does not get "stuck" in CPU's
|
|
* cache memory), so DRAM and cache are consistent, and the device can
|
|
* immediately see changes made by the driver.
|
|
*
|
|
* 4965 supports up to 16 DRAM-based Tx queues, and services these queues via
|
|
* up to 7 DMA channels (FIFOs). Each Tx queue is supported by a circular array
|
|
* in DRAM containing 256 Transmit Frame Descriptors (TFDs).
|
|
*/
|
|
#define IWL49_MAX_WIN_SIZE 64
|
|
#define IWL49_QUEUE_SIZE 256
|
|
#define IWL49_NUM_FIFOS 7
|
|
#define IWL49_CMD_FIFO_NUM 4
|
|
#define IWL49_NUM_QUEUES 16
|
|
|
|
/**
|
|
* struct iwl_tfd_frame_data
|
|
*
|
|
* Describes up to 2 buffers containing (contiguous) portions of a Tx frame.
|
|
* Each buffer must be on dword boundary.
|
|
* Up to 10 iwl_tfd_frame_data structures, describing up to 20 buffers,
|
|
* may be filled within a TFD (iwl_tfd_frame).
|
|
*
|
|
* Bit fields in tb1_addr:
|
|
* 31- 0: Tx buffer 1 address bits [31:0]
|
|
*
|
|
* Bit fields in val1:
|
|
* 31-16: Tx buffer 2 address bits [15:0]
|
|
* 15- 4: Tx buffer 1 length (bytes)
|
|
* 3- 0: Tx buffer 1 address bits [32:32]
|
|
*
|
|
* Bit fields in val2:
|
|
* 31-20: Tx buffer 2 length (bytes)
|
|
* 19- 0: Tx buffer 2 address bits [35:16]
|
|
*/
|
|
struct iwl_tfd_frame_data {
|
|
__le32 tb1_addr;
|
|
|
|
__le32 val1;
|
|
/* __le32 ptb1_32_35:4; */
|
|
#define IWL_tb1_addr_hi_POS 0
|
|
#define IWL_tb1_addr_hi_LEN 4
|
|
#define IWL_tb1_addr_hi_SYM val1
|
|
/* __le32 tb_len1:12; */
|
|
#define IWL_tb1_len_POS 4
|
|
#define IWL_tb1_len_LEN 12
|
|
#define IWL_tb1_len_SYM val1
|
|
/* __le32 ptb2_0_15:16; */
|
|
#define IWL_tb2_addr_lo16_POS 16
|
|
#define IWL_tb2_addr_lo16_LEN 16
|
|
#define IWL_tb2_addr_lo16_SYM val1
|
|
|
|
__le32 val2;
|
|
/* __le32 ptb2_16_35:20; */
|
|
#define IWL_tb2_addr_hi20_POS 0
|
|
#define IWL_tb2_addr_hi20_LEN 20
|
|
#define IWL_tb2_addr_hi20_SYM val2
|
|
/* __le32 tb_len2:12; */
|
|
#define IWL_tb2_len_POS 20
|
|
#define IWL_tb2_len_LEN 12
|
|
#define IWL_tb2_len_SYM val2
|
|
} __attribute__ ((packed));
|
|
|
|
|
|
/**
|
|
* struct iwl_tfd_frame
|
|
*
|
|
* Transmit Frame Descriptor (TFD)
|
|
*
|
|
* 4965 supports up to 16 Tx queues resident in host DRAM.
|
|
* Each Tx queue uses a circular buffer of 256 TFDs stored in host DRAM.
|
|
* Both driver and device share these circular buffers, each of which must be
|
|
* contiguous 256 TFDs x 128 bytes-per-TFD = 32 KBytes for 4965.
|
|
*
|
|
* Driver must indicate the physical address of the base of each
|
|
* circular buffer via the 4965's FH_MEM_CBBC_QUEUE registers.
|
|
*
|
|
* Each TFD contains pointer/size information for up to 20 data buffers
|
|
* in host DRAM. These buffers collectively contain the (one) frame described
|
|
* by the TFD. Each buffer must be a single contiguous block of memory within
|
|
* itself, but buffers may be scattered in host DRAM. Each buffer has max size
|
|
* of (4K - 4). The 4965 concatenates all of a TFD's buffers into a single
|
|
* Tx frame, up to 8 KBytes in size.
|
|
*
|
|
* Bit fields in the control dword (val0):
|
|
* 31-30: # dwords (0-3) of padding required at end of frame for 16-byte bound
|
|
* 29: reserved
|
|
* 28-24: # Transmit Buffer Descriptors in TFD
|
|
* 23- 0: reserved
|
|
*
|
|
* A maximum of 255 (not 256!) TFDs may be on a queue waiting for Tx.
|
|
*/
|
|
struct iwl_tfd_frame {
|
|
__le32 val0;
|
|
/* __le32 rsvd1:24; */
|
|
/* __le32 num_tbs:5; */
|
|
#define IWL_num_tbs_POS 24
|
|
#define IWL_num_tbs_LEN 5
|
|
#define IWL_num_tbs_SYM val0
|
|
/* __le32 rsvd2:1; */
|
|
/* __le32 padding:2; */
|
|
struct iwl_tfd_frame_data pa[10];
|
|
__le32 reserved;
|
|
} __attribute__ ((packed));
|
|
|
|
|
|
/**
|
|
* struct iwl4965_queue_byte_cnt_entry
|
|
*
|
|
* Byte Count Table Entry
|
|
*
|
|
* Bit fields:
|
|
* 15-12: reserved
|
|
* 11- 0: total to-be-transmitted byte count of frame (does not include command)
|
|
*/
|
|
struct iwl4965_queue_byte_cnt_entry {
|
|
__le16 val;
|
|
/* __le16 byte_cnt:12; */
|
|
#define IWL_byte_cnt_POS 0
|
|
#define IWL_byte_cnt_LEN 12
|
|
#define IWL_byte_cnt_SYM val
|
|
/* __le16 rsvd:4; */
|
|
} __attribute__ ((packed));
|
|
|
|
|
|
/**
|
|
* struct iwl4965_sched_queue_byte_cnt_tbl
|
|
*
|
|
* Byte Count table
|
|
*
|
|
* Each Tx queue uses a byte-count table containing 320 entries:
|
|
* one 16-bit entry for each of 256 TFDs, plus an additional 64 entries that
|
|
* duplicate the first 64 entries (to avoid wrap-around within a Tx window;
|
|
* max Tx window is 64 TFDs).
|
|
*
|
|
* When driver sets up a new TFD, it must also enter the total byte count
|
|
* of the frame to be transmitted into the corresponding entry in the byte
|
|
* count table for the chosen Tx queue. If the TFD index is 0-63, the driver
|
|
* must duplicate the byte count entry in corresponding index 256-319.
|
|
*
|
|
* "dont_care" padding puts each byte count table on a 1024-byte boundary;
|
|
* 4965 assumes tables are separated by 1024 bytes.
|
|
*/
|
|
struct iwl4965_sched_queue_byte_cnt_tbl {
|
|
struct iwl4965_queue_byte_cnt_entry tfd_offset[IWL49_QUEUE_SIZE +
|
|
IWL49_MAX_WIN_SIZE];
|
|
u8 dont_care[1024 -
|
|
(IWL49_QUEUE_SIZE + IWL49_MAX_WIN_SIZE) *
|
|
sizeof(__le16)];
|
|
} __attribute__ ((packed));
|
|
|
|
|
|
/**
|
|
* struct iwl4965_shared - handshake area for Tx and Rx
|
|
*
|
|
* For convenience in allocating memory, this structure combines 2 areas of
|
|
* DRAM which must be shared between driver and 4965. These do not need to
|
|
* be combined, if better allocation would result from keeping them separate:
|
|
*
|
|
* 1) The Tx byte count tables occupy 1024 bytes each (16 KBytes total for
|
|
* 16 queues). Driver uses SCD_DRAM_BASE_ADDR to tell 4965 where to find
|
|
* the first of these tables. 4965 assumes tables are 1024 bytes apart.
|
|
*
|
|
* 2) The Rx status (val0 and val1) occupies only 8 bytes. Driver uses
|
|
* FH_RSCSR_CHNL0_STTS_WPTR_REG to tell 4965 where to find this area.
|
|
* Driver reads val0 to determine the latest Receive Buffer Descriptor (RBD)
|
|
* that has been filled by the 4965.
|
|
*
|
|
* Bit fields val0:
|
|
* 31-12: Not used
|
|
* 11- 0: Index of last filled Rx buffer descriptor (4965 writes, driver reads)
|
|
*
|
|
* Bit fields val1:
|
|
* 31- 0: Not used
|
|
*/
|
|
struct iwl4965_shared {
|
|
struct iwl4965_sched_queue_byte_cnt_tbl
|
|
queues_byte_cnt_tbls[IWL49_NUM_QUEUES];
|
|
__le32 rb_closed;
|
|
|
|
/* __le32 rb_closed_stts_rb_num:12; */
|
|
#define IWL_rb_closed_stts_rb_num_POS 0
|
|
#define IWL_rb_closed_stts_rb_num_LEN 12
|
|
#define IWL_rb_closed_stts_rb_num_SYM rb_closed
|
|
/* __le32 rsrv1:4; */
|
|
/* __le32 rb_closed_stts_rx_frame_num:12; */
|
|
#define IWL_rb_closed_stts_rx_frame_num_POS 16
|
|
#define IWL_rb_closed_stts_rx_frame_num_LEN 12
|
|
#define IWL_rb_closed_stts_rx_frame_num_SYM rb_closed
|
|
/* __le32 rsrv2:4; */
|
|
|
|
__le32 frm_finished;
|
|
/* __le32 frame_finished_stts_rb_num:12; */
|
|
#define IWL_frame_finished_stts_rb_num_POS 0
|
|
#define IWL_frame_finished_stts_rb_num_LEN 12
|
|
#define IWL_frame_finished_stts_rb_num_SYM frm_finished
|
|
/* __le32 rsrv3:4; */
|
|
/* __le32 frame_finished_stts_rx_frame_num:12; */
|
|
#define IWL_frame_finished_stts_rx_frame_num_POS 16
|
|
#define IWL_frame_finished_stts_rx_frame_num_LEN 12
|
|
#define IWL_frame_finished_stts_rx_frame_num_SYM frm_finished
|
|
/* __le32 rsrv4:4; */
|
|
|
|
__le32 padding1; /* so that allocation will be aligned to 16B */
|
|
__le32 padding2;
|
|
} __attribute__ ((packed));
|
|
|
|
#endif /* __iwl4965_4965_hw_h__ */
|