a09e64fbc0
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
200 lines
6.8 KiB
C
200 lines
6.8 KiB
C
/* arch/arm/mach-lh7a40x/include/mach/irqs.h
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*
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* Copyright (C) 2004 Coastal Environmental Systems
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* Copyright (C) 2004 Logic Product Development
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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*/
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/* It is to be seen whether or not we can build a kernel for more than
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* one board. For the time being, these macros assume that we cannot.
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* Thus, it is OK to ifdef machine/board specific IRQ assignments.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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#define FIQ_START 80
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#if defined (CONFIG_ARCH_LH7A400)
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/* FIQs */
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# define IRQ_GPIO0FIQ 0 /* GPIO External FIQ Interrupt on F0 */
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# define IRQ_BLINT 1 /* Battery Low */
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# define IRQ_WEINT 2 /* Watchdog Timer, WDT overflow */
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# define IRQ_MCINT 3 /* Media Change, MEDCHG pin rising */
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/* IRQs */
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# define IRQ_CSINT 4 /* Audio Codec (ACI) */
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# define IRQ_GPIO1INTR 5 /* GPIO External IRQ Interrupt on F1 */
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# define IRQ_GPIO2INTR 6 /* GPIO External IRQ Interrupt on F2 */
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# define IRQ_GPIO3INTR 7 /* GPIO External IRQ Interrupt on F3 */
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# define IRQ_T1UI 8 /* Timer 1 underflow */
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# define IRQ_T2UI 9 /* Timer 2 underflow */
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# define IRQ_RTCMI 10
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# define IRQ_TINTR 11 /* Clock State Controller 64 Hz tick (CSC) */
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# define IRQ_UART1INTR 12
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# define IRQ_UART2INTR 13
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# define IRQ_LCDINTR 14
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# define IRQ_SSIEOT 15 /* Synchronous Serial Interface (SSI) */
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# define IRQ_UART3INTR 16
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# define IRQ_SCIINTR 17 /* Smart Card Interface (SCI) */
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# define IRQ_AACINTR 18 /* Advanced Audio Codec (AAC) */
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# define IRQ_MMCINTR 19 /* Multimedia Card (MMC) */
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# define IRQ_USBINTR 20
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# define IRQ_DMAINTR 21
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# define IRQ_T3UI 22 /* Timer 3 underflow */
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# define IRQ_GPIO4INTR 23 /* GPIO External IRQ Interrupt on F4 */
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# define IRQ_GPIO5INTR 24 /* GPIO External IRQ Interrupt on F5 */
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# define IRQ_GPIO6INTR 25 /* GPIO External IRQ Interrupt on F6 */
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# define IRQ_GPIO7INTR 26 /* GPIO External IRQ Interrupt on F7 */
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# define IRQ_BMIINTR 27 /* Battery Monitor Interface (BMI) */
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# define NR_IRQ_CPU 28 /* IRQs directly recognized by CPU */
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/* Given IRQ, return GPIO interrupt number 0-7 */
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# define IRQ_TO_GPIO(i) ((i) \
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- (((i) > IRQ_GPIO3INTR) ? IRQ_GPIO4INTR - IRQ_GPIO3INTR - 1 : 0)\
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- (((i) > IRQ_GPIO0INTR) ? IRQ_GPIO1INTR - IRQ_GPIO0INTR - 1 : 0))
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#endif
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#if defined (CONFIG_ARCH_LH7A404)
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# define IRQ_BROWN 0 /* Brownout */
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# define IRQ_WDTINTR 1 /* Watchdog Timer */
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# define IRQ_COMMRX 2 /* ARM Comm Rx for Debug */
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# define IRQ_COMMTX 3 /* ARM Comm Tx for Debug */
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# define IRQ_T1UI 4 /* Timer 1 underflow */
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# define IRQ_T2UI 5 /* Timer 2 underflow */
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# define IRQ_CSINT 6 /* Codec Interrupt (shared by AAC on 404) */
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# define IRQ_DMAM2P0 7 /* -- DMA Memory to Peripheral */
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# define IRQ_DMAM2P1 8
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# define IRQ_DMAM2P2 9
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# define IRQ_DMAM2P3 10
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# define IRQ_DMAM2P4 11
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# define IRQ_DMAM2P5 12
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# define IRQ_DMAM2P6 13
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# define IRQ_DMAM2P7 14
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# define IRQ_DMAM2P8 15
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# define IRQ_DMAM2P9 16
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# define IRQ_DMAM2M0 17 /* -- DMA Memory to Memory */
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# define IRQ_DMAM2M1 18
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# define IRQ_GPIO0INTR 19 /* -- GPIOF Interrupt */
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# define IRQ_GPIO1INTR 20
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# define IRQ_GPIO2INTR 21
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# define IRQ_GPIO3INTR 22
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# define IRQ_SOFT_V1_23 23 /* -- Unassigned */
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# define IRQ_SOFT_V1_24 24
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# define IRQ_SOFT_V1_25 25
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# define IRQ_SOFT_V1_26 26
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# define IRQ_SOFT_V1_27 27
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# define IRQ_SOFT_V1_28 28
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# define IRQ_SOFT_V1_29 29
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# define IRQ_SOFT_V1_30 30
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# define IRQ_SOFT_V1_31 31
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# define IRQ_BLINT 32 /* Battery Low */
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# define IRQ_BMIINTR 33 /* Battery Monitor */
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# define IRQ_MCINTR 34 /* Media Change */
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# define IRQ_TINTR 35 /* 64Hz Tick */
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# define IRQ_WEINT 36 /* Watchdog Expired */
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# define IRQ_RTCMI 37 /* Real-time Clock Match */
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# define IRQ_UART1INTR 38 /* UART1 Interrupt (including error) */
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# define IRQ_UART1ERR 39 /* UART1 Error */
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# define IRQ_UART2INTR 40 /* UART2 Interrupt (including error) */
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# define IRQ_UART2ERR 41 /* UART2 Error */
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# define IRQ_UART3INTR 42 /* UART3 Interrupt (including error) */
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# define IRQ_UART3ERR 43 /* UART3 Error */
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# define IRQ_SCIINTR 44 /* Smart Card */
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# define IRQ_TSCINTR 45 /* Touchscreen */
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# define IRQ_KMIINTR 46 /* Keyboard/Mouse (PS/2) */
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# define IRQ_GPIO4INTR 47 /* -- GPIOF Interrupt */
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# define IRQ_GPIO5INTR 48
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# define IRQ_GPIO6INTR 49
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# define IRQ_GPIO7INTR 50
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# define IRQ_T3UI 51 /* Timer 3 underflow */
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# define IRQ_LCDINTR 52 /* LCD Controller */
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# define IRQ_SSPINTR 53 /* Synchronous Serial Port */
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# define IRQ_SDINTR 54 /* Secure Digital Port (MMC) */
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# define IRQ_USBINTR 55 /* USB Device Port */
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# define IRQ_USHINTR 56 /* USB Host Port */
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# define IRQ_SOFT_V2_25 57 /* -- Unassigned */
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# define IRQ_SOFT_V2_26 58
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# define IRQ_SOFT_V2_27 59
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# define IRQ_SOFT_V2_28 60
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# define IRQ_SOFT_V2_29 61
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# define IRQ_SOFT_V2_30 62
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# define IRQ_SOFT_V2_31 63
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# define NR_IRQ_CPU 64 /* IRQs directly recognized by CPU */
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/* Given IRQ, return GPIO interrupt number 0-7 */
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# define IRQ_TO_GPIO(i) ((i) \
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- (((i) > IRQ_GPIO3INTR) ? IRQ_GPIO4INTR - IRQ_GPIO3INTR - 1 : 0)\
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- IRQ_GPIO0INTR)
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/* Vector Address constants */
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# define VA_VECTORED 0x100 /* Set for vectored interrupt */
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# define VA_VIC1DEFAULT 0x200 /* Set as default VECTADDR for VIC1 */
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# define VA_VIC2DEFAULT 0x400 /* Set as default VECTADDR for VIC2 */
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#endif
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/* IRQ aliases */
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#if !defined (IRQ_GPIO0INTR)
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# define IRQ_GPIO0INTR IRQ_GPIO0FIQ
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#endif
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#define IRQ_TICK IRQ_TINTR
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#define IRQ_PCC1_RDY IRQ_GPIO6INTR /* PCCard 1 ready */
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#define IRQ_PCC2_RDY IRQ_GPIO7INTR /* PCCard 2 ready */
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#define IRQ_USB IRQ_USBINTR /* USB device */
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#ifdef CONFIG_MACH_KEV7A400
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# define IRQ_TS IRQ_GPIOFIQ /* Touchscreen */
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# define IRQ_CPLD IRQ_GPIO1INTR /* CPLD cascade */
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# define IRQ_PCC1_CD IRQ_GPIO_F2 /* PCCard 1 card detect */
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# define IRQ_PCC2_CD IRQ_GPIO_F3 /* PCCard 2 card detect */
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#endif
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#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404)
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# define IRQ_CPLD_V28 IRQ_GPIO7INTR /* CPLD cascade through GPIO_PF7 */
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# define IRQ_CPLD_V34 IRQ_GPIO3INTR /* CPLD cascade through GPIO_PF3 */
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#endif
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/* System specific IRQs */
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#define IRQ_BOARD_START NR_IRQ_CPU
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#ifdef CONFIG_MACH_KEV7A400
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# define IRQ_KEV7A400_CPLD IRQ_BOARD_START
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# define NR_IRQ_BOARD 5
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# define IRQ_KEV7A400_MMC_CD IRQ_KEV7A400_CPLD + 0 /* MMC Card Detect */
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# define IRQ_KEV7A400_RI2 IRQ_KEV7A400_CPLD + 1 /* Ring Indicator 2 */
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# define IRQ_KEV7A400_IDE_CF IRQ_KEV7A400_CPLD + 2 /* Compact Flash (?) */
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# define IRQ_KEV7A400_ETH_INT IRQ_KEV7A400_CPLD + 3 /* Ethernet chip */
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# define IRQ_KEV7A400_INT IRQ_KEV7A400_CPLD + 4
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#endif
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#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404)
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# define IRQ_LPD7A40X_CPLD IRQ_BOARD_START
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# define NR_IRQ_BOARD 2
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# define IRQ_LPD7A40X_ETH_INT IRQ_LPD7A40X_CPLD + 0 /* Ethernet chip */
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# define IRQ_LPD7A400_TS IRQ_LPD7A40X_CPLD + 1 /* Touch screen */
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#endif
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#if defined (CONFIG_MACH_LPD7A400)
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# define IRQ_TOUCH IRQ_LPD7A400_TS
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#endif
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#define NR_IRQS (NR_IRQ_CPU + NR_IRQ_BOARD)
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#endif
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