c430131a02
The two first HC capability registers (CAPLENGTH and HCIVERSION) are defined as one 8-bit and one 16-bit register. Most HC implementations have selected to treat these registers as part of a 32-bit register, giving the same layout for both big and small endian systems. This patch adds a new quirk, big_endian_capbase, to support controllers with big endian register interfaces that treat HCIVERSION and CAPLENGTH as individual registers. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
265 lines
6.2 KiB
C
265 lines
6.2 KiB
C
/* ehci-msm.c - HSUSB Host Controller Driver Implementation
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*
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* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
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*
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* Partly derived from ehci-fsl.c and ehci-hcd.c
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* Copyright (c) 2000-2004 by David Brownell
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* Copyright (c) 2005 MontaVista Software
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*
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* All source code in this file is licensed under the following license except
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* where indicated.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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* See the GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you can find it at http://www.fsf.org
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*/
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/pm_runtime.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/msm_hsusb_hw.h>
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#define MSM_USB_BASE (hcd->regs)
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static struct otg_transceiver *otg;
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static int ehci_msm_reset(struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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int retval;
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ehci->caps = USB_CAPLENGTH;
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ehci->regs = USB_CAPLENGTH +
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HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
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dbg_hcs_params(ehci, "reset");
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dbg_hcc_params(ehci, "reset");
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/* cache the data to minimize the chip reads*/
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ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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hcd->has_tt = 1;
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ehci->sbrn = HCD_USB2;
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retval = ehci_halt(ehci);
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if (retval)
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return retval;
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/* data structure init */
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retval = ehci_init(hcd);
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if (retval)
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return retval;
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retval = ehci_reset(ehci);
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if (retval)
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return retval;
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/* bursts of unspecified length. */
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writel(0, USB_AHBBURST);
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/* Use the AHB transactor */
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writel(0, USB_AHBMODE);
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/* Disable streaming mode and select host mode */
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writel(0x13, USB_USBMODE);
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ehci_port_power(ehci, 1);
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return 0;
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}
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static struct hc_driver msm_hc_driver = {
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.description = hcd_name,
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.product_desc = "Qualcomm On-Chip EHCI Host Controller",
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.hcd_priv_size = sizeof(struct ehci_hcd),
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/*
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* generic hardware linkage
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*/
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.irq = ehci_irq,
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.flags = HCD_USB2 | HCD_MEMORY,
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.reset = ehci_msm_reset,
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.start = ehci_run,
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.stop = ehci_stop,
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.shutdown = ehci_shutdown,
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/*
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* managing i/o requests and associated device resources
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*/
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.urb_enqueue = ehci_urb_enqueue,
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.urb_dequeue = ehci_urb_dequeue,
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.endpoint_disable = ehci_endpoint_disable,
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.endpoint_reset = ehci_endpoint_reset,
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.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
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/*
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* scheduling support
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*/
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.get_frame_number = ehci_get_frame,
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/*
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* root hub support
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*/
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.hub_status_data = ehci_hub_status_data,
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.hub_control = ehci_hub_control,
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.relinquish_port = ehci_relinquish_port,
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.port_handed_over = ehci_port_handed_over,
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/*
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* PM support
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*/
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.bus_suspend = ehci_bus_suspend,
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.bus_resume = ehci_bus_resume,
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};
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static int ehci_msm_probe(struct platform_device *pdev)
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{
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struct usb_hcd *hcd;
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struct resource *res;
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int ret;
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dev_dbg(&pdev->dev, "ehci_msm proble\n");
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hcd = usb_create_hcd(&msm_hc_driver, &pdev->dev, dev_name(&pdev->dev));
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if (!hcd) {
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dev_err(&pdev->dev, "Unable to create HCD\n");
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return -ENOMEM;
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}
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hcd->irq = platform_get_irq(pdev, 0);
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if (hcd->irq < 0) {
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dev_err(&pdev->dev, "Unable to get IRQ resource\n");
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ret = hcd->irq;
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goto put_hcd;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "Unable to get memory resource\n");
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ret = -ENODEV;
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goto put_hcd;
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}
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hcd->rsrc_start = res->start;
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hcd->rsrc_len = resource_size(res);
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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if (!hcd->regs) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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goto put_hcd;
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}
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/*
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* OTG driver takes care of PHY initialization, clock management,
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* powering up VBUS, mapping of registers address space and power
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* management.
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*/
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otg = otg_get_transceiver();
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if (!otg) {
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dev_err(&pdev->dev, "unable to find transceiver\n");
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ret = -ENODEV;
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goto unmap;
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}
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ret = otg_set_host(otg, &hcd->self);
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if (ret < 0) {
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dev_err(&pdev->dev, "unable to register with transceiver\n");
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goto put_transceiver;
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}
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device_init_wakeup(&pdev->dev, 1);
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/*
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* OTG device parent of HCD takes care of putting
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* hardware into low power mode.
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*/
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pm_runtime_no_callbacks(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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return 0;
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put_transceiver:
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otg_put_transceiver(otg);
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unmap:
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iounmap(hcd->regs);
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put_hcd:
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usb_put_hcd(hcd);
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return ret;
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}
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static int __devexit ehci_msm_remove(struct platform_device *pdev)
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{
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struct usb_hcd *hcd = platform_get_drvdata(pdev);
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device_init_wakeup(&pdev->dev, 0);
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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otg_set_host(otg, NULL);
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otg_put_transceiver(otg);
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usb_put_hcd(hcd);
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return 0;
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}
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#ifdef CONFIG_PM
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static int ehci_msm_pm_suspend(struct device *dev)
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{
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struct usb_hcd *hcd = dev_get_drvdata(dev);
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bool wakeup = device_may_wakeup(dev);
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dev_dbg(dev, "ehci-msm PM suspend\n");
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/*
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* EHCI helper function has also the same check before manipulating
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* port wakeup flags. We do check here the same condition before
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* calling the same helper function to avoid bringing hardware
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* from Low power mode when there is no need for adjusting port
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* wakeup flags.
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*/
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if (hcd->self.root_hub->do_remote_wakeup && !wakeup) {
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pm_runtime_resume(dev);
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ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
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wakeup);
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}
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return 0;
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}
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static int ehci_msm_pm_resume(struct device *dev)
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{
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struct usb_hcd *hcd = dev_get_drvdata(dev);
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dev_dbg(dev, "ehci-msm PM resume\n");
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ehci_prepare_ports_for_controller_resume(hcd_to_ehci(hcd));
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return 0;
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}
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#else
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#define ehci_msm_pm_suspend NULL
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#define ehci_msm_pm_resume NULL
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#endif
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static const struct dev_pm_ops ehci_msm_dev_pm_ops = {
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.suspend = ehci_msm_pm_suspend,
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.resume = ehci_msm_pm_resume,
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};
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static struct platform_driver ehci_msm_driver = {
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.probe = ehci_msm_probe,
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.remove = __devexit_p(ehci_msm_remove),
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.driver = {
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.name = "msm_hsusb_host",
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.pm = &ehci_msm_dev_pm_ops,
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},
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};
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