4a858cfc9a
After all sysdev classes are ported to regular driver core entities, the sysdev implementation will be entirely removed from the kernel. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Lucas De Marchi <lucas.demarchi@profusion.mobi> Cc: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
177 lines
4.1 KiB
C
177 lines
4.1 KiB
C
/* linux/arch/arm/mach-s5pv210/pm.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* S5PV210 - Power Management support
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*
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* Based on arch/arm/mach-s3c2410/pm.c
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/suspend.h>
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#include <linux/syscore_ops.h>
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#include <linux/io.h>
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#include <plat/cpu.h>
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#include <plat/pm.h>
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#include <plat/regs-timer.h>
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#include <mach/regs-irq.h>
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#include <mach/regs-clock.h>
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static struct sleep_save s5pv210_core_save[] = {
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/* Clock source */
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SAVE_ITEM(S5P_CLK_SRC0),
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SAVE_ITEM(S5P_CLK_SRC1),
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SAVE_ITEM(S5P_CLK_SRC2),
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SAVE_ITEM(S5P_CLK_SRC3),
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SAVE_ITEM(S5P_CLK_SRC4),
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SAVE_ITEM(S5P_CLK_SRC5),
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SAVE_ITEM(S5P_CLK_SRC6),
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/* Clock source Mask */
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SAVE_ITEM(S5P_CLK_SRC_MASK0),
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SAVE_ITEM(S5P_CLK_SRC_MASK1),
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/* Clock Divider */
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SAVE_ITEM(S5P_CLK_DIV0),
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SAVE_ITEM(S5P_CLK_DIV1),
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SAVE_ITEM(S5P_CLK_DIV2),
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SAVE_ITEM(S5P_CLK_DIV3),
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SAVE_ITEM(S5P_CLK_DIV4),
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SAVE_ITEM(S5P_CLK_DIV5),
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SAVE_ITEM(S5P_CLK_DIV6),
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SAVE_ITEM(S5P_CLK_DIV7),
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/* Clock Main Gate */
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SAVE_ITEM(S5P_CLKGATE_MAIN0),
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SAVE_ITEM(S5P_CLKGATE_MAIN1),
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SAVE_ITEM(S5P_CLKGATE_MAIN2),
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/* Clock source Peri Gate */
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SAVE_ITEM(S5P_CLKGATE_PERI0),
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SAVE_ITEM(S5P_CLKGATE_PERI1),
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/* Clock source SCLK Gate */
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SAVE_ITEM(S5P_CLKGATE_SCLK0),
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SAVE_ITEM(S5P_CLKGATE_SCLK1),
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/* Clock IP Clock gate */
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SAVE_ITEM(S5P_CLKGATE_IP0),
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SAVE_ITEM(S5P_CLKGATE_IP1),
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SAVE_ITEM(S5P_CLKGATE_IP2),
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SAVE_ITEM(S5P_CLKGATE_IP3),
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SAVE_ITEM(S5P_CLKGATE_IP4),
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/* Clock Blcok and Bus gate */
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SAVE_ITEM(S5P_CLKGATE_BLOCK),
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SAVE_ITEM(S5P_CLKGATE_BUS0),
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/* Clock ETC */
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SAVE_ITEM(S5P_CLK_OUT),
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SAVE_ITEM(S5P_MDNIE_SEL),
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/* PWM Register */
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SAVE_ITEM(S3C2410_TCFG0),
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SAVE_ITEM(S3C2410_TCFG1),
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SAVE_ITEM(S3C64XX_TINT_CSTAT),
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SAVE_ITEM(S3C2410_TCON),
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SAVE_ITEM(S3C2410_TCNTB(0)),
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SAVE_ITEM(S3C2410_TCMPB(0)),
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SAVE_ITEM(S3C2410_TCNTO(0)),
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};
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static int s5pv210_cpu_suspend(unsigned long arg)
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{
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unsigned long tmp;
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/* issue the standby signal into the pm unit. Note, we
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* issue a write-buffer drain just in case */
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tmp = 0;
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asm("b 1f\n\t"
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".align 5\n\t"
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"1:\n\t"
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"mcr p15, 0, %0, c7, c10, 5\n\t"
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"mcr p15, 0, %0, c7, c10, 4\n\t"
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"wfi" : : "r" (tmp));
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/* we should never get past here */
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panic("sleep resumed to originator?");
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}
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static void s5pv210_pm_prepare(void)
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{
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unsigned int tmp;
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/* ensure at least INFORM0 has the resume address */
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__raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
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tmp = __raw_readl(S5P_SLEEP_CFG);
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tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
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__raw_writel(tmp, S5P_SLEEP_CFG);
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/* WFI for SLEEP mode configuration by SYSCON */
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tmp = __raw_readl(S5P_PWR_CFG);
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tmp &= S5P_CFG_WFI_CLEAN;
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tmp |= S5P_CFG_WFI_SLEEP;
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__raw_writel(tmp, S5P_PWR_CFG);
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/* SYSCON interrupt handling disable */
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tmp = __raw_readl(S5P_OTHERS);
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tmp |= S5P_OTHER_SYSC_INTOFF;
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__raw_writel(tmp, S5P_OTHERS);
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s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
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}
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static int s5pv210_pm_add(struct device *dev)
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{
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pm_cpu_prep = s5pv210_pm_prepare;
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pm_cpu_sleep = s5pv210_cpu_suspend;
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return 0;
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}
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static struct subsys_interface s5pv210_pm_interface = {
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.name = "s5pv210_pm",
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.subsys = &s5pv210_subsys,
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.add_dev = s5pv210_pm_add,
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};
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static __init int s5pv210_pm_drvinit(void)
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{
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return subsys_interface_register(&s5pv210_pm_interface);
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}
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arch_initcall(s5pv210_pm_drvinit);
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static void s5pv210_pm_resume(void)
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{
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u32 tmp;
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tmp = __raw_readl(S5P_OTHERS);
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tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\
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S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);
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__raw_writel(tmp , S5P_OTHERS);
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s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
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}
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static struct syscore_ops s5pv210_pm_syscore_ops = {
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.resume = s5pv210_pm_resume,
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};
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static __init int s5pv210_pm_syscore_init(void)
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{
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register_syscore_ops(&s5pv210_pm_syscore_ops);
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return 0;
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}
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arch_initcall(s5pv210_pm_syscore_init);
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