77606b136a
* refs/heads/tmp-bafa20f: Linux 4.19.60 x86/entry/32: Fix ENDPROC of common_spurious drm/udl: move to embedding drm device inside udl device. drm/udl: Replace drm_dev_unref with drm_dev_put drm/udl: introduce a macro to convert dev to udl. regmap-irq: do not write mask register if mask_base is zero crypto/NX: Set receive window credits to max number of CRBs in RxFIFO crypto: talitos - fix hash on SEC1. crypto: talitos - move struct talitos_edesc into talitos.h s390/qdio: don't touch the dsci in tiqdio_add_input_queues() s390/qdio: (re-)initialize tiqdio list entries s390: fix stfle zero padding ARC: hide unused function unw_hdr_alloc x86/irq: Seperate unused system vectors from spurious entry again x86/irq: Handle spurious interrupt after shutdown gracefully x86/ioapic: Implement irq_get_irqchip_state() callback genirq: Add optional hardware synchronization for shutdown genirq: Fix misleading synchronize_irq() documentation genirq: Delay deactivation in free_irq() linux/kernel.h: fix overflow for DIV_ROUND_UP_ULL pinctrl: mediatek: Update cur_mask in mask/mask ops cpu/hotplug: Fix out-of-bounds read when setting fail state pinctrl: mediatek: Ignore interrupts that are wake only during resume HID: multitouch: Add pointstick support for ALPS Touchpad HID: chicony: add another quirk for PixArt mouse x86/boot/64: Add missing fixup_pointer() for next_early_pgt access x86/boot/64: Fix crash if kernel image crosses page table boundary dm verity: use message limit for data block corruption message dm table: don't copy from a NULL pointer in realloc_argv() pinctrl: mcp23s08: Fix add_data and irqchip_add_nested call order ARM: dts: imx6ul: fix PWM[1-4] interrupts sis900: fix TX completion ppp: mppe: Add softdep to arc4 be2net: fix link failure after ethtool offline test x86/apic: Fix integer overflow on 10 bit left shift of cpu_khz afs: Fix uninitialised spinlock afs_volume::cb_break_lock ARM: omap2: remove incorrect __init annotation ARM: dts: gemini Fix up DNS-313 compatible string perf/core: Fix perf_sample_regs_user() mm check efi/bgrt: Drop BGRT status field reserved bits check clk: ti: clkctrl: Fix returning uninitialized data irqchip/gic-v3-its: Fix command queue pointer comparison bug firmware: improve LSM/IMA security behaviour drivers: base: cacheinfo: Ensure cpu hotplug work is done before Intel RDT nilfs2: do not use unexported cpu_to_le32()/le32_to_cpu() in uapi header Input: synaptics - enable SMBUS on T480 thinkpad trackpad e1000e: start network tx queue only when link is up Revert "e1000e: fix cyclic resets at link up with active tx" ANDROID: overlayfs: override_creds=off option bypass creator_cred (part deux) ANDROID: f2fs: add android fsync tracepoint ANDROID: f2fs: fix wrong android tracepoint Conflicts: include/linux/cpuhotplug.h Change-Id: I8bdec8958ec0a3212ef8a8872bf7b079b4781b3a Signed-off-by: Ivaylo Georgiev <irgeorgiev@codeaurora.org>
251 lines
7.4 KiB
C
251 lines
7.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Generic cpu hotunplug interrupt migration code copied from the
|
|
* arch/arm implementation
|
|
*
|
|
* Copyright (C) Russell King
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#include <linux/interrupt.h>
|
|
#include <linux/ratelimit.h>
|
|
#include <linux/irq.h>
|
|
#include <linux/cpumask.h>
|
|
|
|
#include "internals.h"
|
|
|
|
/* For !GENERIC_IRQ_EFFECTIVE_AFF_MASK this looks at general affinity mask */
|
|
static inline bool irq_needs_fixup(struct irq_data *d)
|
|
{
|
|
const struct cpumask *m = irq_data_get_effective_affinity_mask(d);
|
|
unsigned int cpu = smp_processor_id();
|
|
|
|
#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
|
|
/*
|
|
* The cpumask_empty() check is a workaround for interrupt chips,
|
|
* which do not implement effective affinity, but the architecture has
|
|
* enabled the config switch. Use the general affinity mask instead.
|
|
*/
|
|
if (cpumask_empty(m))
|
|
m = irq_data_get_affinity_mask(d);
|
|
|
|
/*
|
|
* Sanity check. If the mask is not empty when excluding the outgoing
|
|
* CPU then it must contain at least one online CPU. The outgoing CPU
|
|
* has been removed from the online mask already.
|
|
*/
|
|
if (cpumask_any_but(m, cpu) < nr_cpu_ids &&
|
|
cpumask_any_and(m, cpu_online_mask) >= nr_cpu_ids) {
|
|
/*
|
|
* If this happens then there was a missed IRQ fixup at some
|
|
* point. Warn about it and enforce fixup.
|
|
*/
|
|
pr_info("Eff. affinity %*pbl of IRQ %u contains only offline CPUs after offlining CPU %u\n",
|
|
cpumask_pr_args(m), d->irq, cpu);
|
|
return true;
|
|
}
|
|
#endif
|
|
return cpumask_test_cpu(cpu, m);
|
|
}
|
|
|
|
static bool migrate_one_irq(struct irq_desc *desc)
|
|
{
|
|
struct irq_data *d = irq_desc_get_irq_data(desc);
|
|
struct irq_chip *chip = irq_data_get_irq_chip(d);
|
|
bool maskchip = !irq_can_move_pcntxt(d) && !irqd_irq_masked(d);
|
|
const struct cpumask *affinity;
|
|
bool brokeaff = false;
|
|
int err;
|
|
struct cpumask available_cpus;
|
|
|
|
/*
|
|
* IRQ chip might be already torn down, but the irq descriptor is
|
|
* still in the radix tree. Also if the chip has no affinity setter,
|
|
* nothing can be done here.
|
|
*/
|
|
if (!chip || !chip->irq_set_affinity) {
|
|
pr_debug("IRQ %u: Unable to migrate away\n", d->irq);
|
|
return false;
|
|
}
|
|
|
|
/*
|
|
* No move required, if:
|
|
* - Interrupt is per cpu
|
|
* - Interrupt is not started
|
|
* - Affinity mask does not include this CPU.
|
|
*
|
|
* Note: Do not check desc->action as this might be a chained
|
|
* interrupt.
|
|
*/
|
|
if (irqd_is_per_cpu(d) || !irqd_is_started(d) || !irq_needs_fixup(d)) {
|
|
/*
|
|
* If an irq move is pending, abort it if the dying CPU is
|
|
* the sole target.
|
|
*/
|
|
irq_fixup_move_pending(desc, false);
|
|
return false;
|
|
}
|
|
|
|
/*
|
|
* Complete an eventually pending irq move cleanup. If this
|
|
* interrupt was moved in hard irq context, then the vectors need
|
|
* to be cleaned up. It can't wait until this interrupt actually
|
|
* happens and this CPU was involved.
|
|
*/
|
|
irq_force_complete_move(desc);
|
|
|
|
/*
|
|
* If there is a setaffinity pending, then try to reuse the pending
|
|
* mask, so the last change of the affinity does not get lost. If
|
|
* there is no move pending or the pending mask does not contain
|
|
* any online CPU, use the current affinity mask.
|
|
*/
|
|
if (irq_fixup_move_pending(desc, true))
|
|
affinity = irq_desc_get_pending_mask(desc);
|
|
else
|
|
affinity = irq_data_get_affinity_mask(d);
|
|
|
|
/* Mask the chip for interrupts which cannot move in process context */
|
|
if (maskchip && chip->irq_mask)
|
|
chip->irq_mask(d);
|
|
|
|
cpumask_copy(&available_cpus, affinity);
|
|
cpumask_andnot(&available_cpus, &available_cpus, cpu_isolated_mask);
|
|
affinity = &available_cpus;
|
|
|
|
if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
|
|
const struct cpumask *default_affinity;
|
|
|
|
/*
|
|
* If the interrupt is managed, then shut it down and leave
|
|
* the affinity untouched.
|
|
*/
|
|
if (irqd_affinity_is_managed(d)) {
|
|
irqd_set_managed_shutdown(d);
|
|
irq_shutdown_and_deactivate(desc);
|
|
return false;
|
|
}
|
|
|
|
default_affinity = desc->affinity_hint ? : irq_default_affinity;
|
|
/*
|
|
* The order of preference for selecting a fallback CPU is
|
|
*
|
|
* (1) online and un-isolated CPU from default affinity
|
|
* (2) online and un-isolated CPU
|
|
* (3) online CPU
|
|
*/
|
|
cpumask_andnot(&available_cpus, cpu_online_mask,
|
|
cpu_isolated_mask);
|
|
if (cpumask_intersects(&available_cpus, default_affinity))
|
|
cpumask_and(&available_cpus, &available_cpus,
|
|
default_affinity);
|
|
else if (cpumask_empty(&available_cpus))
|
|
affinity = cpu_online_mask;
|
|
|
|
/*
|
|
* We are overriding the affinity with all online and
|
|
* un-isolated cpus. irq_set_affinity_locked() call
|
|
* below notify this mask to PM QOS affinity listener.
|
|
* That results in applying the CPU_DMA_LATENCY QOS
|
|
* to all the CPUs specified in the mask. But the low
|
|
* level irqchip driver sets the affinity of an irq
|
|
* to only one CPU. So pick only one CPU from the
|
|
* prepared mask while overriding the user affinity.
|
|
*/
|
|
affinity = cpumask_of(cpumask_any(affinity));
|
|
brokeaff = true;
|
|
}
|
|
/*
|
|
* Do not set the force argument of irq_set_affinity_locked() as this
|
|
* disables the masking of offline CPUs from the supplied affinity
|
|
* mask and therefore might keep/reassign the irq to the outgoing
|
|
* CPU.
|
|
*/
|
|
err = irq_set_affinity_locked(d, affinity, false);
|
|
if (err) {
|
|
pr_warn_ratelimited("IRQ%u: set affinity failed(%d).\n",
|
|
d->irq, err);
|
|
brokeaff = false;
|
|
}
|
|
|
|
if (maskchip && chip->irq_unmask)
|
|
chip->irq_unmask(d);
|
|
|
|
return brokeaff;
|
|
}
|
|
|
|
/**
|
|
* irq_migrate_all_off_this_cpu - Migrate irqs away from offline cpu
|
|
*
|
|
* The current CPU has been marked offline. Migrate IRQs off this CPU.
|
|
* If the affinity settings do not allow other CPUs, force them onto any
|
|
* available CPU.
|
|
*
|
|
* Note: we must iterate over all IRQs, whether they have an attached
|
|
* action structure or not, as we need to get chained interrupts too.
|
|
*/
|
|
void irq_migrate_all_off_this_cpu(void)
|
|
{
|
|
struct irq_desc *desc;
|
|
unsigned int irq;
|
|
|
|
for_each_active_irq(irq) {
|
|
bool affinity_broken;
|
|
|
|
desc = irq_to_desc(irq);
|
|
raw_spin_lock(&desc->lock);
|
|
affinity_broken = migrate_one_irq(desc);
|
|
raw_spin_unlock(&desc->lock);
|
|
|
|
if (affinity_broken) {
|
|
pr_info_ratelimited("IRQ %u: no longer affine to CPU%u\n",
|
|
irq, smp_processor_id());
|
|
}
|
|
}
|
|
}
|
|
|
|
static void irq_restore_affinity_of_irq(struct irq_desc *desc, unsigned int cpu)
|
|
{
|
|
struct irq_data *data = irq_desc_get_irq_data(desc);
|
|
const struct cpumask *affinity = irq_data_get_affinity_mask(data);
|
|
|
|
if (!irqd_affinity_is_managed(data) || !desc->action ||
|
|
!irq_data_get_irq_chip(data) || !cpumask_test_cpu(cpu, affinity))
|
|
return;
|
|
|
|
if (irqd_is_managed_and_shutdown(data)) {
|
|
irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* If the interrupt can only be directed to a single target
|
|
* CPU then it is already assigned to a CPU in the affinity
|
|
* mask. No point in trying to move it around.
|
|
*/
|
|
if (!irqd_is_single_target(data))
|
|
irq_set_affinity_locked(data, affinity, false);
|
|
}
|
|
|
|
/**
|
|
* irq_affinity_online_cpu - Restore affinity for managed interrupts
|
|
* @cpu: Upcoming CPU for which interrupts should be restored
|
|
*/
|
|
int irq_affinity_online_cpu(unsigned int cpu)
|
|
{
|
|
struct irq_desc *desc;
|
|
unsigned int irq;
|
|
|
|
irq_lock_sparse();
|
|
for_each_active_irq(irq) {
|
|
desc = irq_to_desc(irq);
|
|
raw_spin_lock_irq(&desc->lock);
|
|
irq_restore_affinity_of_irq(desc, cpu);
|
|
raw_spin_unlock_irq(&desc->lock);
|
|
}
|
|
irq_unlock_sparse();
|
|
|
|
return 0;
|
|
}
|