e6b6e3ffb9
Current status of APUS: - arch/powerpc/: removed in 2.6.23 - arch/ppc/: marked BROKEN since 2 years This therefore removes the remaining parts of APUS support from arch/ppc, include/asm-ppc, arch/powerpc and include/asm-powerpc. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
138 lines
3.7 KiB
C
138 lines
3.7 KiB
C
#ifndef _PPC_PAGE_H
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#define _PPC_PAGE_H
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#include <asm/asm-compat.h>
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/* PAGE_SHIFT determines the page size */
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#define PAGE_SHIFT 12
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#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT)
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/*
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* Subtle: this is an int (not an unsigned long) and so it
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* gets extended to 64 bits the way want (i.e. with 1s). -- paulus
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*/
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#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
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#ifdef __KERNEL__
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/* This must match what is in arch/ppc/Makefile */
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#define PAGE_OFFSET CONFIG_KERNEL_START
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#define KERNELBASE PAGE_OFFSET
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#define is_kernel_addr(x) ((x) >= PAGE_OFFSET)
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#ifndef __ASSEMBLY__
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/*
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* The basic type of a PTE - 64 bits for those CPUs with > 32 bit
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* physical addressing. For now this just the IBM PPC440.
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*/
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#ifdef CONFIG_PTE_64BIT
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typedef unsigned long long pte_basic_t;
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#define PTE_SHIFT (PAGE_SHIFT - 3) /* 512 ptes per page */
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#define PTE_FMT "%16Lx"
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#else
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typedef unsigned long pte_basic_t;
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#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */
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#define PTE_FMT "%.8lx"
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#endif
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/* align addr on a size boundary - adjust address up/down if needed */
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#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
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#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
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/* align addr on a size boundary - adjust address up if needed */
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#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
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/* to align the pointer to the (next) page boundary */
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#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
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#undef STRICT_MM_TYPECHECKS
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#ifdef STRICT_MM_TYPECHECKS
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/*
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* These are used to make use of C type-checking..
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*/
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typedef struct { pte_basic_t pte; } pte_t;
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typedef struct { unsigned long pmd; } pmd_t;
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typedef struct { unsigned long pgd; } pgd_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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#define pte_val(x) ((x).pte)
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#define pmd_val(x) ((x).pmd)
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#define pgd_val(x) ((x).pgd)
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#define pgprot_val(x) ((x).pgprot)
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#define __pte(x) ((pte_t) { (x) } )
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#define __pmd(x) ((pmd_t) { (x) } )
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#define __pgd(x) ((pgd_t) { (x) } )
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#define __pgprot(x) ((pgprot_t) { (x) } )
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#else
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/*
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* .. while these make it easier on the compiler
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*/
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typedef pte_basic_t pte_t;
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typedef unsigned long pmd_t;
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typedef unsigned long pgd_t;
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typedef unsigned long pgprot_t;
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#define pte_val(x) (x)
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#define pmd_val(x) (x)
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#define pgd_val(x) (x)
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#define pgprot_val(x) (x)
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#define __pte(x) (x)
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#define __pmd(x) (x)
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#define __pgd(x) (x)
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#define __pgprot(x) (x)
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#endif
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struct page;
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extern void clear_pages(void *page, int order);
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static inline void clear_page(void *page) { clear_pages(page, 0); }
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extern void copy_page(void *to, void *from);
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extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
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extern void copy_user_page(void *to, void *from, unsigned long vaddr,
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struct page *pg);
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#define PPC_MEMSTART 0
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#define PPC_MEMOFFSET PAGE_OFFSET
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#define ___pa(vaddr) ((vaddr)-PPC_MEMOFFSET)
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#define ___va(paddr) ((paddr)+PPC_MEMOFFSET)
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extern int page_is_ram(unsigned long pfn);
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#define __pa(x) ___pa((unsigned long)(x))
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#define __va(x) ((void *)(___va((unsigned long)(x))))
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#define ARCH_PFN_OFFSET 0
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
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#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
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#define pfn_valid(pfn) ((pfn) < max_mapnr)
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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/* Pure 2^n version of get_order */
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extern __inline__ int get_order(unsigned long size)
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{
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int lz;
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size = (size-1) >> PAGE_SHIFT;
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asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
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return 32 - lz;
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}
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#endif /* __ASSEMBLY__ */
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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/* We do define AT_SYSINFO_EHDR but don't use the gate mechanism */
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#define __HAVE_ARCH_GATE_AREA 1
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#include <asm-generic/memory_model.h>
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#endif /* __KERNEL__ */
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#endif /* _PPC_PAGE_H */
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