5de587fd84
[ Upstream commit 961abd78adcb4c72c343fcd9f9dc5e2ebbe9b448 ]
In L3C uncore PMU drivers, bit16 is used to control all counters enable &
disable. Wrong value is given in the driver and its default value is 1'b1,
it can work because each PMU counter has its own control bits too.
Let's fix the wrong value.
Fixes:
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.. | ||
hisilicon | ||
arm-cci.c | ||
arm-ccn.c | ||
arm_dsu_pmu.c | ||
arm_pmu.c | ||
arm_pmu_acpi.c | ||
arm_pmu_platform.c | ||
arm_spe_pmu.c | ||
Kconfig | ||
Makefile | ||
qcom_l2_pmu.c | ||
qcom_l3_pmu.c | ||
xgene_pmu.c |