0e5f61b00c
On Intel systems generally the TSC stops in C3 or deeper, so don't use it there. Follows similar logic on i386. This should fix problems on Meroms. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
1325 lines
33 KiB
C
1325 lines
33 KiB
C
/*
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* linux/arch/x86-64/kernel/time.c
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*
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* "High Precision Event Timer" based timekeeping.
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*
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* Copyright (c) 1991,1992,1995 Linus Torvalds
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* Copyright (c) 1994 Alan Modra
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* Copyright (c) 1995 Markus Kuhn
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* Copyright (c) 1996 Ingo Molnar
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* Copyright (c) 1998 Andrea Arcangeli
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* Copyright (c) 2002,2006 Vojtech Pavlik
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* Copyright (c) 2003 Andi Kleen
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* RTC support code taken from arch/i386/kernel/timers/time_hpet.c
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/mc146818rtc.h>
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#include <linux/time.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/sysdev.h>
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#include <linux/bcd.h>
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#include <linux/kallsyms.h>
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#include <linux/acpi.h>
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#ifdef CONFIG_ACPI
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#include <acpi/achware.h> /* for PM timer frequency */
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#include <acpi/acpi_bus.h>
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#endif
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#include <asm/8253pit.h>
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#include <asm/pgtable.h>
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#include <asm/vsyscall.h>
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#include <asm/timex.h>
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#include <asm/proto.h>
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#include <asm/hpet.h>
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#include <asm/sections.h>
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#include <linux/cpufreq.h>
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#include <linux/hpet.h>
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#ifdef CONFIG_X86_LOCAL_APIC
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#include <asm/apic.h>
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#endif
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#ifdef CONFIG_CPU_FREQ
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static void cpufreq_delayed_get(void);
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#endif
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extern void i8254_timer_resume(void);
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extern int using_apic_timer;
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static char *time_init_gtod(void);
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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DEFINE_SPINLOCK(i8253_lock);
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int nohpet __initdata = 0;
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static int notsc __initdata = 0;
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#define USEC_PER_TICK (USEC_PER_SEC / HZ)
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#define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
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#define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
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#define NS_SCALE 10 /* 2^10, carefully chosen */
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#define US_SCALE 32 /* 2^32, arbitralrily chosen */
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unsigned int cpu_khz; /* TSC clocks / usec, not used here */
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EXPORT_SYMBOL(cpu_khz);
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static unsigned long hpet_period; /* fsecs / HPET clock */
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unsigned long hpet_tick; /* HPET clocks / interrupt */
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int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
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unsigned long vxtime_hz = PIT_TICK_RATE;
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int report_lost_ticks; /* command line option */
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unsigned long long monotonic_base;
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struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
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volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
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unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
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struct timespec __xtime __section_xtime;
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struct timezone __sys_tz __section_sys_tz;
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/*
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* do_gettimeoffset() returns microseconds since last timer interrupt was
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* triggered by hardware. A memory read of HPET is slower than a register read
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* of TSC, but much more reliable. It's also synchronized to the timer
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* interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
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* timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
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* This is not a problem, because jiffies hasn't updated either. They are bound
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* together by xtime_lock.
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*/
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static inline unsigned int do_gettimeoffset_tsc(void)
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{
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unsigned long t;
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unsigned long x;
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t = get_cycles_sync();
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if (t < vxtime.last_tsc)
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t = vxtime.last_tsc; /* hack */
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x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> US_SCALE;
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return x;
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}
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static inline unsigned int do_gettimeoffset_hpet(void)
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{
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/* cap counter read to one tick to avoid inconsistencies */
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unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
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return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE;
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}
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unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
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/*
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* This version of gettimeofday() has microsecond resolution and better than
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* microsecond precision, as we're using at least a 10 MHz (usually 14.31818
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* MHz) HPET timer.
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*/
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void do_gettimeofday(struct timeval *tv)
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{
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unsigned long seq, t;
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unsigned int sec, usec;
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do {
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seq = read_seqbegin(&xtime_lock);
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sec = xtime.tv_sec;
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usec = xtime.tv_nsec / NSEC_PER_USEC;
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/* i386 does some correction here to keep the clock
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monotonous even when ntpd is fixing drift.
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But they didn't work for me, there is a non monotonic
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clock anyways with ntp.
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I dropped all corrections now until a real solution can
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be found. Note when you fix it here you need to do the same
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in arch/x86_64/kernel/vsyscall.c and export all needed
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variables in vmlinux.lds. -AK */
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t = (jiffies - wall_jiffies) * USEC_PER_TICK +
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do_gettimeoffset();
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usec += t;
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} while (read_seqretry(&xtime_lock, seq));
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tv->tv_sec = sec + usec / USEC_PER_SEC;
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tv->tv_usec = usec % USEC_PER_SEC;
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}
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EXPORT_SYMBOL(do_gettimeofday);
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/*
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* settimeofday() first undoes the correction that gettimeofday would do
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* on the time, and then saves it. This is ugly, but has been like this for
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* ages already.
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*/
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int do_settimeofday(struct timespec *tv)
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{
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time_t wtm_sec, sec = tv->tv_sec;
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long wtm_nsec, nsec = tv->tv_nsec;
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if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
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return -EINVAL;
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write_seqlock_irq(&xtime_lock);
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nsec -= do_gettimeoffset() * NSEC_PER_USEC +
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(jiffies - wall_jiffies) * NSEC_PER_TICK;
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wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
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wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
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set_normalized_timespec(&xtime, sec, nsec);
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set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
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ntp_clear();
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write_sequnlock_irq(&xtime_lock);
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clock_was_set();
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return 0;
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}
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EXPORT_SYMBOL(do_settimeofday);
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unsigned long profile_pc(struct pt_regs *regs)
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{
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unsigned long pc = instruction_pointer(regs);
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/* Assume the lock function has either no stack frame or only a single
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word. This checks if the address on the stack looks like a kernel
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text address.
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There is a small window for false hits, but in that case the tick
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is just accounted to the spinlock function.
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Better would be to write these functions in assembler again
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and check exactly. */
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if (!user_mode(regs) && in_lock_functions(pc)) {
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char *v = *(char **)regs->rsp;
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if ((v >= _stext && v <= _etext) ||
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(v >= _sinittext && v <= _einittext) ||
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(v >= (char *)MODULES_VADDR && v <= (char *)MODULES_END))
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return (unsigned long)v;
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return ((unsigned long *)regs->rsp)[1];
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}
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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/*
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* In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
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* ms after the second nowtime has started, because when nowtime is written
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* into the registers of the CMOS clock, it will jump to the next second
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* precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
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* sheet for details.
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*/
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static void set_rtc_mmss(unsigned long nowtime)
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{
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int real_seconds, real_minutes, cmos_minutes;
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unsigned char control, freq_select;
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/*
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* IRQs are disabled when we're called from the timer interrupt,
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* no need for spin_lock_irqsave()
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*/
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spin_lock(&rtc_lock);
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/*
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* Tell the clock it's being set and stop it.
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*/
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control = CMOS_READ(RTC_CONTROL);
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CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
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freq_select = CMOS_READ(RTC_FREQ_SELECT);
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CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
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cmos_minutes = CMOS_READ(RTC_MINUTES);
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BCD_TO_BIN(cmos_minutes);
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/*
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* since we're only adjusting minutes and seconds, don't interfere with hour
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* overflow. This avoids messing with unknown time zones but requires your RTC
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* not to be off by more than 15 minutes. Since we're calling it only when
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* our clock is externally synchronized using NTP, this shouldn't be a problem.
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*/
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real_seconds = nowtime % 60;
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real_minutes = nowtime / 60;
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if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
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real_minutes += 30; /* correct for half hour time zone */
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real_minutes %= 60;
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if (abs(real_minutes - cmos_minutes) >= 30) {
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printk(KERN_WARNING "time.c: can't update CMOS clock "
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"from %d to %d\n", cmos_minutes, real_minutes);
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} else {
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BIN_TO_BCD(real_seconds);
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BIN_TO_BCD(real_minutes);
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CMOS_WRITE(real_seconds, RTC_SECONDS);
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CMOS_WRITE(real_minutes, RTC_MINUTES);
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}
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/*
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* The following flags have to be released exactly in this order, otherwise the
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* DS12887 (popular MC146818A clone with integrated battery and quartz) will
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* not reset the oscillator and will not update precisely 500 ms later. You
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* won't find this mentioned in the Dallas Semiconductor data sheets, but who
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* believes data sheets anyway ... -- Markus Kuhn
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*/
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CMOS_WRITE(control, RTC_CONTROL);
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CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
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spin_unlock(&rtc_lock);
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}
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/* monotonic_clock(): returns # of nanoseconds passed since time_init()
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* Note: This function is required to return accurate
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* time even in the absence of multiple timer ticks.
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*/
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unsigned long long monotonic_clock(void)
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{
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unsigned long seq;
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u32 last_offset, this_offset, offset;
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unsigned long long base;
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if (vxtime.mode == VXTIME_HPET) {
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do {
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seq = read_seqbegin(&xtime_lock);
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last_offset = vxtime.last;
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base = monotonic_base;
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this_offset = hpet_readl(HPET_COUNTER);
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} while (read_seqretry(&xtime_lock, seq));
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offset = (this_offset - last_offset);
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offset *= NSEC_PER_TICK / hpet_tick;
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} else {
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do {
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seq = read_seqbegin(&xtime_lock);
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last_offset = vxtime.last_tsc;
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base = monotonic_base;
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} while (read_seqretry(&xtime_lock, seq));
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this_offset = get_cycles_sync();
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/* FIXME: 1000 or 1000000? */
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offset = (this_offset - last_offset)*1000 / cpu_khz;
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}
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return base + offset;
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}
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EXPORT_SYMBOL(monotonic_clock);
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static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
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{
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static long lost_count;
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static int warned;
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if (report_lost_ticks) {
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printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
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print_symbol("rip %s)\n", regs->rip);
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}
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if (lost_count == 1000 && !warned) {
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printk(KERN_WARNING "warning: many lost ticks.\n"
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KERN_WARNING "Your time source seems to be instable or "
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"some driver is hogging interupts\n");
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print_symbol("rip %s\n", regs->rip);
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if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
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printk(KERN_WARNING "Falling back to HPET\n");
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if (hpet_use_timer)
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vxtime.last = hpet_readl(HPET_T0_CMP) -
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hpet_tick;
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else
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vxtime.last = hpet_readl(HPET_COUNTER);
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vxtime.mode = VXTIME_HPET;
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do_gettimeoffset = do_gettimeoffset_hpet;
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}
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/* else should fall back to PIT, but code missing. */
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warned = 1;
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} else
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lost_count++;
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#ifdef CONFIG_CPU_FREQ
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/* In some cases the CPU can change frequency without us noticing
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Give cpufreq a change to catch up. */
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if ((lost_count+1) % 25 == 0)
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cpufreq_delayed_get();
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#endif
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}
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void main_timer_handler(struct pt_regs *regs)
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{
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static unsigned long rtc_update = 0;
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unsigned long tsc;
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int delay = 0, offset = 0, lost = 0;
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/*
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* Here we are in the timer irq handler. We have irqs locally disabled (so we
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* don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
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* on the other CPU, so we need a lock. We also need to lock the vsyscall
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* variables, because both do_timer() and us change them -arca+vojtech
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*/
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write_seqlock(&xtime_lock);
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if (vxtime.hpet_address)
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offset = hpet_readl(HPET_COUNTER);
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if (hpet_use_timer) {
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/* if we're using the hpet timer functionality,
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* we can more accurately know the counter value
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* when the timer interrupt occured.
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*/
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offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
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delay = hpet_readl(HPET_COUNTER) - offset;
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} else if (!pmtmr_ioport) {
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spin_lock(&i8253_lock);
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outb_p(0x00, 0x43);
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delay = inb_p(0x40);
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delay |= inb(0x40) << 8;
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spin_unlock(&i8253_lock);
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delay = LATCH - 1 - delay;
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}
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tsc = get_cycles_sync();
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if (vxtime.mode == VXTIME_HPET) {
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if (offset - vxtime.last > hpet_tick) {
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lost = (offset - vxtime.last) / hpet_tick - 1;
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}
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monotonic_base +=
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(offset - vxtime.last) * NSEC_PER_TICK / hpet_tick;
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vxtime.last = offset;
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#ifdef CONFIG_X86_PM_TIMER
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} else if (vxtime.mode == VXTIME_PMTMR) {
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lost = pmtimer_mark_offset();
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#endif
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} else {
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offset = (((tsc - vxtime.last_tsc) *
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vxtime.tsc_quot) >> US_SCALE) - USEC_PER_TICK;
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if (offset < 0)
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offset = 0;
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if (offset > USEC_PER_TICK) {
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lost = offset / USEC_PER_TICK;
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offset %= USEC_PER_TICK;
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}
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/* FIXME: 1000 or 1000000? */
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monotonic_base += (tsc - vxtime.last_tsc) * 1000000 / cpu_khz;
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vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
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if ((((tsc - vxtime.last_tsc) *
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vxtime.tsc_quot) >> US_SCALE) < offset)
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vxtime.last_tsc = tsc -
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(((long) offset << US_SCALE) / vxtime.tsc_quot) - 1;
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}
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if (lost > 0) {
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handle_lost_ticks(lost, regs);
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jiffies += lost;
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}
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/*
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* Do the timer stuff.
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*/
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do_timer(regs);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(regs));
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#endif
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/*
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* In the SMP case we use the local APIC timer interrupt to do the profiling,
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* except when we simulate SMP mode on a uniprocessor system, in that case we
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* have to call the local interrupt handler.
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*/
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#ifndef CONFIG_X86_LOCAL_APIC
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profile_tick(CPU_PROFILING, regs);
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#else
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if (!using_apic_timer)
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smp_local_timer_interrupt(regs);
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#endif
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/*
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* If we have an externally synchronized Linux clock, then update CMOS clock
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* accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
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* closest to exactly 500 ms before the next second. If the update fails, we
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* don't care, as it'll be updated on the next turn, and the problem (time way
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* off) isn't likely to go away much sooner anyway.
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*/
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if (ntp_synced() && xtime.tv_sec > rtc_update &&
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abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
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set_rtc_mmss(xtime.tv_sec);
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rtc_update = xtime.tv_sec + 660;
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}
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write_sequnlock(&xtime_lock);
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}
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static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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if (apic_runs_main_timer > 1)
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return IRQ_HANDLED;
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main_timer_handler(regs);
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#ifdef CONFIG_X86_LOCAL_APIC
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if (using_apic_timer)
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smp_send_timer_broadcast_ipi();
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#endif
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return IRQ_HANDLED;
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}
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static unsigned int cyc2ns_scale __read_mostly;
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|
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static inline void set_cyc2ns_scale(unsigned long cpu_khz)
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{
|
|
cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / cpu_khz;
|
|
}
|
|
|
|
static inline unsigned long long cycles_2_ns(unsigned long long cyc)
|
|
{
|
|
return (cyc * cyc2ns_scale) >> NS_SCALE;
|
|
}
|
|
|
|
unsigned long long sched_clock(void)
|
|
{
|
|
unsigned long a = 0;
|
|
|
|
#if 0
|
|
/* Don't do a HPET read here. Using TSC always is much faster
|
|
and HPET may not be mapped yet when the scheduler first runs.
|
|
Disadvantage is a small drift between CPUs in some configurations,
|
|
but that should be tolerable. */
|
|
if (__vxtime.mode == VXTIME_HPET)
|
|
return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> US_SCALE;
|
|
#endif
|
|
|
|
/* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
|
|
which means it is not completely exact and may not be monotonous between
|
|
CPUs. But the errors should be too small to matter for scheduling
|
|
purposes. */
|
|
|
|
rdtscll(a);
|
|
return cycles_2_ns(a);
|
|
}
|
|
|
|
static unsigned long get_cmos_time(void)
|
|
{
|
|
unsigned int year, mon, day, hour, min, sec;
|
|
unsigned long flags;
|
|
unsigned extyear = 0;
|
|
|
|
spin_lock_irqsave(&rtc_lock, flags);
|
|
|
|
do {
|
|
sec = CMOS_READ(RTC_SECONDS);
|
|
min = CMOS_READ(RTC_MINUTES);
|
|
hour = CMOS_READ(RTC_HOURS);
|
|
day = CMOS_READ(RTC_DAY_OF_MONTH);
|
|
mon = CMOS_READ(RTC_MONTH);
|
|
year = CMOS_READ(RTC_YEAR);
|
|
#ifdef CONFIG_ACPI
|
|
if (acpi_fadt.revision >= FADT2_REVISION_ID &&
|
|
acpi_fadt.century)
|
|
extyear = CMOS_READ(acpi_fadt.century);
|
|
#endif
|
|
} while (sec != CMOS_READ(RTC_SECONDS));
|
|
|
|
spin_unlock_irqrestore(&rtc_lock, flags);
|
|
|
|
/*
|
|
* We know that x86-64 always uses BCD format, no need to check the
|
|
* config register.
|
|
*/
|
|
|
|
BCD_TO_BIN(sec);
|
|
BCD_TO_BIN(min);
|
|
BCD_TO_BIN(hour);
|
|
BCD_TO_BIN(day);
|
|
BCD_TO_BIN(mon);
|
|
BCD_TO_BIN(year);
|
|
|
|
if (extyear) {
|
|
BCD_TO_BIN(extyear);
|
|
year += extyear;
|
|
printk(KERN_INFO "Extended CMOS year: %d\n", extyear);
|
|
} else {
|
|
/*
|
|
* x86-64 systems only exists since 2002.
|
|
* This will work up to Dec 31, 2100
|
|
*/
|
|
year += 2000;
|
|
}
|
|
|
|
return mktime(year, mon, day, hour, min, sec);
|
|
}
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
|
|
/* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
|
|
changes.
|
|
|
|
RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
|
|
not that important because current Opteron setups do not support
|
|
scaling on SMP anyroads.
|
|
|
|
Should fix up last_tsc too. Currently gettimeofday in the
|
|
first tick after the change will be slightly wrong. */
|
|
|
|
#include <linux/workqueue.h>
|
|
|
|
static unsigned int cpufreq_delayed_issched = 0;
|
|
static unsigned int cpufreq_init = 0;
|
|
static struct work_struct cpufreq_delayed_get_work;
|
|
|
|
static void handle_cpufreq_delayed_get(void *v)
|
|
{
|
|
unsigned int cpu;
|
|
for_each_online_cpu(cpu) {
|
|
cpufreq_get(cpu);
|
|
}
|
|
cpufreq_delayed_issched = 0;
|
|
}
|
|
|
|
/* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
|
|
* to verify the CPU frequency the timing core thinks the CPU is running
|
|
* at is still correct.
|
|
*/
|
|
static void cpufreq_delayed_get(void)
|
|
{
|
|
static int warned;
|
|
if (cpufreq_init && !cpufreq_delayed_issched) {
|
|
cpufreq_delayed_issched = 1;
|
|
if (!warned) {
|
|
warned = 1;
|
|
printk(KERN_DEBUG
|
|
"Losing some ticks... checking if CPU frequency changed.\n");
|
|
}
|
|
schedule_work(&cpufreq_delayed_get_work);
|
|
}
|
|
}
|
|
|
|
static unsigned int ref_freq = 0;
|
|
static unsigned long loops_per_jiffy_ref = 0;
|
|
|
|
static unsigned long cpu_khz_ref = 0;
|
|
|
|
static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
|
|
void *data)
|
|
{
|
|
struct cpufreq_freqs *freq = data;
|
|
unsigned long *lpj, dummy;
|
|
|
|
if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
|
|
return 0;
|
|
|
|
lpj = &dummy;
|
|
if (!(freq->flags & CPUFREQ_CONST_LOOPS))
|
|
#ifdef CONFIG_SMP
|
|
lpj = &cpu_data[freq->cpu].loops_per_jiffy;
|
|
#else
|
|
lpj = &boot_cpu_data.loops_per_jiffy;
|
|
#endif
|
|
|
|
if (!ref_freq) {
|
|
ref_freq = freq->old;
|
|
loops_per_jiffy_ref = *lpj;
|
|
cpu_khz_ref = cpu_khz;
|
|
}
|
|
if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
|
|
(val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
|
|
(val == CPUFREQ_RESUMECHANGE)) {
|
|
*lpj =
|
|
cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
|
|
|
|
cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
|
|
if (!(freq->flags & CPUFREQ_CONST_LOOPS))
|
|
vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
|
|
}
|
|
|
|
set_cyc2ns_scale(cpu_khz_ref);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct notifier_block time_cpufreq_notifier_block = {
|
|
.notifier_call = time_cpufreq_notifier
|
|
};
|
|
|
|
static int __init cpufreq_tsc(void)
|
|
{
|
|
INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
|
|
if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
|
|
CPUFREQ_TRANSITION_NOTIFIER))
|
|
cpufreq_init = 1;
|
|
return 0;
|
|
}
|
|
|
|
core_initcall(cpufreq_tsc);
|
|
|
|
#endif
|
|
|
|
/*
|
|
* calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
|
|
* it to the HPET timer of known frequency.
|
|
*/
|
|
|
|
#define TICK_COUNT 100000000
|
|
|
|
static unsigned int __init hpet_calibrate_tsc(void)
|
|
{
|
|
int tsc_start, hpet_start;
|
|
int tsc_now, hpet_now;
|
|
unsigned long flags;
|
|
|
|
local_irq_save(flags);
|
|
local_irq_disable();
|
|
|
|
hpet_start = hpet_readl(HPET_COUNTER);
|
|
rdtscl(tsc_start);
|
|
|
|
do {
|
|
local_irq_disable();
|
|
hpet_now = hpet_readl(HPET_COUNTER);
|
|
tsc_now = get_cycles_sync();
|
|
local_irq_restore(flags);
|
|
} while ((tsc_now - tsc_start) < TICK_COUNT &&
|
|
(hpet_now - hpet_start) < TICK_COUNT);
|
|
|
|
return (tsc_now - tsc_start) * 1000000000L
|
|
/ ((hpet_now - hpet_start) * hpet_period / 1000);
|
|
}
|
|
|
|
|
|
/*
|
|
* pit_calibrate_tsc() uses the speaker output (channel 2) of
|
|
* the PIT. This is better than using the timer interrupt output,
|
|
* because we can read the value of the speaker with just one inb(),
|
|
* where we need three i/o operations for the interrupt channel.
|
|
* We count how many ticks the TSC does in 50 ms.
|
|
*/
|
|
|
|
static unsigned int __init pit_calibrate_tsc(void)
|
|
{
|
|
unsigned long start, end;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&i8253_lock, flags);
|
|
|
|
outb((inb(0x61) & ~0x02) | 0x01, 0x61);
|
|
|
|
outb(0xb0, 0x43);
|
|
outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
|
|
outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
|
|
start = get_cycles_sync();
|
|
while ((inb(0x61) & 0x20) == 0);
|
|
end = get_cycles_sync();
|
|
|
|
spin_unlock_irqrestore(&i8253_lock, flags);
|
|
|
|
return (end - start) / 50;
|
|
}
|
|
|
|
#ifdef CONFIG_HPET
|
|
static __init int late_hpet_init(void)
|
|
{
|
|
struct hpet_data hd;
|
|
unsigned int ntimer;
|
|
|
|
if (!vxtime.hpet_address)
|
|
return 0;
|
|
|
|
memset(&hd, 0, sizeof (hd));
|
|
|
|
ntimer = hpet_readl(HPET_ID);
|
|
ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
|
|
ntimer++;
|
|
|
|
/*
|
|
* Register with driver.
|
|
* Timer0 and Timer1 is used by platform.
|
|
*/
|
|
hd.hd_phys_address = vxtime.hpet_address;
|
|
hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
|
|
hd.hd_nirqs = ntimer;
|
|
hd.hd_flags = HPET_DATA_PLATFORM;
|
|
hpet_reserve_timer(&hd, 0);
|
|
#ifdef CONFIG_HPET_EMULATE_RTC
|
|
hpet_reserve_timer(&hd, 1);
|
|
#endif
|
|
hd.hd_irq[0] = HPET_LEGACY_8254;
|
|
hd.hd_irq[1] = HPET_LEGACY_RTC;
|
|
if (ntimer > 2) {
|
|
struct hpet *hpet;
|
|
struct hpet_timer *timer;
|
|
int i;
|
|
|
|
hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
|
|
timer = &hpet->hpet_timers[2];
|
|
for (i = 2; i < ntimer; timer++, i++)
|
|
hd.hd_irq[i] = (timer->hpet_config &
|
|
Tn_INT_ROUTE_CNF_MASK) >>
|
|
Tn_INT_ROUTE_CNF_SHIFT;
|
|
|
|
}
|
|
|
|
hpet_alloc(&hd);
|
|
return 0;
|
|
}
|
|
fs_initcall(late_hpet_init);
|
|
#endif
|
|
|
|
static int hpet_timer_stop_set_go(unsigned long tick)
|
|
{
|
|
unsigned int cfg;
|
|
|
|
/*
|
|
* Stop the timers and reset the main counter.
|
|
*/
|
|
|
|
cfg = hpet_readl(HPET_CFG);
|
|
cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
|
|
hpet_writel(cfg, HPET_CFG);
|
|
hpet_writel(0, HPET_COUNTER);
|
|
hpet_writel(0, HPET_COUNTER + 4);
|
|
|
|
/*
|
|
* Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
|
|
* and period also hpet_tick.
|
|
*/
|
|
if (hpet_use_timer) {
|
|
hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
|
|
HPET_TN_32BIT, HPET_T0_CFG);
|
|
hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
|
|
hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
|
|
cfg |= HPET_CFG_LEGACY;
|
|
}
|
|
/*
|
|
* Go!
|
|
*/
|
|
|
|
cfg |= HPET_CFG_ENABLE;
|
|
hpet_writel(cfg, HPET_CFG);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hpet_init(void)
|
|
{
|
|
unsigned int id;
|
|
|
|
if (!vxtime.hpet_address)
|
|
return -1;
|
|
set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
|
|
__set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
|
|
|
|
/*
|
|
* Read the period, compute tick and quotient.
|
|
*/
|
|
|
|
id = hpet_readl(HPET_ID);
|
|
|
|
if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
|
|
return -1;
|
|
|
|
hpet_period = hpet_readl(HPET_PERIOD);
|
|
if (hpet_period < 100000 || hpet_period > 100000000)
|
|
return -1;
|
|
|
|
hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
|
|
|
|
hpet_use_timer = (id & HPET_ID_LEGSUP);
|
|
|
|
return hpet_timer_stop_set_go(hpet_tick);
|
|
}
|
|
|
|
static int hpet_reenable(void)
|
|
{
|
|
return hpet_timer_stop_set_go(hpet_tick);
|
|
}
|
|
|
|
#define PIT_MODE 0x43
|
|
#define PIT_CH0 0x40
|
|
|
|
static void __init __pit_init(int val, u8 mode)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&i8253_lock, flags);
|
|
outb_p(mode, PIT_MODE);
|
|
outb_p(val & 0xff, PIT_CH0); /* LSB */
|
|
outb_p(val >> 8, PIT_CH0); /* MSB */
|
|
spin_unlock_irqrestore(&i8253_lock, flags);
|
|
}
|
|
|
|
void __init pit_init(void)
|
|
{
|
|
__pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
|
|
}
|
|
|
|
void __init pit_stop_interrupt(void)
|
|
{
|
|
__pit_init(0, 0x30); /* mode 0 */
|
|
}
|
|
|
|
void __init stop_timer_interrupt(void)
|
|
{
|
|
char *name;
|
|
if (vxtime.hpet_address) {
|
|
name = "HPET";
|
|
hpet_timer_stop_set_go(0);
|
|
} else {
|
|
name = "PIT";
|
|
pit_stop_interrupt();
|
|
}
|
|
printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
|
|
}
|
|
|
|
int __init time_setup(char *str)
|
|
{
|
|
report_lost_ticks = 1;
|
|
return 1;
|
|
}
|
|
|
|
static struct irqaction irq0 = {
|
|
timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
|
|
};
|
|
|
|
void __init time_init(void)
|
|
{
|
|
char *timename;
|
|
char *gtod;
|
|
|
|
if (nohpet)
|
|
vxtime.hpet_address = 0;
|
|
|
|
xtime.tv_sec = get_cmos_time();
|
|
xtime.tv_nsec = 0;
|
|
|
|
set_normalized_timespec(&wall_to_monotonic,
|
|
-xtime.tv_sec, -xtime.tv_nsec);
|
|
|
|
if (!hpet_init())
|
|
vxtime_hz = (FSEC_PER_SEC + hpet_period / 2) / hpet_period;
|
|
else
|
|
vxtime.hpet_address = 0;
|
|
|
|
if (hpet_use_timer) {
|
|
/* set tick_nsec to use the proper rate for HPET */
|
|
tick_nsec = TICK_NSEC_HPET;
|
|
cpu_khz = hpet_calibrate_tsc();
|
|
timename = "HPET";
|
|
#ifdef CONFIG_X86_PM_TIMER
|
|
} else if (pmtmr_ioport && !vxtime.hpet_address) {
|
|
vxtime_hz = PM_TIMER_FREQUENCY;
|
|
timename = "PM";
|
|
pit_init();
|
|
cpu_khz = pit_calibrate_tsc();
|
|
#endif
|
|
} else {
|
|
pit_init();
|
|
cpu_khz = pit_calibrate_tsc();
|
|
timename = "PIT";
|
|
}
|
|
|
|
vxtime.mode = VXTIME_TSC;
|
|
gtod = time_init_gtod();
|
|
|
|
printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
|
|
vxtime_hz / 1000000, vxtime_hz % 1000000, timename, gtod);
|
|
printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
|
|
cpu_khz / 1000, cpu_khz % 1000);
|
|
vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
|
|
vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
|
|
vxtime.last_tsc = get_cycles_sync();
|
|
setup_irq(0, &irq0);
|
|
|
|
set_cyc2ns_scale(cpu_khz);
|
|
}
|
|
|
|
/*
|
|
* Make an educated guess if the TSC is trustworthy and synchronized
|
|
* over all CPUs.
|
|
*/
|
|
__cpuinit int unsynchronized_tsc(void)
|
|
{
|
|
#ifdef CONFIG_SMP
|
|
if (apic_is_clustered_box())
|
|
return 1;
|
|
#endif
|
|
/* Most intel systems have synchronized TSCs except for
|
|
multi node systems */
|
|
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
|
|
#ifdef CONFIG_ACPI
|
|
/* But TSC doesn't tick in C3 so don't use it there */
|
|
if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
|
|
return 1;
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
/* Assume multi socket systems are not synchronized */
|
|
return num_present_cpus() > 1;
|
|
}
|
|
|
|
/*
|
|
* Decide what mode gettimeofday should use.
|
|
*/
|
|
__init static char *time_init_gtod(void)
|
|
{
|
|
char *timetype;
|
|
|
|
if (unsynchronized_tsc())
|
|
notsc = 1;
|
|
if (vxtime.hpet_address && notsc) {
|
|
timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
|
|
if (hpet_use_timer)
|
|
vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
|
|
else
|
|
vxtime.last = hpet_readl(HPET_COUNTER);
|
|
vxtime.mode = VXTIME_HPET;
|
|
do_gettimeoffset = do_gettimeoffset_hpet;
|
|
#ifdef CONFIG_X86_PM_TIMER
|
|
/* Using PM for gettimeofday is quite slow, but we have no other
|
|
choice because the TSC is too unreliable on some systems. */
|
|
} else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
|
|
timetype = "PM";
|
|
do_gettimeoffset = do_gettimeoffset_pm;
|
|
vxtime.mode = VXTIME_PMTMR;
|
|
sysctl_vsyscall = 0;
|
|
printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
|
|
#endif
|
|
} else {
|
|
timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
|
|
vxtime.mode = VXTIME_TSC;
|
|
}
|
|
return timetype;
|
|
}
|
|
|
|
__setup("report_lost_ticks", time_setup);
|
|
|
|
static long clock_cmos_diff;
|
|
static unsigned long sleep_start;
|
|
|
|
/*
|
|
* sysfs support for the timer.
|
|
*/
|
|
|
|
static int timer_suspend(struct sys_device *dev, pm_message_t state)
|
|
{
|
|
/*
|
|
* Estimate time zone so that set_time can update the clock
|
|
*/
|
|
long cmos_time = get_cmos_time();
|
|
|
|
clock_cmos_diff = -cmos_time;
|
|
clock_cmos_diff += get_seconds();
|
|
sleep_start = cmos_time;
|
|
return 0;
|
|
}
|
|
|
|
static int timer_resume(struct sys_device *dev)
|
|
{
|
|
unsigned long flags;
|
|
unsigned long sec;
|
|
unsigned long ctime = get_cmos_time();
|
|
unsigned long sleep_length = (ctime - sleep_start) * HZ;
|
|
|
|
if (vxtime.hpet_address)
|
|
hpet_reenable();
|
|
else
|
|
i8254_timer_resume();
|
|
|
|
sec = ctime + clock_cmos_diff;
|
|
write_seqlock_irqsave(&xtime_lock,flags);
|
|
xtime.tv_sec = sec;
|
|
xtime.tv_nsec = 0;
|
|
if (vxtime.mode == VXTIME_HPET) {
|
|
if (hpet_use_timer)
|
|
vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
|
|
else
|
|
vxtime.last = hpet_readl(HPET_COUNTER);
|
|
#ifdef CONFIG_X86_PM_TIMER
|
|
} else if (vxtime.mode == VXTIME_PMTMR) {
|
|
pmtimer_resume();
|
|
#endif
|
|
} else
|
|
vxtime.last_tsc = get_cycles_sync();
|
|
write_sequnlock_irqrestore(&xtime_lock,flags);
|
|
jiffies += sleep_length;
|
|
wall_jiffies += sleep_length;
|
|
monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
|
|
touch_softlockup_watchdog();
|
|
return 0;
|
|
}
|
|
|
|
static struct sysdev_class timer_sysclass = {
|
|
.resume = timer_resume,
|
|
.suspend = timer_suspend,
|
|
set_kset_name("timer"),
|
|
};
|
|
|
|
/* XXX this driverfs stuff should probably go elsewhere later -john */
|
|
static struct sys_device device_timer = {
|
|
.id = 0,
|
|
.cls = &timer_sysclass,
|
|
};
|
|
|
|
static int time_init_device(void)
|
|
{
|
|
int error = sysdev_class_register(&timer_sysclass);
|
|
if (!error)
|
|
error = sysdev_register(&device_timer);
|
|
return error;
|
|
}
|
|
|
|
device_initcall(time_init_device);
|
|
|
|
#ifdef CONFIG_HPET_EMULATE_RTC
|
|
/* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
|
|
* is enabled, we support RTC interrupt functionality in software.
|
|
* RTC has 3 kinds of interrupts:
|
|
* 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
|
|
* is updated
|
|
* 2) Alarm Interrupt - generate an interrupt at a specific time of day
|
|
* 3) Periodic Interrupt - generate periodic interrupt, with frequencies
|
|
* 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
|
|
* (1) and (2) above are implemented using polling at a frequency of
|
|
* 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
|
|
* overhead. (DEFAULT_RTC_INT_FREQ)
|
|
* For (3), we use interrupts at 64Hz or user specified periodic
|
|
* frequency, whichever is higher.
|
|
*/
|
|
#include <linux/rtc.h>
|
|
|
|
#define DEFAULT_RTC_INT_FREQ 64
|
|
#define RTC_NUM_INTS 1
|
|
|
|
static unsigned long UIE_on;
|
|
static unsigned long prev_update_sec;
|
|
|
|
static unsigned long AIE_on;
|
|
static struct rtc_time alarm_time;
|
|
|
|
static unsigned long PIE_on;
|
|
static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
|
|
static unsigned long PIE_count;
|
|
|
|
static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
|
|
static unsigned int hpet_t1_cmp; /* cached comparator register */
|
|
|
|
int is_hpet_enabled(void)
|
|
{
|
|
return vxtime.hpet_address != 0;
|
|
}
|
|
|
|
/*
|
|
* Timer 1 for RTC, we do not use periodic interrupt feature,
|
|
* even if HPET supports periodic interrupts on Timer 1.
|
|
* The reason being, to set up a periodic interrupt in HPET, we need to
|
|
* stop the main counter. And if we do that everytime someone diables/enables
|
|
* RTC, we will have adverse effect on main kernel timer running on Timer 0.
|
|
* So, for the time being, simulate the periodic interrupt in software.
|
|
*
|
|
* hpet_rtc_timer_init() is called for the first time and during subsequent
|
|
* interuppts reinit happens through hpet_rtc_timer_reinit().
|
|
*/
|
|
int hpet_rtc_timer_init(void)
|
|
{
|
|
unsigned int cfg, cnt;
|
|
unsigned long flags;
|
|
|
|
if (!is_hpet_enabled())
|
|
return 0;
|
|
/*
|
|
* Set the counter 1 and enable the interrupts.
|
|
*/
|
|
if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
|
|
hpet_rtc_int_freq = PIE_freq;
|
|
else
|
|
hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
|
|
|
|
local_irq_save(flags);
|
|
cnt = hpet_readl(HPET_COUNTER);
|
|
cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
|
|
hpet_writel(cnt, HPET_T1_CMP);
|
|
hpet_t1_cmp = cnt;
|
|
local_irq_restore(flags);
|
|
|
|
cfg = hpet_readl(HPET_T1_CFG);
|
|
cfg &= ~HPET_TN_PERIODIC;
|
|
cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
|
|
hpet_writel(cfg, HPET_T1_CFG);
|
|
|
|
return 1;
|
|
}
|
|
|
|
static void hpet_rtc_timer_reinit(void)
|
|
{
|
|
unsigned int cfg, cnt;
|
|
|
|
if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
|
|
cfg = hpet_readl(HPET_T1_CFG);
|
|
cfg &= ~HPET_TN_ENABLE;
|
|
hpet_writel(cfg, HPET_T1_CFG);
|
|
return;
|
|
}
|
|
|
|
if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
|
|
hpet_rtc_int_freq = PIE_freq;
|
|
else
|
|
hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
|
|
|
|
/* It is more accurate to use the comparator value than current count.*/
|
|
cnt = hpet_t1_cmp;
|
|
cnt += hpet_tick*HZ/hpet_rtc_int_freq;
|
|
hpet_writel(cnt, HPET_T1_CMP);
|
|
hpet_t1_cmp = cnt;
|
|
}
|
|
|
|
/*
|
|
* The functions below are called from rtc driver.
|
|
* Return 0 if HPET is not being used.
|
|
* Otherwise do the necessary changes and return 1.
|
|
*/
|
|
int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
|
|
{
|
|
if (!is_hpet_enabled())
|
|
return 0;
|
|
|
|
if (bit_mask & RTC_UIE)
|
|
UIE_on = 0;
|
|
if (bit_mask & RTC_PIE)
|
|
PIE_on = 0;
|
|
if (bit_mask & RTC_AIE)
|
|
AIE_on = 0;
|
|
|
|
return 1;
|
|
}
|
|
|
|
int hpet_set_rtc_irq_bit(unsigned long bit_mask)
|
|
{
|
|
int timer_init_reqd = 0;
|
|
|
|
if (!is_hpet_enabled())
|
|
return 0;
|
|
|
|
if (!(PIE_on | AIE_on | UIE_on))
|
|
timer_init_reqd = 1;
|
|
|
|
if (bit_mask & RTC_UIE) {
|
|
UIE_on = 1;
|
|
}
|
|
if (bit_mask & RTC_PIE) {
|
|
PIE_on = 1;
|
|
PIE_count = 0;
|
|
}
|
|
if (bit_mask & RTC_AIE) {
|
|
AIE_on = 1;
|
|
}
|
|
|
|
if (timer_init_reqd)
|
|
hpet_rtc_timer_init();
|
|
|
|
return 1;
|
|
}
|
|
|
|
int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
|
|
{
|
|
if (!is_hpet_enabled())
|
|
return 0;
|
|
|
|
alarm_time.tm_hour = hrs;
|
|
alarm_time.tm_min = min;
|
|
alarm_time.tm_sec = sec;
|
|
|
|
return 1;
|
|
}
|
|
|
|
int hpet_set_periodic_freq(unsigned long freq)
|
|
{
|
|
if (!is_hpet_enabled())
|
|
return 0;
|
|
|
|
PIE_freq = freq;
|
|
PIE_count = 0;
|
|
|
|
return 1;
|
|
}
|
|
|
|
int hpet_rtc_dropped_irq(void)
|
|
{
|
|
if (!is_hpet_enabled())
|
|
return 0;
|
|
|
|
return 1;
|
|
}
|
|
|
|
irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
|
{
|
|
struct rtc_time curr_time;
|
|
unsigned long rtc_int_flag = 0;
|
|
int call_rtc_interrupt = 0;
|
|
|
|
hpet_rtc_timer_reinit();
|
|
|
|
if (UIE_on | AIE_on) {
|
|
rtc_get_rtc_time(&curr_time);
|
|
}
|
|
if (UIE_on) {
|
|
if (curr_time.tm_sec != prev_update_sec) {
|
|
/* Set update int info, call real rtc int routine */
|
|
call_rtc_interrupt = 1;
|
|
rtc_int_flag = RTC_UF;
|
|
prev_update_sec = curr_time.tm_sec;
|
|
}
|
|
}
|
|
if (PIE_on) {
|
|
PIE_count++;
|
|
if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
|
|
/* Set periodic int info, call real rtc int routine */
|
|
call_rtc_interrupt = 1;
|
|
rtc_int_flag |= RTC_PF;
|
|
PIE_count = 0;
|
|
}
|
|
}
|
|
if (AIE_on) {
|
|
if ((curr_time.tm_sec == alarm_time.tm_sec) &&
|
|
(curr_time.tm_min == alarm_time.tm_min) &&
|
|
(curr_time.tm_hour == alarm_time.tm_hour)) {
|
|
/* Set alarm int info, call real rtc int routine */
|
|
call_rtc_interrupt = 1;
|
|
rtc_int_flag |= RTC_AF;
|
|
}
|
|
}
|
|
if (call_rtc_interrupt) {
|
|
rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
|
|
rtc_interrupt(rtc_int_flag, dev_id, regs);
|
|
}
|
|
return IRQ_HANDLED;
|
|
}
|
|
#endif
|
|
|
|
static int __init nohpet_setup(char *s)
|
|
{
|
|
nohpet = 1;
|
|
return 1;
|
|
}
|
|
|
|
__setup("nohpet", nohpet_setup);
|
|
|
|
int __init notsc_setup(char *s)
|
|
{
|
|
notsc = 1;
|
|
return 1;
|
|
}
|
|
|
|
__setup("notsc", notsc_setup);
|