dec710b77c
Extend the INTC code with ioremap() support V2. Support INTC controllers that are not accessible through a 1:1 virt:phys window. Needed by SH-Mobile ARM INTCS. The INTC code behaves as usual if the io window resource is omitted. The slow phys->virt lookup only happens during setup. The fast path code operates on virtual addresses. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
105 lines
2.5 KiB
C
105 lines
2.5 KiB
C
#ifndef __SH_INTC_H
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#define __SH_INTC_H
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#include <linux/ioport.h>
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typedef unsigned char intc_enum;
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struct intc_vect {
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intc_enum enum_id;
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unsigned short vect;
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};
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#define INTC_VECT(enum_id, vect) { enum_id, vect }
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#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
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struct intc_group {
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intc_enum enum_id;
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intc_enum enum_ids[32];
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};
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#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
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struct intc_mask_reg {
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unsigned long set_reg, clr_reg, reg_width;
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intc_enum enum_ids[32];
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#ifdef CONFIG_SMP
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unsigned long smp;
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#endif
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};
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struct intc_prio_reg {
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unsigned long set_reg, clr_reg, reg_width, field_width;
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intc_enum enum_ids[16];
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#ifdef CONFIG_SMP
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unsigned long smp;
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#endif
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};
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struct intc_sense_reg {
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unsigned long reg, reg_width, field_width;
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intc_enum enum_ids[16];
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};
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#ifdef CONFIG_SMP
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#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
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#else
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#define INTC_SMP(stride, nr)
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#endif
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struct intc_hw_desc {
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struct intc_vect *vectors;
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unsigned int nr_vectors;
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struct intc_group *groups;
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unsigned int nr_groups;
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struct intc_mask_reg *mask_regs;
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unsigned int nr_mask_regs;
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struct intc_prio_reg *prio_regs;
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unsigned int nr_prio_regs;
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struct intc_sense_reg *sense_regs;
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unsigned int nr_sense_regs;
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struct intc_mask_reg *ack_regs;
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unsigned int nr_ack_regs;
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};
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#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
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#define INTC_HW_DESC(vectors, groups, mask_regs, \
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prio_regs, sense_regs, ack_regs) \
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{ \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
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}
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struct intc_desc {
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char *name;
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struct resource *resource;
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unsigned int num_resources;
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intc_enum force_enable;
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intc_enum force_disable;
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struct intc_hw_desc hw;
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};
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#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs) \
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struct intc_desc symbol __initdata = { \
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.name = chipname, \
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.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
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prio_regs, sense_regs, NULL), \
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}
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#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs, ack_regs) \
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struct intc_desc symbol __initdata = { \
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.name = chipname, \
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.hw = INTC_HW_DESC(vectors, groups, mask_regs, \
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prio_regs, sense_regs, ack_regs), \
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}
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int __init register_intc_controller(struct intc_desc *desc);
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int intc_set_priority(unsigned int irq, unsigned int prio);
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int reserve_irq_vector(unsigned int irq);
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void reserve_irq_legacy(void);
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#endif /* __SH_INTC_H */
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